Two districts and two charter schools will benefit from the federal Rural and Low Income Schools program grant to provide rural districts and schools with financial assistance for initiatives aimed at improving student achievement.

A DNREC grand opening today of a new boat ramp facility at Records Pond near Laurel in Sussex County. Construction began earlier this year on the new facility – which includes a new boat ramp with courtesy dock, expansion of existing parking lots to accommodate boat trailers, and new decking for an existing fishing pier on Records Pond.

Today the Delaware Tourism Office (DTO) announced a new grant program, the Tournaments, Events, and Athletic Meets Sponsorship (TEAMS) Program, designed to expand the office’s resources in recruiting sporting events to Delaware. The program aims to attract new regional, national, and international sporting events at amateur, collegiate, and professional levels while ensuring that current sports events maintain their place and continue to grow for years to come in Delaware.

In early June, DNREC kicked off a summer internship program to offer accomplished college students and recent graduates an opportunity to work alongside experts in public service and science.

Dover, Del. August 7, 2024 – The Delaware State Housing Authority  (DSHA) has awarded over $5,000,000 in Housing Stability Program (HSP) grants to eight community partner organizations throughout the state. HSP’s mission is twofold: to prevent imminent evictions by offering emergency rental assistance to households facing court dates, and to secure new housing opportunities by […]

Students across Delaware benefitted from multiple enrichment programs this summer designed to enhance literacy skills and overall well-being. Backed by the Delaware Department of Education (DDOE), Governor John Carney, and key community partners, the programs were offered in school districts and charter schools statewide.

The Delaware Department of Agriculture (DDA), in partnership with the Division of Small Business, officially launched the Delaware Agricultural Financing Program (DAFP) today. This new program aims to increase the viability of Delaware’s agricultural industry by broadening lending opportunities across the agricultural sector.

MONEY MATCH is One of Several Ongoing Initiatives to Increase the Return of Unclaimed Property to Owners The second week of September means it is time for back-to-school, pumpkin spice lattes, football, cool fall weather, and the State of Delaware’s annual MONEY MATCH check program. This week, the Delaware Office of Unclaimed Property will return […]

Fifteen programs spanning seven divisions within the Delaware Department of Natural Resources and Environmental Control are scheduled to participate in the University of Delaware’s annual Coast Day on Sunday, Oct. 6.

Dover, Del. September XX, 2024 – The Delaware State Housing Authority (DSHA) is excited to announce the launch of its new Landlord Incentive Program, designed to enhance housing opportunities for individuals and families holding Section 8 Housing Choice Vouchers (HCV). The Delaware State Housing Authority’s HCV program provides housing subsidies to eligible low-income individuals and […]

Governor John Carney and Delaware Secretary of Agriculture Michael T. Scuse, along with members of the General Assembly, the Aglands Preservation Board of Trustees, and other agricultural advocates, joined together at Shadybrook Farms, home of the Cartanza family, to unveil a new farm sign celebrating Delaware’s Agricultural Lands Preservation Program.

Kindergarteners across Delaware are participating in the Kindergarten Oral Health Screening Program for the first time this school year, provided by the Bureau of Oral Health and Dental Services (BOHDS) within the Delaware Division of Public Health (DPH). This new annual program is intended to improve the oral health of Delaware children and prepare them for […]

Volunteers, businesses encouraged to mentor students and sign up using new registration system   WILMINGTON, Del. – Governor Carney joined Delaware Department of Education (DOE) Secretary Mark Holodick, Delaware Department of Human Resources (DHR) Secretary Claire DeMatteis, elected officials, and advocates on Monday, October 28, to celebrate mentoring and encourage participation with the new State of Delaware centralized […]

DEPARTMENT OF EDUCATION: Professional Standards Board

DEPARTMENT OF EDUCATION: Office of the Secretary

We live in the age of data. From global warming stats to customer behavior patterns, new technologies have made it easier to collect, store, access and analyze information. But our use of these technologies has also eroded our attention spans and fueled post-truth misunderstandings. To combat these trends, the question [...]

SAS Customer Intelligence 360: Visual analytics, sankey diagrams and customer journeys was published on Customer Intelligence Blog.

When Los Angeles County invested in Whole Person Care (WPC) it could not have known just how important the system’s flexibility would be. Anyone who has had an interface with health care delivery, policy, oversight and management know things change quickly. As data becomes a priority, expectations of the use [...]

The post LA County's Whole Person Care analytics program offers crucial flexibility   appeared first on Government Data Connection.

Read the in depth Review of HP Pavilion Laptop 13 I5 1135G7 16 GB RAM Laptops. Know detailed info about HP Pavilion Laptop 13 I5 1135G7 16 GB RAM configuration, design and performance quality along with pros & cons, Digit rating, verdict based on user opinions/feedback.

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Read the in depth Review of CORSAIR DOMINATOR PLATINUM RGB First Edition DDR5 DRAM Memory Kit PC Components. Know detailed info about CORSAIR DOMINATOR PLATINUM RGB First Edition DDR5 DRAM Memory Kit configuration, design and performance quality along with pros & cons, Digit rating, verdict based on user opinions/feedback.

In practice, there is no need to remember textbook formulas for the ANOVA test because all modern statistical software will perform the test for you. In SAS, the ANOVA procedure is designed to handle balanced designs (the same number of observations in each group) whereas the GLM procedure can handle [...]

The post Programming the formulas for an ANOVA in SAS appeared first on The DO Loop.

A common way to visualize the sample correlations between many numeric variables is to display a heat map that shows the Pearson correlation for each pair of variables, as shown in the image to the right. The correlation is a number in the range [-1, 1], where -1 indicated perfect [...]

The post The correlogram: Visualize correlations by fitting angles appeared first on The DO Loop.

At least five people were killed this morning after their speeding car rammed a truck that had broken down and was parked on the roadside in Noida.

The CPIM lost one of its pillars today as Sitaram Yechury, the party's three-time general secretary, strategist, think tank, author and editor of its mouthpiece People's Democracy, died at the age of 72.

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Think of social media, and the first name that almost immediately comes to mind is Mark Zuckerberg.

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With the DRAM fabrication advancing from 1x to 1y to 1z and further to 1a, 1b and 1c nodes along with the DRAM device speeds going up to 8533 for Lpddr5/8800 for DDR5, Data integrity is becoming a really important issue that the OEMs and other users have to consider as part of the system that relies on the correctness of data being stored in the DRAMs for system to work as designed.

It’s a complicated problem that requires multiple ways to deal with it.

Traditionally one of the main approaches to deal with data errors is to rely on the ECC. ECC requires additional memory storage in which the ECC codes will calculated and stored at the time of memory write to DRAM. These codes will be read back along with the memory data during to the reads and checked against the data to make sure that there are no errors. Typical ECC schemes use Hamming code that provide for single bit error correction and double bit error detection per burst. Also, while several of previous generation of DRAM required Host to keep aside system memory for ECC storage latest DRAMs like Lpddr5 and DDR5 support on die ECC as part of the normal DRAM function that can be enabled using mode registers. DDR5 further requires Host to run through an ECC Error Check and Scrub (ECS) cycle on an average every tECSint time (Average Periodic ECS Interval) to prevent data errors.

Not meeting the DRAM Refresh requirement is a major reason that can lead to loss of data. This could be challenging as the PVT variation can cause the refresh requirement to change over time. Putting the DRAM in Self Refresh mode can help off-loading Refresh tracking responsibilities to DRAM but may prevent Host to do other scheduling optimizations and should be carefully considered.

Some of the other things that can affect the DRAM data are

1. Row hammer where same or adjacent rows are activated again and again leading to loss or changing of data contents in the rows that has not being addressed. Latest DRAMs like Lpddr5/Ddr5 support Refresh Management (including DRFM and ARFM) that allows the Host to compensate for these problems by issuing dedicated RFM commands helping DRAMs deals with potential Data loss issues arising out of Row hammer attacks.
2. Device temperature is another important factor that the Host needs to be aware of and if the application requires DRAM to operate at elevated temperature. The user needs to check with DRAM Vendor on the temperature range that DRAM can still operate. Data integrity at thresholds greater than certain temperature is not assured regardless of refresh rate unless DRAM is manufactured to withstand that.
3. Loss of power to DRAM will cause DRAM to lose all its contents. If this is a real concern for the system designer, they should consider using NVDIMM-N devices which has an onchip controller and a power source which is just enough to allow the DRAM contents to be copied into a backup non-volatile memory before power is lost. When the power is stored back, the stored memory contents in the non-volatile memory will be written back to the DRAM and system can continue to operate as it was before the power loss event occurred.

For transmissions and manufacturing errors DRAMs support additional features like CRC, DFE, Pre-Emphasis and PPR which will be covered in the next blog.

Cadence MMAV VIPs for DDR5/DDR5 DIMM and LPDDR5 are compressive VIP solutions and supports all of the above-listed Data integrity features including support for ECC error injection and SBE correction/DBE detection to assist with the verification challenges dealing with data integrity issues.

More information on Cadence DDR5/LPDDR5 VIP is available at Cadence VIP Memory Models Website.

Shyam 

Read on to know about the Operating Point Parameters Summary window that gives you a one-stop view of the categorized and tabulated details on all operating point parameters in your design. This window improves your review cycle with its many benefits.(read more)

Dear all,

I defined two design variables in ADE Assembler, say V1 and V2, that define the voltage 1 and voltage 2 of a "vpulse" voltage source in my schematic.

Then, I define V1 = 1.0, and V2 = 2.0, run a transient simulation, and everything is as expexcted. The source provides pulses between 1.0 V and 2.0 V.

Next, I set V1 = 1.0:0.5:1.5, thereby creating a parametric sweep with 1.0 V and 1.5 V for V1. I keep V2 at 2.0 V. Then the simulation fails, and all I get is "netl err" in my Output Expressions and an error message that the results directory does not exist and nothing can be plotted: This is reasonable, as the results directory is deleted on starting a new simulation, and as there is no simulation result, none of my output expressions can be plotted.

WARNING (OCN-6040): The specified directory does not exist, or the directory does not contain valid PSF results.
        Ensure that the path to the directory is correct and the directory has a logFile and PSF result files.
WARNING (ADE-1065): No simulation results are available.
ERROR (WIA-1175): Cannot plot waveform signals because no waveform data is available for plotting.
One of the possible reasons can be that 'Save' check box for these signals are not selected in the Outputs Setup pane. Ensure that these check boxes are selected before you run the simulation.

Normally, this kind of para,metric sweep is not a problem, I have done this many times before. There must be something special in THIS PARTICULAR test bench or simulator setup. The trouble is, I don't get any useful error messages.

Does anyone know what might be the problem here OR where to find useful information to investigate further (log files stored somewhere)? Thank you!

Regards,

Volker

P.S. Using Corners instead does not help either. Running it through all values by hand works, though.

For reasons too complicated to go into here, I need to generate the code for a veriloga view from a outside the normal Verilog-A editor. I would start with an "empty" veriloga view generated from the symbol in the normal way so I get the port order correct, then use external code to provide "guts" of the veriloga view by overwriting the generated code.

My understanding is that and code changes made external to the normal flow do not get picked up by Cadence - the Verilog-A code gets read at design time, not at netlist time. Would simply forcing a check and save of the veriloga view after the code is modified fix that problem? Or is there an easier way to incorporate externally generated Verilog-A code?

Hi,
I want to parameterized width and length of a NMOS, but it ignore it and I face this error:
*WARNING* Value input must be a number - setting back to previous value.

Does anybody know how I can fix this issue?
Thanks

Modified version of shr_ram from erm_lib to support mvl_values
regards: snaptube

Dear all,

Hi!

I'm trying to do a Harmonic Balance (HB) Large-Signal S-Parameter (LSSP) simulation to figure out the input impedance of a nonlinear circuit.

Through this simulation, what I want to know is the large-signal S11 only (not S12, S21 and S22).

So, I have simulated with only single port (PORT0) at input, but LSSP simulation is terminated and output log shows following text.

" Analysis `hb' was terminated prematurely due to an error "

The LSSP simulation does not proceed without second port.

Should I use floating second port (which is not necessary for my circuit) to succeed the LSSP simulation?

Does the LSSP simulation really need two ports?

Below figure is my HB LSSP simulation setup.

Additionally, Periodic S-Parameter (PSP) simulation using HB is succeeded with only single port.

What is the difference between PSP and LSSP simulations?

Hi,
My Virtuoso and Spectre Version: ICADVM20.1-64b.NYISR30.2
I plot an eye diagram using a built in function. I want to see the data-dependent jitter. I want to measure the eye diagram edges at zero crossing (width of that diamond part) shown in the pic by vertical and horizontal markers. I can put a marker and read the numbers there and get what I want. But now I want to run Monte Carlo and I can't do this for all samples. I wish I could write an expression for this. Unfortunately, I see that the function "cross" is not working on the eye diagram. Basically, when I send the eye diagram data to a table, I see that it actually is just the prbs data and not the eye diagram data. Is there a hack that can help me achieve my goal which is: having an expression to measure the edges of the eye diagram at zero crossing?
There is a script that Andrew wrote (https://support.cadence.com/wps/mypoc/cos?uri=deeplinkmin%3AViewSolution%3BsolutionNumber%3D11395772). This is a good script but it puts all edges on top of each other. I want to distinguish the two edges. In the attached pic (two-period eye diagram) you can see what I mean by the two edges (diamond shapes). I want to measure each of the two and take the maximum. Having all the edges on top of each other won't give me what I want. All edges together will lso include DCD. I purely want to measure DDJ. DCD is measured separately. I have very little experience with writing scripts and could not modify Andrew's script.
Your help is much appreciated. Thank you.

Hi,

In our design team, we're looking for a strategy to make all cell views self-contained. We are struggling to do so when nport devices are involved.

The nport file requires a full path, whereas what we need is a relative path to the current path of the cell in which we're using the nport.

I have browsed through the forums & cadence support pages, but could not find a solution.

1) There is a proposal from Andrew to add the file directory in ADE option "Simulation Files." :https://community.cadence.com/cadence_technology_forums/f/rf-design/27167/s-parameter-datafile-path-in-nport . This, however, is not suitable, because the cell is not self contained.

2) The new cadence version off DataSource "cellView" in nport options:

This however is not suitable for us due to two reasons:

i- Somehow we don't get this option in the nport cell (perhaps some custom modification from our PDK team)

ii- Even if we had this option, it requires to select the library, which again makes it unsuitable: We often copy design libraries for derivative products using "Hierarchical Copy" feature. And when the library is copied, the nport will still be pointing to the old library. Thus, it is still not self-contained.

In principle, it should not be difficult (technically) to point to a text file relative to the cell directory (f.ex we can make a folder under the same cell with name "sparFiles" & place all spar files under this folder), however it does not seem to be possible.

Could you perhaps recommend us a work-around to achieve our goal: making the cells which contain nport devices self-contained so that when we copy a cell, we do not have to update all the nport file destinations ?

Thanks in advance.

My Cadence Version: IC23.1-64b.ISR4.51

My Spectre version: 23.1.0.362.isr5

Che(read more)

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From today Australian and Indonesian businesses and workers will have even greater opportunities to boost their skills and expertise, with the signing of an expanded Memorandum of Understanding on the Indonesia-Australia Skills Development Exchange Pilot.

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