sim Extrowords #106: Generalissimo 76 By feedproxy.google.com Published On :: 2007-12-21T18:15:00+00:00 Sample clues 9 across: Van Morrison classic from Moondance (7) 6 down: Order beginning with ‘A’ (12) 6 across: Fatal weakness (8,4) 19 across: Rolling Stones classic (12) 4 down: Massacre tool (8) Extrowords © 2007 IndiaUncut.com. All rights reserved. India Uncut * The IU Blog * Rave Out * Extrowords * Workoutable * Linkastic Full Article
sim Post-synthesis Simulation Failing when lp_insert_clock_gating true By feedproxy.google.com Published On :: Wed, 14 Aug 2019 18:36:21 GMT When I enable clock gating in my synthesis flow (using Genus 18.15), my simulation (using Xcelium) on the post-synthesis netlist fails. The simulation succeeds pre-synthesis and also if I remove clock-gating in the design. I use set_db lp_insert_clock_gating true to enable clock gating during synthesis. I printed out some of the signals from the netlist and can see where it fails (it incorrectly writes a register). However, I am not sure how to solve this issue or what I should be looking for. Any help would be appreciated. Thanks. Full Article
sim How to dump waveform, fsdb in SimVision? By feedproxy.google.com Published On :: Thu, 09 Jan 2020 02:30:31 GMT As title, How to dump waveform, fsdb in SimVision? (Simulation Analysis Environment SimVision(64) 18.09-s001)Please help. Thanks. Full Article
sim Simvision By feedproxy.google.com Published On :: Fri, 10 Jan 2020 18:57:23 GMT Unable to open Source Browser. It goes into an infinite loop of loading, with the hour glass displayed and message "loading snapshot". The deisgn was compilied with "15.20.s028" and that is the same version of simvision I am using to open the code. The waveform viewer is uo and so is the Design Browser. I can take signals from Design Broweser and view the waveform viewer, but the source brower hangs. What should I be looking at to resolve this situation. Many of us at the company are sufferring from it. Colossal waste of time. . Full Article
sim New Memory Estimator Helps Determine Amount of Memory Required for Large Harmonic Balance Simulations By feedproxy.google.com Published On :: Thu, 24 Apr 2014 14:24:00 GMT Hi Folks, A question that I've often received from designers, "Is there a method to determine the amount of memory required before I submit a job? I use distributed processing and need to provide an estimate before submitting jobs." The answer...(read more) Full Article HB Spectre RF MMSIM spectreRF harmonic balance memory estimator
sim Broadband SPICE -- New Tool for S-Parameter Simulation in Spectre RF By feedproxy.google.com Published On :: Thu, 24 Apr 2014 15:18:00 GMT Hi All, Here's another great new feature that I've found very helpful... Broadband SPICE is a new tool for S-parameter simulation in Spectre RF. In the MMSIM13.1.1 ( MMSIM13.1 USR1) release (now available on http://downloads.cadence.com), a...(read more) Full Article nport Spectre RF broadband SPICE nport settings Spectre s parameter simulation
sim Noise Simulation in Spectre RF Using Improved Pnoise/Hbnoise and Direct Plot Form Options By feedproxy.google.com Published On :: Wed, 19 Apr 2017 06:09:58 GMT Did you check out the new Pnoise and Hbnoise Choosing Analyses forms in the MMSIM 15.1 and IC6.1.7 /ICADV12.2 releases? These forms have been significantly improved and simplified. The Direct Plot Form has also been enhanced and is much easy to use....(read more) Full Article HBnoise HB Spectre RF pnoise noise simulation Virtuoso RF design pss
sim 7 Habits of Highly Successful S-Parameters: How to Simulate Those Pesky S-Parameters in a Time Domain Simulator By feedproxy.google.com Published On :: Tue, 16 May 2017 20:11:02 GMT Hello Spectre Users, Simulating S-parameters in a time domain (transient, periodic steady state) simulator has been and continues to be a challenge for many analog and RF designers. I'm often asked: What is required in order to achieve accurate...(read more) Full Article S-parameter Spectre RF Spectre International Microwave Symposium
sim Link to: 7 Habits of Highly Successful S-Parameters: How to Simulate Those Pesky S-Parameters in a Time Domain Simulator By feedproxy.google.com Published On :: Thu, 06 Jul 2017 22:18:34 GMT Hi All, If you were unable to attend IMS 2017 in June 2017, the IMS MicroApp “7 Habits of Highly Successful S-Parameters” is on our Cadence website. On Cadence Online Support , the in-depth AppNote is here: 20466646 . Best regards, Tawna...(read more) Full Article nport analog/RF APS S-parameter Virtuoso Spectre Spectre RF broadband SPICE nport settings RF spectre spectreRF spectreRF s parameter simulation
sim skill ocean: how to get instances of type hisim_hv from simulation results? By feedproxy.google.com Published On :: Fri, 08 May 2020 20:46:12 GMT Hi there, I'm running a transient simulation, and I want to get all instances with model implementation hisim_hv because after that I want to process the data and to adjust some parameters for this kind of devices before dumping the values. What is the easiest/fastest way to get those instances in skill/ocean? What I did until now: - save the final OP of the simulation and then in skill openResults()selectResults('tranOp)report(?type "hisim_hv" ?param "vgs") Output seems to be promising, and looks like I can redirect it to a file and after that I have to parse the file. Is there other simple way? I mean to not save data to file and to parse it. Eventually having an instance name, is it possible to get the model implementation (hsim_hv, bsim4, etc..)? Best Regards, Marcel Full Article
sim Low-Power IEEE 1801 / UPF Simulation Rapid Adoption Kit Now Available By feedproxy.google.com Published On :: Fri, 22 Nov 2013 03:59:00 GMT There is no better way other than a self-help training kit -- (rapid adoption kit, or RAK) -- to demonstrate the Incisive Enterprise Simulator's IEEE 1801 / UPF low-power features and its usage. The features include: Unique SimVision debugging Patent-pending power supply network visualization and debugging Tcl extensions for LP debugging Support for Liberty file power description Standby mode support Support for Verilog, VHDL, and mixed language Automatic understanding of complex feedthroughs Replay of initial blocks ‘x' corruption for integers and enumerated types Automatic understanding of loop variables Automatic support for analog interconnections Mickey Rodriguez, AVS Staff Solutions Engineer has developed a low power UPF-based RAK, which is now available on Cadence Online Support for you to download. This rapid adoption kit illustrates Incisive Enterprise Simulator (IES) support for the IEEE 1801 power intent standard. Patent-Pending Power Supply Network Browser. (Only available with the LP option to IES) In addition to an overview of IES features, SimVision and Tcl debug features, a lab is provided to give the user an opportunity to try these out. The complete RAK and associated overview presentation can be downloaded from our SoC and Functional Verification RAK page: Rapid Adoption Kits Overview RAK Database Introduction to IEEE-1801 Low Power Simulation View Download (2.3 MB) We are covering the following technologies through our RAKs at this moment: Synthesis, Test and Verification flow Encounter Digital Implementation (EDI) System and Sign-off Flow Virtuoso Custom IC and Sign-off Flow Silicon-Package-Board Design Verification IP SOC and IP level Functional Verification System level verification and validation with Palladium XP Please visit https://support.cadence.com/raks to download your copy of RAK. We will continue to provide self-help content on Cadence Online Support, your 24/7 partner for learning more about Cadence tools, technologies, and methodologies as well as getting help in resolving issues related to Cadence software. If you are signed up for e-mail notifications, you're likely to notice new solutions, application notes (technical papers), videos, manuals, etc. Note: To access the above documents, click a link and use your Cadence credentials to log on to the Cadence Online Support https://support.cadence.com/ website. Happy Learning! Sumeet Aggarwal and Adam Sherer Full Article Low Power IEEE 1801 Functional Verification Incisive Enterprise Simulator IEEE 1801-2013 IEEE 1801-2009 RAK Incisive 1801 UPF 2.1 UPF RAKs simulation IES
sim ST Microelectronics Success with IEEE 1801 / UPF Incisive Simulation - Video By feedproxy.google.com Published On :: Thu, 16 Jan 2014 06:45:00 GMT ST Microelectronics reported their success with IEEE 1801 / UPF low-power simulation using Incisive Enterprise Simulator at CDNLive India in November 2013. We were able to meet with Mohit Jain just after his presentation and recorded this video that explains the key points in his paper. With eight years of experience and pioneering technology in native low-power simulation, Mohit was able to apply Incisive Enterprise Simulator to a low-power demonstrator in preparation for use with a production set-top box chip. Mohit was impressed with the ease in which he was able to reuse his existing IEEE 1801 / UPF code successfully, including the power format files and the macro models coded in his Liberty files. Mohit also discusses how he used the power-aware Cadence SimVision debugger. The Cadence low-power verification solution for IEEE 1801 / UPF also incorporates the patent-pending Power Supply Network visualization in the SimVision debugger. You can learn more about that in the Incisive low-power verification Rapid Adoption Kit for IEEE 1801 / UPF here in Cadence Online Support. Just another happy Cadence low-power verification user! Regards, Adam "The Jouler" Sherer Full Article IEEE 1801 simvision Incisive Enterprise Simulator UPF simulation verification
sim Transimpedance amplifier design Cadence By feedproxy.google.com Published On :: Thu, 27 Feb 2020 00:13:46 GMT Hi, I am new to the circuit design and troubleshooting. My project is to design a trans-impedance amplifier using Cadence that can amplify a signal coming from a photodiode. I started out with the regulated cascode configuration as shown in the circuit below. I look at the frequency response using AC simulation and it looks like a high pass (/net 5). The results doesn ot show any gain (transient response), or expected low-pass roll-off in the AC response. First thing, I looked into the operating regions of the MOSFETs and adjusted the input dc voltage of the Vsin to 0.5 to make sure that the T0, T1 mosfets are in saturation(checked this with the print->dc operating points). Beyond this point, I am not sure on how to proceed and interpret the results to make changes. Any help would be greatly appreciated. Thanks, -Rakesh. Full Article
sim mixer pxf simulation error(IC5141,Cadence workshop document) By feedproxy.google.com Published On :: Tue, 10 Mar 2020 06:24:50 GMT Hello The document I referenced is https://filebox.ece.vt.edu/~symort/rfworkshop/Mixer_workshop_instruction.pdf. (This is cadence workshop document) While following the pxf simulation in the above article, the results are different and I have a question. My result picture is shown below. <my result error> <document result> <my direct plot> <document direct plot> The difference with the documentation is that in the direct plot screen after the pxf simulation, 1.output harmonics-> input sideband 2.Frequency axis: out-> frequency axis: absin 3.The results for port0 (RF port) are also different (see photo below). 4.The frequency values in the box are different. My screen shows 5G, 10G, 1K ~ 10M, but the document is the same as 1K ~ 10M. Ask for a solution. Thank you. Full Article
sim cadence simulation error By feedproxy.google.com Published On :: Mon, 23 Mar 2020 12:59:12 GMT Hi, all Recently, I meet the simulation error as the picture shows when I simulate my circuit with transient. how can I solve this problem? thank you~ Full Article
sim Three tones IIP3 simulation By feedproxy.google.com Published On :: Wed, 01 Apr 2020 09:52:03 GMT Hi All, I saw the cadence tutorial on measuring IIP3 with 3 tones test (Lets say I have a mixer in the test so two tones are entered in the RF port and one is the LO). Now, I would like to verify if my receiver meets the bluetooth standard. In the standard it says to enter a signal at -64dBm and two additional signals (interference) at -39dBm each which placed one k (lets say k equals to one for the example) channels apart and the other 2k channels apart (so 3 signals enter the RF port). These signals cause an intermodulation product to fall at the frequency of the desired signal. I would like to measure the IIP3 in this case. Now, I need to enter 4 tones and the IIP3 is measured (based on cadence tutorial) using sweep in the hb. I do not want to sweep power since I need to enter exact power. I tried to use multi sinusoidal option in the port with exact power but it does not work. How in general am I be able to check communication standard in this way using virtuoso and measure IIP3? Can someone please help me? Thanks in advance! Full Article
sim pnoise pmjitter simulation By feedproxy.google.com Published On :: Fri, 24 Apr 2020 07:20:31 GMT Hi, when I applied a voltage divider implemented by two 100-ohm resistors to a 2Vpp 5GHz vsin source, the phase noise simulation using pnoise/fullspectrum with different types, jitter and source have different results. The simulated output noise results are 165.76aV2/Hz for pmjitter case, and 828.79zV2/Hz for source case. The source case result equals to the output noise calculation. For my application, the output will be applied to driven circuits and thus pm jitter is concerned. As the pmjitter is based on the noise sampling at the threshold crossings, I was wondering how spectre gets the pmjitter resullts since sampling white noise with infinite bandwidth is impossible to my knowledge? Interestingly, the Jee result by integration from 10kHz to 2.5GHz is ~41fs and is closed to Jee,rms from the transient noise simulation. I am also not sure how these results come and match each other. If applying the voltage divider output to drive next stages, I was wondering to what extent I can trust the input jitter from these simulations? Thank you. Full Article
sim Spectre HB simulation issue By feedproxy.google.com Published On :: Thu, 30 Apr 2020 00:16:04 GMT Hi, i'm using spectre HB simulation on PA (Power Amplifier) test_bench to perform large signal analysis (i want to plot Output power vs intput power, PAE and Gain) Although the simulation returns no error, i still can't plot anything. seem like there is an issue with the ports i'm using. (analoglib ports) i attach an image of my configuration so maybe you can find something helpful in it. thank you all for your help best regards Full Article
sim Sweep harmonic balance (hb) realibility (aging) simulation By feedproxy.google.com Published On :: Tue, 05 May 2020 17:22:25 GMT hi everyone, i'm trying to create a netlist for aging simulation. i would like to simulate how power, Gain and PAE (efficiency) are inlfuenced after 3 hours i would be grateful if someone can correct my syntax in the netlist since i'm trying to make a sweep HB simulation where the input power is the parameter. i did it without any error for the sp (S parameters) simulation. you can see the images for both sp and hb simulation netlists. (from left to right: sp aging netlist; hb aging netlist) i will be grateful if someone can provide me some syntax advices. thanks, best regards Full Article
sim Design library not defined while reading module with ncsim By feedproxy.google.com Published On :: Fri, 25 Oct 2019 08:27:37 GMT Hi supporters, I got the following error while I run simulation with gate netlist using Cadence Incisive (v15.20): ---- ncsim(64): 15.20-s076: (c) Copyright 1995-2019 Cadence Design Systems, Inc.ncsim: *E,DLOALB: Design library 'tcbnxxx' not defined while reading module tcbnxxx.MAOxxx:bv (VST).ncsim: *F,NOSIMU: Errors initializing simulation 'alu_tb' ---- xxx: standard library name. My netlist design uses a cell "MAOxxx". I already included the library behavior model to compile using ncverilog, there is no error while compiling. But when I run with ncsim to execute the test, I got above error. I tried to run with other vendors such as VCS or MTI, they worked. Please help to understand the error. Thanks. Full Article
sim Simvision Schematic Information By feedproxy.google.com Published On :: Wed, 20 Nov 2019 12:32:26 GMT Hi all, I would like to understand if it is possible from Simvision to get the information regarding the view of a block. In principle using the Schematic Tracer Simvision is able to find the information about the config of that particular model, but I did not found a command for describing the nature of the module (for example if it is schematic or rtl or real model...) Any functions that I can use for this purpose? Many thanks Full Article
sim Encryption of IP for Simulation with IES By feedproxy.google.com Published On :: Thu, 12 Dec 2019 16:00:59 GMT I'm sending encrypted HDL to a customer who will use Cadence IES for simulation and was wondering how I should go about the encryption. Does IES support the IEEE's P1735 and if so, where can I find Cadence's public key for performing the encryption? Or is there an alternative solution that I can use for encryption? Full Article
sim How to run a regressive test and merge the ncsim.trn file of all test into a single file to view the waveform in simvision ? By feedproxy.google.com Published On :: Mon, 13 Jan 2020 12:04:01 GMT Hi all, I want to know how to run a regressive test in cadence and merge all ncsim .trn file of each test case into a single file to view all waveform in simvision. I am using Makefile to invoke the test case. eg:- test0: irun -uvm -sv -access +rwc $(RTL) $(INTER) $(PKG) $(TOP) $(probe) +UVM_VERBOSITY=UVM_MEDIUM +UVM_TESTNAME=test0 test1: irun -uvm -sv -access +rwc $(RTL) $(INTER) $(PKG) $(TOP) $(probe) +UVM_VERBOSITY=UVM_MEDIUM +UVM_TESTNAME=test1 I just to call test0 followed by test1 or parallel both test and view the waveform for both tests case. I new to this tool and help me with it Full Article
sim xmsim is not exiting the simulation for this error By feedproxy.google.com Published On :: Thu, 23 Jan 2020 18:38:33 GMT xmsim is not exiting the simulation for this error. It is unusual for the simulator to not exit for an error. I have just started using uvm and this is occurring during the randomization step for a sequencer item. xmsim: *E,RNDCNSTE I am using -EXIT on the command line. I am using Xcelium 19.03-s013. Any insights are appreciated. Thanks. -Jim Full Article
sim Info regarding released version Cadence IES simulator By feedproxy.google.com Published On :: Thu, 06 Feb 2020 07:42:31 GMT Hello folks, Greetings. One of my customer claims that he is using Cadence IES version 18.09.011 with Vivado 2019.2. The version of IES that we officially support with Vivado 2019.2 is 15.20.073. Though the tool is forward compatible, I am not sure what are the versions of IES that are released after 15.20.073. Could you please give me a list of the versions of Cadence IES released after 15.20.073 and which is the latest version as of now ? Best regards, Chinmay Full Article
sim Post synthesis simulation with XCELIUM - SDF By feedproxy.google.com Published On :: Sat, 11 Apr 2020 12:27:22 GMT hi,due to technical problem i am running simulation through terminal. Therefore, I have a Verilog file, a test bench and i have also exported from Genus synthesized netlist and sdf file. Now, how can i annotate sdf in my post-synthesis simulation using XCELIUM while using command line?thank you Full Article
sim Failed to inject fault at (ncsim) By feedproxy.google.com Published On :: Thu, 07 May 2020 17:38:56 GMT Hi, I'm doing fault injection with ncsim and got stuck at the following (and not so useful) message: "ncsim: *E,FLTIGF: [FLT] Failed to inject fault at circuit_tb.U0.n2174." I already tried with other NETs, with SET, SA0, SA1, always the same error occurs. My scripts so far, considering I already compiled the Verilog testbench and also the gates from the technology library (gate-level simulation): #this runs ok ncelab -work worklib -cdslib circuit/trunk/backend/synthesis/work/cds.lib -logfile ncelab.log -errormax 15 -access +wc -status -timescale 1ps/1ps worklib.circuit_tb -fault_file circuit/trunk/backend/synthesis/scripts/fi.list #this runs okncsim -fault_good_run -fault_tw 1ns:4ns -fault_work fault_db -fault_overwrite worklib.circuit_tb:module -input ../scripts/fs_strobe.tcl -exit #this runs NOT OKncsim -fault_sim_run -fault_work fault_db worklib.circuit_tb:module -input ../scripts/injection.tcl -exit After the above command I get: "ncsim: *E,FLTIGF: [FLT] Failed to inject fault at circuit_tb.U0.n2174." Here are the files called from the commands above. fi.list: fault_target circuit_tb.U0.n2174 -type SET+SA1+SA0 fs_strobe.tcl: fs_strobe circuit_tb.WRITE_OUT circuit_tb.PC_OUT[0] injection.tcl: fault -stop_severity 3 -inject -time 2ns -type sa1 circuit_tb.U0.n2174 I already checked the NETs with simvision, so their paths are correct. Any ideas? PS: I know about Xcellium, however, I don't have it yet. Full Article
sim Extrowords #97: Generalissimo 68 By feedproxy.google.com Published On :: 2007-08-16T00:11:00+00:00 Sample clues 18 across: Makoto Hagiwara and David Jung both claim to have invented it (7,6) 1 down: French impressionist who rejected that term (5) 3 down: Artificial surface used for playing hockey (9) 7 down: The sequel to Iliad (7) 12 down: Adipose tissue (4,3) Extrowords © 2007 IndiaUncut.com. All rights reserved. India Uncut * The IU Blog * Rave Out * Extrowords * Workoutable * Linkastic Full Article
sim Extrowords #98: Generalissimo 69 By feedproxy.google.com Published On :: 2007-11-11T20:24:00+00:00 Sample clues 6 across: Franchise revived by Frank Miller (6) 13 across: What Keanu Reeves and Zayed Khan have in common (5) 18 across: What Frank Sinatra and George Clooney have in common (6,6) 19 across: Dosa mix, for example (6) 2 down: Green, in a non-environmental way (7) Extrowords © 2007 IndiaUncut.com. All rights reserved. India Uncut * The IU Blog * Rave Out * Extrowords * Workoutable * Linkastic Full Article
sim Extrowords #99: Generalissimo 70 By feedproxy.google.com Published On :: 2007-11-13T12:27:00+00:00 Sample clues 5 down: Torso covering (6) 7 down: Government by rogues (12) 15 across: eBay speciality (7) 18 across: Demonic (8) 20 across: Common language (6,6) Extrowords © 2007 IndiaUncut.com. All rights reserved. India Uncut * The IU Blog * Rave Out * Extrowords * Workoutable * Linkastic Full Article
sim Extrowords #100: Generalissimo 71 By feedproxy.google.com Published On :: 2007-11-16T04:54:00+00:00 Sample clues 17 across: Beckham speciality (4,4) 4 down: Havana speciality (5) 19 across: Infamous 1988 commercial against Michael Dukakis (9,4) 11 down: Precisely (2,3,3) 13 down: City infamously ransacked by the Japanese in 1937 (7) Extrowords © 2007 IndiaUncut.com. All rights reserved. India Uncut * The IU Blog * Rave Out * Extrowords * Workoutable * Linkastic Full Article
sim Extrowords #101: Generalissimo 72 By feedproxy.google.com Published On :: 2007-11-22T07:37:01+00:00 Sample clues 11 across: Chandigarh’s is 0172 (3,4) 21 across: He’s a loser, baby (4) 1 down: Garment meant to shape the torso (6) 12 down: It’s slogan: “Life, Liberty and the Pursuit” (8) 18 down: Noise made by badminton players? (6) Extrowords © 2007 IndiaUncut.com. All rights reserved. India Uncut * The IU Blog * Rave Out * Extrowords * Workoutable * Linkastic Full Article
sim Extrowords #102: Generalissimo 73 By feedproxy.google.com Published On :: 2007-12-10T18:27:00+00:00 Sample clues 5 across: The US president’s bird (3,5,3) 11 down: Group once known as the Quarrymen (7) 10 across: Cavalry sword (5) 19 across: Masonic ritual (5,6) 1 down: Pioneer of Ostpolitik (6) Extrowords © 2007 IndiaUncut.com. All rights reserved. India Uncut * The IU Blog * Rave Out * Extrowords * Workoutable * Linkastic Full Article
sim Extrowords #103: Generalissimo 74 By feedproxy.google.com Published On :: 2007-12-11T15:27:00+00:00 Sample clues 14 across: FDR’s baby (3,4) 1 down: A glitch in the Matrix? (4,2) 4 down: Slanted character (6) 5 down: New Year’s venue in New York (5,6) 16 down: Atmosphere of melancholy (5) Extrowords © 2007 IndiaUncut.com. All rights reserved. India Uncut * The IU Blog * Rave Out * Extrowords * Workoutable * Linkastic Full Article
sim Extrowords #104: Generalissimo 74 By feedproxy.google.com Published On :: 2007-12-13T18:18:00+00:00 Sample clues 6 across: Alejandro González Iñárritu’s breakthrough film (6,6) 19 across: Soft leather shoe (8) 7 down: Randroids, for example (12) 12 down: First American World Chess Champion (7) 17 down: Circle of influence (5) Extrowords © 2007 IndiaUncut.com. All rights reserved. India Uncut * The IU Blog * Rave Out * Extrowords * Workoutable * Linkastic Full Article
sim Extrowords #105: Generalissimo 75 By feedproxy.google.com Published On :: 2007-12-17T06:25:00+00:00 Sample clues 5 across: Robbie Robertson song about Richard Manuel (6,5) 2 down: F5 on a keyboard (7) 10 across: Lionel Richie hit (5) 3 down: ALTAIR, for example (5) 16 down: The problem with Florida 2000 (5) Extrowords © 2007 IndiaUncut.com. All rights reserved. India Uncut * The IU Blog * Rave Out * Extrowords * Workoutable * Linkastic Full Article
sim Extrowords #106: Generalissimo 76 By feedproxy.google.com Published On :: 2007-12-21T18:15:00+00:00 Sample clues 9 across: Van Morrison classic from Moondance (7) 6 down: Order beginning with ‘A’ (12) 6 across: Fatal weakness (8,4) 19 across: Rolling Stones classic (12) 4 down: Massacre tool (8) Extrowords © 2007 IndiaUncut.com. All rights reserved. India Uncut * The IU Blog * Rave Out * Extrowords * Workoutable * Linkastic Full Article
sim OVM transactions in simvision By feedproxy.google.com Published On :: Tue, 24 Mar 2009 08:27:22 GMT Hi,I'm using OVM transaction level tracing in SV. I was wondering if I can have simvision render different types of transactions with different colors e.g. based on a transaction attribute. I know how to do it at signal level using mnemonics but I haven't succeeded doing this at transaction level. Anyone? -Joep Full Article
sim Sudoku solver using Incisive Enterprise Verifier (IEV) and Assertion-Driven Simulation (ADS) By feedproxy.google.com Published On :: Tue, 13 Dec 2011 17:29:21 GMT Just in time for the holidays, inside the posted tar ball is some code to solve 9x9 Sudoku puzzles with the Assertion-Driven Simulation (ADS) capability of Incisive Enterprise Verifier (IEV). Enjoy! Joerg Mueller Solutions Engineer for Team Verify Full Article
sim Simvision - Signal loading By feedproxy.google.com Published On :: Fri, 04 May 2012 04:59:11 GMT Hi all Good day.Can anyone tell me whether it is possible to view the signals once it is modified from its previous values without closing the simvision window. If possible kindly let me know the command for it(Linux). Is it possible to view the schematic for the code written?? Kindly instruct me. Thanks all.S K S Full Article
sim Hold violation at post P&R simulation By feedproxy.google.com Published On :: Mon, 08 Oct 2012 04:28:27 GMT Hello, I am working in a digital design. The functional, post synthesis and post P&R without IO pads are all working fine, i.e., functionally and with clean timing reports "no setup/hold violations". I just added the IO pads to the same design, I had to change the timing constraints a bit for the synthesis but I have a clean design at SOC Encounter, i.e., clean DRC and clean timing reports "no setup/hold violations". However, when I perform simulation using the exported net-list from SOC Encounter together with SDF exported from the same tool, I got a lot of hold violations. Consequently, the design is not funcitioning. Why and how I can overcome or trobleshoot this issue?In waiting for your feedback and comments.Regards. Full Article
sim memory leak in ncsim By feedproxy.google.com Published On :: Fri, 16 Aug 2013 06:32:51 GMT ncsim will consume an increasing ammount of memory when a function has an output port that return an associative array which was not initialized. My simulator version is 12.10-s011.Below is a code example to reproduce the failure. The code is inside a class (uvm_object): function void a_function(output bit ret_val[int]); // empty endfunction : get_coveach time the call is done a small ammount of memory is allocated. I n my case I call this function several (millions of) times during simulation and then I can see the memory leaking. Full Article
sim how to add section info to extsim_model_include? By feedproxy.google.com Published On :: Wed, 22 Apr 2020 22:12:45 GMT i had encountered error message like this before. but in liberate, i did not find the entry to input section info. Full Article
sim Virtuoso Spectre Monte Carlo simulation By feedproxy.google.com Published On :: Tue, 28 Apr 2020 06:49:49 GMT Hi , I have designed analog IP in cadence ADE and simulated in spectre. All corner results looks good. when i run monte carlo 1000 runs have high current in 125C two runs. Simulated with same setup in different user, all clean.Need to know what type sampling method used and why its not clean with my setup. Thanks, Anbarasu Full Article
sim Regarding Save/Restore Settings for Transient Simulation By feedproxy.google.com Published On :: Tue, 28 Apr 2020 16:20:14 GMT Hello, I am running a transient simulation on my circuit and usually my simulation time took me more than a day (The circuit is quite big). I am usually saving specific nodes to decrease the simulation time. My problem is, since it usually took me one day to finish I need to save my trans simulation just in case something bad happens. I am aware that the transient simulation have the options for save/restore. But, when I tried to use it I have some problem. Whenever I restore the save file, it starts where it ends before (expected function) but my data is incomplete. It doesn't save the previous data. Its kind of my data is incomplete. What I did is set the saveperiod and savefile. I hope someone can help me. Thank you! Regards, Kiel Full Article
sim Using calcVal() in Monte-Carlo simulations By feedproxy.google.com Published On :: Wed, 29 Apr 2020 09:10:55 GMT Hello, I am trying to use calcVal for creating a spec condition from a simulated parameter and although this works perfectly fine in corner simulations, I am having some difficulties in Monte-Carlo (and I will explain). (I have also read "Using calcVal() and its arguments with ADE Assembler" in Resources > Rapid Adoption Kits but couldn't find any relevant information that would help me address the "issue"). In the above example I am performing a MC simulation which has 2 corners of 10 runs each. I would like to get the minimum value of variable "OC_limit_thres" out of those 10 runs and pass it as my upper limit to a range argument for variable "OC_flag_thres", so the CPK can be calculated. So the range statement should in reality be like this: range 32m 44.34m (for corner 0) range 32m 43.14m (for corner 1) If I open the Detail - Transpose view in the Results tab, the calcVal("OC_limit_thres" "Currlim_TurnOn_C11") is calculated perfectly fine for each run but here I need one single value out of those 10 runs - in this case the minimum - in order for calcVal to evalute on multiple runs of 1 corner. How can this be done please? Thank you in advance for your time. Full Article
sim Simulating PSSR+/PSSR- and CMRR By feedproxy.google.com Published On :: Thu, 30 Apr 2020 02:57:17 GMT Hello, I would like to simulate the PSSR+/PSSR- and the CMMR using xf for the attached test bench. Normally, I do the AC analysis and using the post-processing capability of cadence spectre I do 20log(vdd/vout) for PSSR+ and 20*log(vss/vout) for PSSR-. looked online from an old post that I do: PSRR-db20(1/DATA("/Vn/PLUS" "xf-xf"))PSRR+db20(1/DATA("/Vp/MINUS" "xf-xf")) How about the for the CMRR? Thanks a lot in advance. Full Article
sim Simulating IBIS Model using Spectre By feedproxy.google.com Published On :: Thu, 30 Apr 2020 23:17:12 GMT I have a question regarding simulating IBIS model using Spectre. IBIS model generation always has the die capacitance included and in the generated IBIS file you will have this value as “C_comp” value. Does the Spectre accounts for this capacitance from the IBIS file while computing the time domain voltage waveform during simulation ? If I add additional capacitance outside in the testbench, to model the die capacitance, then it will be double counting. Does anyone know if Spectre is already accounting this C_comp during the time domain voltage wave computation from IBIS file, during simulation ? Full Article
sim Ultrasim does not converge with BSIMBULK model By feedproxy.google.com Published On :: Tue, 05 May 2020 09:16:51 GMT Hello, I am using ultrasim Version 18.1.0.314.isr5 64bit 03/26/2019 06:33 (csvcm20c-2). When I run my netlist, ultrasim is blocked in the first DC stage and takes forever. Then it will fail or never progress. I am using a 22nm BSIMBULK model. I tried to tune different accuracy and convergence aids options but noting works. When I run the same netlist with spectre it works fine with no problem. Also, If I use another model (not BULKSIM), ultrasim will work and converge with no problem. My first feeling is that ultrasim has a problem with using BSIMBULK model. Could you please advice, Thank you, Kotb Full Article
sim ERROR (OSSGLD-18): and not able to run simulation By feedproxy.google.com Published On :: Wed, 06 May 2020 02:40:42 GMT I put some stimulus in the simulation file section : _vpd_data_enb (pu_data_enb 0) vsource wave=[0 0 1n 0 1.015n vcchbm 3n vcchbm] dc=0 type=pwl_vpu_data_enb (pd_data_enb 0) vsource dc=pu_enb type=dc I get the following error. ERROR (OSSGLD-18): The command character after '[' in the NLP expression '[0 0 1n 0 1.015n vcchbm 3n vcchbm] dc=0 type=pwl ' is not a valid character. The command character is the first character after '[' in the NLP expression. It must be '?', '!', '#', '$', 'n', '@', '.', '~' or '+'. Enter a valid character as the command character. si: simin did not complete successfully. I dont see anything wrong with the stimulus syntax Full Article