Revenues from operations for the third quarter rose 4.28% y-o-y to Rs6,574.82 crore on account of contribution from newly-acquired companies during the quarter.

Australian High Commissioner Harinder Sidhu hopes India will revert decision to reject RCEP, warns against economies turning inwards, believes climate change role in bushfires bears examination, and admits that her Indian origins, especially Bollywood love, helped her

Budget 2019: The high point of higher education

Entrepreneurial training at the high school level can give women a head start in the tough start-up arena.

More than 1 lakh Indian nationals from the state of Kerala have expressed their desire to come back from different countries in the wake of the Covid-19 pandemic.

The president emphasised the need to focus promoting medical tourism by highlighting the "successful efforts taken by Sri Lanka to contain the spread of the coronavirus."

Jon Stewart, who turned Comedy Central’s “The Daily Show” into a sharp-edged commentary on current events...

Pakistan on Monday conferred its highest civilian award Nishan-e-Pakistan on Saudi Crown Prince Mohammad bin Salman for his “outstanding support” in reinvigorating the ties between the two countries.

The launching vehicle of GISAT 1 has evinced much interest before the launch of the mission. GSLV -F10 is a humongously tall vehicle - as tall as a Sixteen storey building, and weighing approximately 4,20,300 kilograms..

Special grade steel plates have been procured from the Bhilai plant of the Steel Authority of India Limited (SAIL) to be used in the launch vehicle.

Curiosity's project scientist at NASA's Jet Propulsion Laboratory Ashwin Vasavada said that it is the first time that NASA has dedicated its operations to capture a 360-degree panorama.

The yet-to-be-published study looked at more than 3,000 counties across the US, comparing levels of fine particulate air pollution with novel coronavirus death counts for each area.

The research, published in the journal Science of the Total Environment, combined satellite data on air pollution and air currents with confirmed deaths related to COVID-19.

Pascal Comvalius is going to discuss with the participants on how to deal with hostile parties on a negotiation table. How to mould the brick into a shape that you are comfortable in! 

• Date & Timing: 28th April, 2020 @4.30 PM
• Meeting Link: Click Here

While the technology will not be as effective as a GSPS tracing, it would undoubtedly save battery as the power consumption of GPS is much higher than Bluetooth.

The Tamil Nadu government on Saturday moved the Supreme Court challenging a Madras High Court order for closure of state-run liquor outlets on grounds of violations of COVID-19 guidelines, arguing that it would lead to "grave losses" in revenue and complete halt in commercial activities.

Government is committed to put India back on high growth path - President of India address to Parliament

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Indian Budget 2020 Highlights - 10 Key Announcements

Researchers highlight risk of asymptomatic infection, as Europe begins easing lockdown

• Coronavirus – latest updates
• See all our coronavirus coverage

More than 10 times as many people in Germany as thought may have been infected with coronavirus, researchers have said, as Italy led swathes of Europe out of lockdown and officials said the continent’s outbreak was mostly past its peak.

Researchers from Bonn University said on Monday that their preliminary study, based on fieldwork in the town of Gangelt in Heinsberg municipality, which had one of Germany’s highest death tolls, showed the risk of infection by asymptomatic carriers.

Coronavirus has infected more than 3.5 million people and caused nearly 250,000 deaths worldwide, according to the Johns Hopkins University tracker.

China’s state broadcaster CCTV attacked the US secretary of state’s “insane and evasive remarks” on the origins of the pandemic. Mike Pompeo said there was “enormous evidence” to show the virus originated in a lab in China.

As Donald Trump presses states to reopen their economies, his administration is privately projecting daily deaths will almost double to about 3,000 by 1 June, according to an internal document seen by the New York Times.

Japan’s prime minister, Shinzo Abe, extended the country’s national state of emergency to 31 May, adding that he would consider lifting it earlier if experts decided that was possible based on regional infection trends.

World leaders, with the exception of Trump, stumped up nearly €7.4bn (£6.5bn) to research Covid-19 vaccines and therapies, pledging the money would also be used to distribute any vaccine to poor countries on time and equitably.

Different players, very different contracts. Some guys have deals that are shutdown-proof. Others? They have more to prove.

In 1985, as a relatively new editor at Computer Design magazine, I was asked to go forth and cover a new business called CAE (computer-aided engineering). I knew nothing about it, but I had been writing about design for test, so there seemed to be somewhat of a connection. Little did I know that “CAE” would turn into “EDA” and that I’d write about it for the next 30 years, for Computer Design, EE Times, Cadence, and a few others.

Now that I’m about to retire, I’m looking back over those 30 years. What a ride it has been! By the numbers I covered 31 Design Automation Conferences (DACs), hundreds of new products, dozens of acquisitions and startups, dozens of lawsuits, and some blind alleys that didn’t work out (like “silicon compilation”). Chip design went from gate arrays and PLDs with a few thousand gates to processors and SoCs with billions of transistors.

In 1985 there were three big CAE vendors – Daisy Systems, Mentor Graphics, and Valid Logic. All sold bundled packages that included workstations and CAE software; in fact, Daisy and Valid designed and manufactured their own workstations. In the early 1980s a workstation with schematic capture and gate-level logic simulation might have set you back $120,000. In 1985 OrCAD, now part of Cadence, came out with a $500 schematic capture package running on IBM PCs.

Cadence and Synopsys emerged in the late 1980s, and by the 1990s the EDA industry was pretty much a software-only business (apart from specialized machines like simulation accelerators). Since the early 1990s the “big three” EDA vendors have been Cadence, Synopsys, and Mentor, giving the industry stability but allowing for competition and innovation.

Here, in my view, are some of the highlights that occurred during the past 30 years of EDA.

EDA is a Highlight

The biggest highlight in EDA is the existence of a commercial EDA industry! Marching hand in hand with the fabless semiconductor revolution, commercial EDA made it possible for hundreds of companies to design semiconductors, as opposed to a small handful that could afford large internal CAD operations and fabs. With hundreds of semiconductor companies as opposed to a half-dozen, there’s a lot more creativity, and you get the level of sophistication and intelligence that you see in your smartphone, video camera, tablet, gaming console, and car today.

CAE + CAD = EDA. This is not just a terminology issue. By the mid-1980s it became clear that front-end design (CAE) and physical design (CAD) belonged together. The big CAE vendors got involved in IC and PCB CAD, and presented increasingly integrated solutions. People got tired of writing “CAE/CAD” and “EDA” was born.

The move from gate-level design to RTL. This move happened around 1990, and in my view this is EDA’s primary technology success story during the past 30 years. Moving up in abstraction made the design and verification of much larger chips possible. Going from gate-level schematics to a hardware description language (HDL) revolutionized logic design and verification. Which would you rather do – draw all the gates that form an adder, or write a few lines of code and let a synthesis tool find an adder in your chosen technology?

Two developments made this shift in design possible. One was the emergence of commercial RTL synthesis (or “logic synthesis”) tools from Synopsys and other companies, which happened around 1990. Another was the availability of Verilog, developed by Gateway Design Automation and purchased by Cadence in 1989, as a standard RTL HDL. Although most EDA vendors at the time were pushing VHDL, designers wanted Verilog and that’s what most still use (with SystemVerilog coming on strong in the verification space).

IC functional verification underwent huge changes in the late 1990s and early 2000s, largely due to new technology developed by Verisity, which was acquired by Cadence in 2005. Before Verisity, verification engineers were writing and running directed tests in an ad-hoc manner. Verisity introduced or improved technologies such as pseudo-random test generation, coverage metrics, reusable verification IP, and semi-automated verification planning. The Verisity “e” language became a widely used hardware verification language (HVL).

The biggest way that EDA has expanded its focus has been through semiconductor IP. Today Synopsys and Cadence are leading providers in this area. Thanks to the availability of design and verification IP, many SoC designs today reuse as much as 80% of previous content. This makes it much, much faster to design the remaining portion. While IP began with fairly simple elements, today commercially available IP can include whole subsystems along with the software that runs on them. With IP, EDA vendors are providing not only design tools but design content.

Finally, the EDA industry has done an amazing job of keeping up with SoC complexity and with advanced process nodes. Thanks to intense and early collaboration between foundries, IP, and EDA providers, tools and IP have been ready for process nodes going down to 10nm.

Where Does ESL Fit?

In some ways, electronic system level (ESL) design is both a lowlight and a highlight. It’s a lowlight because people have been talking about it for 30 years and the acceptance and adoption have come very slowly. ESL is a highlight because it’s finally starting to happen, and its impact on design and verification flows could be dramatic. Still, ESL is vaguely defined and can be used to describe almost anything that happens at a higher abstraction level than RTL.

High-level synthesis (HLS) is an ESL technology that is seeing increasing use in production environments. Current HLS tools are not restricted to datapaths, and they produce RTL code that gives better quality of results than hand-written RTL. Another ESL methodology that’s catching on is virtual prototyping, which lets software developers write software pre-silicon using SystemC models. Both HLS and virtual prototyping are made possible by the standardization of SystemC and transaction-level modeling (TLM). However, it’s still not easy to use the same SystemC code for HLS and virtual prototyping.

And Now, Some Lowlights

Every new industry has some twists and turns, and EDA is no exception. For example, the EDA industry in the 1980s and 1990s sparked a lot of lawsuits. At EE Times my colleagues and I wrote a number of articles about EDA legal disputes, mostly about intellectual property, trade secrets, or patent issues. Over the past decade, fortunately, there have been far fewer EDA lawsuits than we had before the turn of the century.

Another issue that was troublesome in the 1980s and 1990s was so-called “standards wars.” These would occur as EDA vendors picked one side or the other in a standards dispute. For example, power intent formats were a point of conflict in the early 2000s, but the Common Power Format (CPF) and the Unified Power Format (UPF) are on the road to convergence today with the IEEE 1801 effort. As mentioned previously, Verilog and VHDL were competing for adoption in the early 1990s. For the most part, Verilog won, showing that the designer community makes the final decision about which standards will be used.

How on earth did there get to be something like 30 DFM (design for manufacturability) companies 10-12 years ago? To my knowledge, none of these companies are around today. A few were acquired, but most simply faded away. A lot of investors lost money. Today, VCs and angel investors are funding very few EDA or IP startups. There are fewer EDA startups than there used to be, and that’s too bad, because that’s where a lot of the innovation comes from.

Here’s another current lowlight -- not enough bright engineering or computer science students are joining EDA companies. They’re going to Google, Apple, Facebook, and the like. EDA is perceived as a mature industry that is still technically very difficult. We need to bring some excitement back into EDA.

Where Is EDA Headed?

Now we come to what you might call “headlights” and look at what’s coming. My list includes:

• System Design Enablement. This term has been coined by Cadence to describe a focus on whole systems or end products including chips, packages, boards, embedded software, and mechanical components. There are far more systems companies than semiconductor companies, leaving a large untapped market that’s looking for solutions.
• New frontiers for EDA. At a 2015 Design Automation Conference speech, analyst Gary Smith suggested that EDA can move into markets such as embedded software, mechanical CAD, biomedical, optics, and more.
• Vertical markets. EDA has until now been “horizontal,” providing the same solution for all market segments. Going forward, markets like consumer, automotive, and industrial will have differing needs and will need optimized tools and IP.
• Internet of Things. This is a current buzzword, but the impact on EDA remains uncertain. Many IoT devices will be heavily analog, use mature process nodes, and be dirt cheap. Lip-Bu Tan, Cadence CEO, recently pointed out that the silicon percentage of IoT revenue will be small and that a lot of the profits will be on the service side.

Moving On

For the past six years I’ve been writing the Industry Insights blog at Cadence.com. All things change, and with this post comes a farewell – I am retiring in late June and will be pursuing a variety of interests other than EDA. I’ll be watching, though, to see what happens next in this small but vital industry. Thanks for reading!

Richard Goering

Hello Spectre Users, Simulating S-parameters in a time domain (transient, periodic steady state) simulator has been and continues to be a challenge for many analog and RF designers. I'm often asked: What is required in order to achieve accurate...(read more)

Hi All, If you were unable to attend IMS 2017 in June 2017, the IMS MicroApp “7 Habits of Highly Successful S-Parameters” is on our Cadence website. On Cadence Online Support , the in-depth AppNote is here: 20466646 . Best regards, Tawna...(read more)

I could not find info about the highlight shapes/layers in the cadence doc directory, forum, support library.

I have a script that creates highlight shapes on the y* drawing layer.

My understand is the highlight is a virtual shape. The shapes go away when the cadence session is closed or when you close data of that cellview if it is not global.

If they are vitual shapes it would be okay to use valid or process layers when I create the highlight set with geCreateHilightSet.

Ex: ( The command I use to create the hiighlight set       geCreateHilightSet(cv list(lay purp) nil) )

Current y0-9 drawing 

To N-P_implant drawing

Paul

In this week’s Whiteboard Wednesdays video, Dave Apte discusses how to create the lowest power design possible by using architectural exploration and Cadence’s Stratus HLS solution....

[[ Click on the title to access the full blog on the Cadence Community site. ]]

Dassault Systèmes Reports First Quarter Financial Results With Recurring Software, Operating Margin and EPS At the High End of Its Non-IFRS Guidance

FDI into Latvia has recovered in recent years as the Baltic state has implemented stricter anti-money laundering procedures. Latvian minister of economics Ralfs Nemiro talks to Alex Irwin-Hunt about the progress made.

Mohammad Nafees Zakaria, Pakistan’s UK high commissioner, talks about his country’s potential for foreign investors.

Sino-European foreign direct investment is converging, according to data from fDi Markets.

Successive annual increases of FDI inflows to Spain culminated in a record year in 2018. Alex Irwin-Hunt reports.

Cyprus’s record-breaking 2018 was driven by tourism and second-tier cities. 

Canada has seen a four-year peak in FDI, with the technology, real estate and aerospace sectors enjoying substantial growth. Zara Fennell reports.

Europe can potentially generate 100 times the current amount of energy generated, and produce enough power to power the world until 2050, if it were to maximize land use for onshore wind capacity.

While solar roads have been criticized as impractical and inefficient, a Georgia foundation says they will continue to be part of its research lab for greener highways.

Southeast Asia is poised for a long-overdue and much-needed boom in solar.