Early diagnosis of LOS in preterm infants may be challenging because of the questionable accuracy of blood culture and the common markers of infections, such as C-reactive protein and procalcitonin.

Our study demonstrated for the first time that P-SEP is an accurate biomarker for the diagnosis of LOS in preterm infants and might contribute to the monitoring of infant response to therapeutic interventions. (Read the full article)

Very carefully, experts say, while understanding that federal laws governing special education were not written with online education in mind.

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The founder and chief of his eponymous investment bank traveled to Riyadh to extol the virtues of friendship. He stood out as many of the titans of U.S. finance sat out the kingdom’s signature investment summit amid international outrage over the killing of government critic Jamal Khashoggi.

Very carefully, experts say, while understanding that federal laws governing special education were not written with online education in mind.

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Wilmington, DE – Global Delaware is expanding its Strategic Export Program to Colombia, Ireland, Australia, Singapore and Malaysia, and has hired new international trade representatives in each country to help support export efforts by Delaware companies. The new reps will be on hand to present an overview of export opportunities in their respective countries and […]

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What if you suspect something is wrong with your forecasting process? What if the process is consuming too much time and too many resources, while still delivering unsatisfactory results (lousy forecasts). What can you do about it? This post looks at the first two steps to effecting meaningful forecasting process [...]

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Join us on June 12 as we take an in-depth look at video marketing strategy

The chipmaking sector saw another bout of selling in Asia, wiping at least $11.2 billion in market value, as weak forecasts from Nvidia and Applied Materials added to the latest signals that demand for servers, personal computers and mobile is falling.

Join us on June 12 as we take an in-depth look at video marketing strategy

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A massive sandstorm swept over the capital of Niger, Niamey, on Monday.

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PCIe has been widely adopted in the electronics industry since its first debut in 2003 (PCIe 1.0 standard release) for wide breach of applications, from Data Center Server, Networking, to Mobile, AI/ML, Automotive, IoT, and many others…. It’s a versatile, high-performance, robust, mature interconnect standard with full “backward compatibility” (e.g., a PCIe 3.0 device can still function well in a PCIe 4.0 system) which enables a solid and strong PCIe eco-system in the industry.  While the market, so as the users,  are enjoying the systems, e.g., desktop/laptop, powered (or to be more specific: “bridged”) by PCIe 3.0 since 2010, the industry is pushing hard for the PCIe 4.0 eco-system enablement. Earlier this year, AMD announced it X570 chipset would support the PCIe 4.0 interface and Phison also introduced the world’s first PCIe 4.0 SSD.

On the standard evolution front, the official PCIe 5.0 came out in May 2019, doubling the data rate to 32GT/s from 16GT/s in PCIe 4.0. The PCIe 6.0 standard will be released in 2021 based on the announcement made by PCI-SIG in June’19 with the goal to further double the data rate to 64GT/s with incorporating the PAM4 coding.

PCIe Protocol Evolution

Having said that, is the latest generation of PCIe always desired?  

My answer would be positive. Just like car maker/enthusiast has kept pursuing faster car in the history, there is no doubt that these speed enhancements/upgrades in the electronic world certainly provide a tremendous benefit for especially those applications craving the most throughput, such as Data center, HPC, Networking, Cloud and AI applications.   

But, does every application have to opt for the fastest speed (bandwidth)? My view would be leaning toward “Not really”. Just like we don’t need a 3-second sport car (meaning 0-60mph acceleration < 3s) for daily commute though it would certainly spice some driving fun on the road, but it may not be "the best fit" for most of commuters.

There are applications still well satisfied with PCIe 3.0 (or even older PCIe 2.0) for its best performance and cost balance.  Those applications include, but not limit to, IoT/consumer, Edge AI, SSD (non-enterprise),…etc. They typically need to make trade-off in between the cost, power consumption (especially battery powered), flexibility on changing product features, and time-to-market (TTM). To address such type of market needs, Cadence also offers an PPA (Performance, Power, Area) optimized PCIe 3.0 solution in addition to its high-performance PCIe 4.0 product line.

Cadence PCIe 3.0 PHY Solution (with Multi-Protocol Multi-Link feature)

With leveraging the multi-protocol SerDes implementation, the same Cadence PHY IP support multi-protocol and multi-link operation. Such a multi-protocol enabled PHY gives the SoC developers the optimum flexibility to integrate multiple commonly used interface protocols (e.g., PCIe 3.0 + USB 3.0) with using only a single PHY design.  This would largely save the product development time (faster TTM), reduce the risk of using multiple different PHY instances (for different protocol needs), and with the configurability to enable different product features/protocols.

Some people might say PCIe 3.0 era has gone. I was not quite yet being convinced as I still see its potential to shine a lot of market use cases. What do you think?

More Information

For more information on Cadence's PCIe IP offerings, see our PCI Express page.

For more information on PCIe in general, and on the various PCI standards, see the PCI-SIG website.

Related Posts

• Blog: PCIe Gen4: It’s Official, We’re Compliant
• Blog: The PCIe 4.0 Era Continues at PCI-SIG Developers Conference 2016
• Blog: Cadence PCIe Solutions: Configurable, Compliant, and Low Power

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