for

Method for removing radioactive cesium, hydrophilic resin composition for removing radioactive cesium, method for removing radioactive iodine and radioactive cesium, and hydrophilic resin composition for removing radioactive iodine and radioactive cesium

The present invention intends to provide a method for removing radioactive cesium, or radioactive iodine and radioactive cesium that is simple and low-cost, further does not require an energy source such as electricity, moreover can take in and stably immobilize the removed radioactive substances within a solid, and can reduce the volume of radioactive waste as necessary, and to provide a hydrophilic resin composition using for the method for removing radioactive cesium, or radioactive iodine and radioactive cesium, and the object of the present invention is achieved by using a hydrophilic resin composition containing: at least one hydrophilic resin selected from the group consisting of a hydrophilic polyurethane resin, a hydrophilic polyurea resin, and a hydrophilic polyurethane-polyurea resin each having at least a hydrophilic segment; and a zeolite dispersed therein in a ratio of at least 1 to 200 mass parts relative to 100 mass parts of the hydrophilic resin.




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Process and apparatus for the thermal treatment of refinery sludge

A continuous process for the thermal treatment of a refinery sludge, comprising the following operations: a. drying of the refinery sludge, possibly mixed with pet-coke, at a temperature ranging from 110 to 120° C.; b. gasification of the dried sludge, at a temperature ranging from 750 to 950° C., for a time of 30 to 60 minutes, in the presence of a gas containing oxygen and water vapour, with the associated production of synthesis gas (CO+H2) and a solid residue; c. combustion of the synthesis gas at a temperature ranging from 850 to 1,200° C. and recycling of the combustion products for the drying and gasification phases; and d. inertization of the solid residue, at a temperature ranging from 1,300 to 1,500° C., by vitrification with plasma torches.




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Synthesis of sequestration resins for water treatment in light water reactors

An organic synthesis of materials to achieve removal of low molecular weight ionic species, such as transition metal ions including cobalt, iron, nickel, and zinc, from aqueous solutions. The synthesis includes the steps of providing a cation exchange resin, functionalizing the cation exchange resin using a chloride intermediate to form a sulfonyl chloride resin, and reacting a multi-amine based ligand with the sulfonyl chloride resin to form a sequestration resin. The synthesis further includes the steps of cooling the sequestration resin, and washing and drying the sequestration resin.




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Method for treatment and disposal of pharmaceutical waste

An exemplary system for treatment and disposal of pharmaceutical waste comprises a sealable pail, a stirring device, a sealable bag, a container, an acidic substance, and a denaturant. The sealable pail receives the pharmaceutical waste and the acidic substance. The acidic substance dissolves the pharmaceutical waste, and the stirring device stirs the acidic substance to ensure that the pharmaceutical waste is completely dissolved. The denaturant is added to the dissolved pharmaceutical waste and renders the dissolved pharmaceutical waste safe for transport. The treated pharmaceutical waste is sealed within the sealable pail, and the sealable bag receives the sealed pail and is sealed. The sealed bag is then placed in the container for transport to a disposal facility.




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Apparatus for recovering valuable elements

An apparatus for recovering valuable elements is provided herein. In some embodiments, the apparatus having a conveyor; a container configured to be moved on the conveyor, wherein the container has an open surface; a paper package which contains a mixture containing valuable elements, the paper package being configured to be disposed in the container and to be combusted; a cover that covers the open surface of the container, the cover having an opening for discharging valuable elements vaporized from the mixture; a microwave oven through which the container having the cover and the paper package passes, wherein the microwave oven having a microwave generator and a discharging opening for discharging the valuable elements vaporized from the mixture; and a condenser coupled to the discharge opening, wherein the condenser recovers the valuable elements vaporized from the mixture.




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Decontamination method and apparatus for solid-state material contaminated by radiocesium

A decontamination method of solid-state material contaminated by radiocesium comprising bringing the solid-state material containing radiocesium in contact with a first processing solution and preferably eluting cesium ion from the solid-state material to the liquid phase under the presence of potassium ion or ammonium ion.




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Method for stabilization and removal of radioactive waste and non hazardous waste contained in buried objects

A method and apparatus for the stabilization and safe removal of buried waste that is tested and classified as being transuranic or not transuranic waste and disposed accordingly. The buried waste (usually in vertical pipe units) is enclosed in a casing and ground and mixed with the surrounding soil. This process allows for chemical reactions to occur that stabilizes the mixture. The entire process is contained within the casing to avoid contamination. In situ or external testing is done for radio isotopes to classify the waste. If it is classified as transuranic the waste is removed in a controlled way into a retrieval enclosure and disposed off in drums. If the waste is not transuranic then grout is introduced into the mixture, allowed to set and the resulting monolith is removed and buried in trenches.




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Method and composition for sequestration of arsenic

A method for sequestrating arsenic oxides, comprising forming an insoluble and stable glass incorporating a fully oxidized form of arsenic generated by oxidation of an initial lower oxide of arsenic and stabilization by calcium salt formation. The glass composition for sequestration of arsenic comprises from 50 to 75% silica; from 0.5 to 3% Al2O3; from 1 to 15% MnO; from 5 to 15% CaO; from 1 to 20% As2O5 and from 8 to 14% Na2O, less than four percent of iron oxides, magnesium oxide and other oxides.




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Container and method for facilitating disposal of unused pharmaceutical product

Containers and methods for disposing unused pharmaceutical product are disclosed. Each container (100, 200, 300) may include a container body (104, 204, 304) with an internal chamber (116, 216, 316) for storing pharmaceutical product, along with a cover (124, 224, 324) for selectively limiting access to the chamber (116, 216, 316). An encapsulation component (128, 228, 328) may be selectively disposable within the chamber (116, 216, 316), and may be operable to encapsulate the pharmaceutical product within the container (100, 200, 300). For instance, the encapsulation component (128, 228, 328) may melt and/or flow into contact with the pharmaceutical product and thereafter solidify to encapsulate the pharmaceutical product. The encapsulation component (128, 228, 328) may melt and thereafter solidify between the cover (124, 224, 324) and shell (104, 204, 304) to limit removal of the cover (124, 224, 324) from the shell (104, 204, 304).




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Treatment system for removing halogenated compounds from contaminated sources

A treatment system and a method for removal of at least one halogenated compound, such as PCBs, found in contaminated systems are provided. The treatment system includes a polymer blanket for receiving at least one non-polar solvent. The halogenated compound permeates into or through a wall of the polymer blanket where it is solubilized with at least one non-polar solvent received by said polymer blanket forming a halogenated solvent mixture. This treatment system and method provides for the in situ removal of halogenated compounds from the contaminated system. In one embodiment, the halogenated solvent mixture is subjected to subsequent processes which destroy and/or degrade the halogenated compound.




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Subsurface system for the collection of refuse

The present invention relates to a subsurface refuse collection system comprising an underground bunker (4), a refuse container (3), a deposit bin (1) and a cover (2) with automatic opening and closing which can be powered electrically using a solar system. The container (3) is collected by means of an automated crane (18) with automatic hitching to facilitate collection. The system is equipped with multiple devices to measure volume and weight of the refuse deposited in the deposit bin (1), for the purpose of system monitoring or improvements to the management of truck routes. It also includes a safety device to prevent accidental fails into the underground bunker during collection.




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Processing radioactive waste for shipment and storage

A process for encapsulating a radioactive object to render the object suitable for shipment and/or storage, and including the steps of preparing a plastic material, causing the plastic material to react with a foaming agent, generating a foaming plastic, encapsulating the radioactive object in the foaming plastic, and allowing the foaming plastic to solidify around the radioactive object to form an impervious coating.




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Methods and apparatuses for digesting tissue

Embodiments of this disclosure relate to tissue digestion and, more particularly, to methods and apparatuses for varying the number, size, and/or location of one or more tissue compartments within a digestive fluid vessel. Some examples include partitions that may be selectively positioned within a vessel (and may be selectively removable from the vessel) to create one or more tissue compartments. The partitions may be positioned, repositioned and rearranged within the vessel to form one or more tissue compartments. The partitions may be solid or include apertures, and may be oriented in horizontally and/or vertically. Alternate embodiments include one or more selectively closeable apertures that permit digestive fluid to circulate along alternate pathways, which can permit tissue digestion with reduced digestive fluid levels. Still further embodiments include baskets that are selectively positionable within the tissue digester. The baskets may also include one or more selectively positionable and/or repositionable partitions.




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Method and apparatus for applying plasma particles to a liquid and use for disinfecting water

The invention provides a method and apparatus for creating plasma particles and applying the plasma particles to a liquid. Liquid feedstock (e.g., water and/or hydrocarbons mixed with biomass) is pumped through a pipeline; the single-phase stream is then transformed into a biphasic liquid-and-gas stream inside a chamber. The transformation is achieved by transitioning the stream from a high pressure zone to a lower-pressure zone. The pressure drop may occur when the stream further passes through a device for atomizing liquid. Inside the chamber, an electric field is generated with an intensity level that exceeds the threshold of breakdown voltage of the biphasic medium leading to a generation of a plasma state. Furthermore, the invention provides an energy-efficient highly adaptable and versatile method and apparatus for sanitizing water using plasma particles to inactivate biological agents contaminating water.




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Process for eliminating or reducing persistent organic pollutants contained in particles

A treatment process of persistent organic pollutants contained in particles is provided. Said process includes reacting persistent organic pollutant in particles under hydrothermal conditions in the presence of Fe2+ and Fe3+. Several beneficial effects can be achieved, including 1) no other additive is needed during the reaction process; 2) Fe2+ and Fe3+ are safe, cheap and extensive sources; 3) because Fe2+ and Fe3+ are dissolved, they can fully disperse into particles, and fully contact can be achieved, thus obtaining a decomposition rate no less than 70% of the persistent organic pollutants is under subcritical conditions.




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Treatment method for spent caustic soda

An embodiment of the present invention relates to a method for treating spent caustic soda generated from an oil refinery process, a petrochemical process, etc. through a process in which a series of treatment steps are integrated, wherein the method can constitute a process under mild conditions excluding high temperature and/or high pressure conditions and can be advantageous to a post treatment process since the amount of by-products is small.




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Method and apparatus for home medication disposal

Method and apparatus for disposal of used home medication which comprises an outer container being sealable and disposable containing an inner water-soluble packet/bag of gelling agent and coloring agent for stabilizing the used medication wherein the outer container comprises a foil-type container having a double sealing mechanism including a first zip lock sealing portion and a second self-sticking sealing portion to insure that the contents are safely sealed prior to disposal in a conventional home solid waste disposal unit.




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Method for limiting the degassing of tritiated waste issued from the nuclear industry

A method and device for limiting the degassing of tritiated waste issued from the nuclear industry are provided. The method reduces an amount of generated tritiated hydrogen (T2 or HT) and/or tritiated water (HTO or T2O) including at least one piece of tritiated waste from the nuclear industry. The method includes placing the package in contact with a mixture including manganese dioxide (MnO2) combined with a component that includes silver; and placing the package in contact with a molecular sieve.




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Method and apparatus for distributing objects

A method and apparatus for distributing objects. In one embodiment, the method comprises computing a modulus operand based on a number of objects to be distributed and a number of objects pertaining to a first category; computing a modulus operation based on a number of distributed objects and the modulus operand; and distributing a first object or a second object based on a result of computing the modulus operation.




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Efficient complex multiplication and fast fourier transform (FFT) implementation on the ManArray architecture

Efficient computation of complex multiplication results and very efficient fast Fourier transforms (FFTs) are provided. A parallel array VLIW digital signal processor is employed along with specialized complex multiplication instructions and communication operations between the processing elements which are overlapped with computation to provide very high performance operation. Successive iterations of a loop of tightly packed VLIWs are used allowing the complex multiplication pipeline hardware to be efficiently used. In addition, efficient techniques for supporting combined multiply accumulate operations are described.




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Efficient computation of driving signals for devices with non-linear response curves

Apparatus comprising an input connected to receive an input signal, a lookup table comprising a plurality of input entries and first and second output entries for each input entry. The look up table receives the input signal and returns a lower input entry, an upper input entry, the second output entry for the lower input entry, and the first output entry for the upper input entry. A first subtractor subtracts the lower input entry from the input signal to produce a first difference. A second subtractor subtracts the input signal from the upper input entry to produce a second difference. First and second multipliers multiply the first and second differences by the first output entry for the upper input entry and the second output entry for the lower input entry, respectively, to produce first and second products. An adder adds the first and second products to produce an output signal.




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High speed and low power circuit structure for barrel shifter

A barrel shifter uses a sign magnitude to 2's complement converter to generate decoder signals for its cascaded multiplexer selectors. The sign input receives the shift direction and the magnitude input receives the shift amount. The sign magnitude to 2's complement converter computes an output result as a 2's complement of the shift amount using the shift direction as a sign input, assigns a first portion (most significant bit half) of the output result to a first decoder signal, and assigns a second portion (least significant bit half) of the output result to a second decoder signal. This encoding scheme allows the decoder circuits to be relatively simple, for example, 3-to-8 decoders for an implementation adapted to shift a 64-bit operand value rather than the 4-to-9 decoder required in a conventional barrel shifter, leading to faster operation, less area, and reduced power consumption.




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Individual-specific information generation apparatus and individual-specific information generation method

The generation of individual-specific information having a good reliability and uniqueness is made possible with a little circuit scale. For this purpose, in an individual-specific information generation apparatus, a plurality of digital circuits are in the same circuit configuration. Each of the digital circuits outputs a fixed or a random number output value individually without their output with respect to a certain input being determined unambiguously among the digital circuits. In each of the digital circuit, an order is defined in advance. A random number judgment unit judges whether the output value is a random value or fixed, for each of the plurality of digital circuits. An individual-specific information generation unit generates the individual-specific information based on information of the order defined in the digital circuit judged by the random number judgment unit as having a fixed output value among the plurality of digital circuits and the output value.




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Phase-to-amplitude converter for direct digital synthesizer (DDS) with reduced AND and reconstructed ADD logic arrays

A sine wave generator for a Direct Digital Synthesizer (DDS) converts a digital phase input into a digital sine wave output. Sine values and slopes are stored in read-only memory (ROM) for coarse upper phase bits in a first quadrant. A quadrant folder and phase splitter reflects and inverts values from the first quadrant to generate amplitudes for all four quadrants. Each sine value and slope is stored for a range of lower phase bits. A Delta bit separates upper and lower phase bits. Delta conditionally inverts the lower phase bits, the sine value, and the final polarity. A reduced AND logic array multiplies the slope by the conditionally inverted lower phase bits. A reconstructed ADD logic array then adds the conditionally inverted sine value. The conditionally inverted polarity is added to generate the final sine value. Sine generation logic is streamlined with conditional inversion based on the Delta bit.




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System and method for electro-cardiogram (ECG) medical data collection wherein physiological data collected and stored may be uploaded to a remote service center

A data collection unit obtains physiological data from a subject interface on a subject. The subject interface can be connected to the data collection unit. When the subject interface is connected to the data collection unit, subject interface contacts on the subject interface make contact with data collection unit contacts on the data collection unit. Some of the data collection unit contacts are for communicating physiological data from the subject interface to the data collection unit. Some of the contacts are for powering the data collection unit upon the subject interface being connected to the data collection unit and for powering down the data collection unit upon the subject interface being disconnected from the data collection unit.




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Method and apparatus for a geographically determined Jewish religious clock and electrical device combination with holiday and preference modes

An independently functioning or centrally controlled wall light switch is configured to operate in normal mode and a Jewish holiday mode wherein the state of the light is fixed, regardless of the user's physical manipulation of the light switch. The control system automatically activates holiday mode by combining a geographically determined Jewish religious clock executed by software and hardware that utilizes the current time, date and geographical location of the apparatus in accordance with the Jewish definition of time and laws for calculating numerous religiously significant shifting daily points in time. The control system further incorporates several energy saving and preference modes by utilizing a particular day's calculated religious points in time in conjunction with holiday behavior patterns common to most Jewish families to provide the user with a greatly simplified means of programming an automatically adjusting on/off light timer and dimming overlay functionality during holiday mode.




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Fast filtering for a transceiver

Techniques for fast filtering for a transceiver are presented. A multidimensional filter processor component (MDFPC) can perform configurations and adaptations of multiple digital filters of a transceiver. The MDFPC can treat multiple, separate filters of a transceiver as a single larger multidimensional filter, and jointly update the multiple filters in a single adaptation operation instead of performing multiple adaptation operations on multiple filters. To facilitate multidimensional filter adaptation, the MDFPC can manage respective cross-correlations associated with the inputs of the filters. The MDFPC can facilitate multidimensional filter adaptation by performing multidimensional filter adaptation in the frequency domain, wherein the adaptation can be performed in parallel for multiple frequency sub-channels. For each frequency sub-channel, the MDFPC can perform a filter adaptation, wherein respective filter adaptation matrices can be generated for respective frequency sub-channels to perform the update to facilitate managing different cross-correlations associated with different frequency sub-channels.




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Data compression for direct memory access transfers

Memory system operations are extended for a data processor by DMA, cache, or memory controller to include a DMA descriptor, including a set of operations and parameters for the operations, which provides for data compression and decompression during or in conjunction with processes for moving data between memory elements of the memory system. The set of operations can be configured to use the parameters and perform the operations of the DMA, cache, or memory controller. The DMA, cache, or memory controller can support moves between memory having a first access latency, such as memory integrated on the same chip as a processor core, and memory having a second access latency that is longer than the first access latency, such as memory on a different integrated circuit than the processor core.




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Method, apparatus and instructions for parallel data conversions

Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding to a first architectural register. A functional unit operates responsive to a control signal, to convert a first packed first format value selected from a set of packed first format values into a plurality of second format values. Each of the first format values has a plurality of sub elements having a first number of bits The second format values have a greater number of bits. The functional unit stores the plurality of second format values into an architectural register.




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Method, apparatus and instructions for parallel data conversions

Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding to a first architectural register. A functional unit operates responsive to a control signal, to convert a first packed first format value selected from a set of packed first format values into a plurality of second format values. Each of the first format values has a plurality of sub elements having a first number of bits The second format values have a greater number of bits. The functional unit stores the plurality of second format values into an architectural register.




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Systems and methods for anti-causal noise predictive filtering in a data channel

Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes a data detector circuit. The data detector circuit includes an anti-causal noise predictive filter circuit and a data detection circuit. In some cases, the anti-causal noise predictive filter circuit is operable to apply noise predictive filtering to a detector input to yield a filtered output, and the data detection circuit is operable to apply a data detection algorithm to the filtered output derived from the anti-causal noise predictive filter circuit.




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Recursive type-IV discrete cosine transform system

A recursive type-IV discrete cosine transform system includes a first permutation device, a recursive type-III discrete cosine/sine transform device, a cosine/sine factor generation device, a recursive type-II discrete cosine/sine transform device, a second permutation device. The first permutation device performs two-dimensional order permutation operation on N digital signals for generating N two-dimensional first temporal signals. The recursive type-III discrete cosine/sine transform device repeats a type-III discrete cosine/sine transform for generating second temporal signals. The cosine/sine factor generation device sequentially performs cosine/sine factor multiplication and corresponding addition operations for generating third temporal signals. The recursive type-II discrete cosine/sine transform device repeats a type-II discrete cosine/sine transform for generating fourth temporal signals. The second permutation device performs a one-dimensional order permutation operation for generating N one-dimensional output signals. The N one-dimensional output signals are obtained by performing a type-IV discrete cosine transform on the N digital input signals.




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Systems and methods for solving computational problems

Solving computational problems may include generating a logic circuit representation of the computational problem, encoding the logic circuit representation as a discrete optimization problem, and solving the discrete optimization problem using a quantum processor. Output(s) of the logic circuit representation may be clamped such that the solving involves effectively executing the logic circuit representation in reverse to determine input(s) that corresponds to the clamped output(s). The representation may be of a multiplication circuit. The discrete optimization problem may be composed of a set of miniature optimization problems, where each miniature optimization problem encodes a respective logic gate from the logic circuit representation. A multiplication circuit may employ binary representations of factors, and these binary representations may be decomposed to reduce the total number of variables required to represent the multiplication circuit.




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Method, apparatus and instructions for parallel data conversions

Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding to a first architectural register. A functional unit operates responsive to a control signal, to convert a first packed first format value selected from a set of packed first format values into a plurality of second format values. Each of the first format values has a plurality of sub elements having a first number of bits The second format values have a greater number of bits. The functional unit stores the plurality of second format values into an architectural register.




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Method, apparatus and instructions for parallel data conversions

Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding to a first architectural register. A functional unit operates responsive to a control signal, to convert a first packed first format value selected from a set of packed first format values into a plurality of second format values. Each of the first format values has a plurality of sub elements having a first number of bits The second format values have a greater number of bits. The functional unit stores the plurality of second format values into an architectural register.




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Distributed processing system and method for discrete logarithm calculation

Distributed processing system and method for discrete logarithm calculation. The speed and resource efficiency of discrete logarithm calculation may be improved by allowing a plurality of operation agents to distributively process an operation of generating a modulo multiplication auxiliary table, an operation of generating a pre-calculation table, and an operation of searching for an answer by applying an iterated function for discrete logarithm calculation in a discrete logarithm calculation operation using the pre-calculation table.




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Systems and methods for medium access control

Techniques for medium access control. Some techniques include receiving, at a first computing device, a solicitation for at least a first medium access request that specifies at least one time period for transmitting the first medium access request to the second computing device; encoding the first medium access request at least in part by using a compressive sensing encoding technique to obtain a first encoded medium access request; and transmitting the first encoded medium access request to the second computing device during the at least one time period specified in the received solicitation.




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False lock detection for physical layer frame synchronization

Systems, devices, processors, and methods are described which may be used for the reception of a wireless broadband signal at a user terminal from a gateway via a satellite. A wireless signal may include a series of physical layer frames, each frame including a physical layer header and payload. The received signal is digitized and processed using various novel physical layer headers and related techniques to synchronize the physical layer frames and recover data from physical layer headers for purposes of demodulation and decoding.




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Proxy calculation system, proxy calculation method, proxy calculation requesting apparatus, and proxy calculation program and recording medium therefor

A function f(x) is calculated with a calculating apparatus that makes a correct calculation with a low probability. Provided that G and H are cyclic groups, f is a function that maps an element x of the group H into the group G, X1 and X2 are random variables whose values are elements of the group G, x1 is a realized value of the random variable X1, and x2 is a realized value of the random variable X2, an integer calculation part calculates integers a' and b' that satisfy a relation a'a+b'b=1 using two natural numbers a and b that are relatively prime. A first randomizable sampler is capable of calculating f(x)bx1 and designates the calculation result as u. A first exponentiation part calculates u'=ua. A second randomizable sampler is capable of calculating f(x)ax2 and designates the calculation result as v. A second exponentiation part calculates v'=vb. A determining part determines whether u'=v' or not. A final calculation part calculates ub'va' in a case where it is determined that u'=v'.




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Using memory access times for random number generation

The disclosure is related systems and methods for using operation durations of a data storage medium to generate random numbers. In one embodiment, a device may comprise a random number generator circuit configured to store a value representing a duration of an operation on the data storage medium, and generate a random number based on the value. Another embodiment may be a method comprising recording durations of access operations to a data storage medium, and generating a random number based on the durations.




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Method and apparatus for performing logical compare operations

A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, instruction decode logic decodes instructions for an execution unit to operate on packed data elements including logical comparisons. A register file including 128-bit packed data registers stores packed single-precision floating point (SPFP) and packed integer data elements. The logical comparisons may include comparison of SPFP data elements and comparison of integer data elements and setting at least one bit to indicate the results. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting the at least one bit, which in turn may be utilized by a branching unit in response to a branch instruction. Alternatively, the branch support actions may include branching to an indicated target code location.




for

Method and apparatus for performing logical compare operations

A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, instruction decode logic decodes instructions for an execution unit to operate on packed data elements including logical comparisons. A register file including 128-bit packed data registers stores packed single-precision floating point (SPFP) and packed integer data elements. The logical comparisons may include comparison of SPFP data elements and comparison of integer data elements and setting at least one bit to indicate the results. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting the at least one bit, which in turn may be utilized by a branching unit in response to a branch instruction. Alternatively, the branch support actions may include branching to an indicated target code location.




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System and method of operating a computing device to perform memoization including transforming input/output parameters to reduce redundancies and efficiently cache data

A system (200) and a method (100) of operating a computing device to perform memoization are disclosed. The method includes determining whether a result of a function is stored in a cache and, if so, retrieving the result from the cache and, if not, calculating the result and storing it in the cache. The method (100) includes transforming (104) by the computing device at least one selected from the input parameters and the output parameters of the function, the transforming being based on an analysis of the function and its input arguments to establish whether or not there is a possible relationship reflecting redundancy among the input parameters and output parameters of the function. The transforming may include at least one of: use of symmetry, scaling, linear shift, interchanging of variables, inversion, polynomial and/or trigonometric transformations, spectral or logical transformations, fuzzy transformations, and systematic arrangement of parameters.




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Method and apparatus for generating and transmitting code sequence in a wireless communication system

A method of generating a code sequence in a wireless communication system is disclosed. More specifically, the method includes recognizing a desired length of the code sequence, generating a code sequence having a length different from the desired length, and modifying the length of the generated code sequence to equal the desired length. Here, the step of modifying includes discarding at least one element of the generated code sequence or inserting at least one null element to the generated code sequence.




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Methods for generating multi-level pseudo-random sequences

A method for generating multi-level (or multi-bit) pseudo-random sequences is disclosed. This embodiment relates to communication systems, and more particularly to generating multi-level pseudo random symbol sequence. Present day systems do not employ effective mechanisms for generation of multi level PRBS in order to increase the data communication rates. Further, these systems do not cover all the possible transitions for the outputs of the system. The proposed system employs mechanisms in order to generate PRBS signals for producing multi levels signals to the electronic components. The mechanism employs alternate bit tapping techniques. In the alternate bit tapping technique, bits are tapped alternatively to determine the current state and the next state of the system. In addition, the mechanism also covers all the possible states of the output vector with transitions between the output states. This ensures that high data rates are obtained for a given bandwidth of operation.




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Custom configuration for a calculator based on a selected functionality

Examples disclose a computing system comprising a computing device with a display surface to detect a selection of functionality from a list of functionalities to be disabled on a calculator. Further, the computing device creates a custom configuration based on the selected functionality. Additionally, the examples also disclose a calculator with a processor to integrate the custom configuration, the custom configuration restricts the selected functionality on the calculator.




for

Method and apparatus for performing logical compare operation

A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, instruction decode logic decodes instructions for an execution unit to operate on packed data elements including logical comparisons. A register file including 128-bit packed data registers stores packed single-precision floating point (SPFP) and packed integer data elements. The logical comparisons may include comparison of SPFP data elements and comparison of integer data elements and setting at least one bit to indicate the results. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting the at least one bit, which in turn may be utilized by a branching unit in response to a branch instruction. Alternatively, the branch support actions may include branching to an indicated target code location.




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Polymerization reactor for producing super absorbent polymers and method of producing super absorbent polymers using the polymerization reactor

The present invention provides a polymerization reactor for producing a super absorbent polymer comprising: a reaction unit; a monomer composition supply unit being connected to the reaction unit and supplying a monomer composition solution containing a monomer, a photoinitiator, and a solvent; an agitating shaft extended in the reaction unit from one end of the reaction unit connected to the monomer composition supply unit to the other end of the reaction unit; a plurality of agitating blades installed around the agitating shaft; and a light irradiation unit providing light to the monomer composition solution furnished from the monomer composition supply unit, and a method of producing super absorbent polymers by using the same.




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Method for preparing a degradable polymer network

The present invention relates to methods for preparing a degradable polymer network. The methods for preparing a degradable polymer network comprise a) preparing a polymer composition comprising monomers of cyclic carbonates and/or cyclic esters and/or linear carbonates and/or linear esters and/or cyclic ethers and/or linear hydroxycarboxylic acids at a temperature between 20° C. and 200° C.; b) adding a cross-linking reagent comprising at least one double or triple C—C bond and/or a cross-linking radical initiator; c) processing the polymer composition (that contains the crosslinking reagent into a desired shape; d) Crosslinking by irradiating the mixture. Further, the present invention relates to a degradable polymer network. Furthermore, the present invention relates to the use of the degradable polymer network.




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Thiol-vinyl and thiol-yne systems for shape memory polymers

A variety of biomedical devices are provided which include thiol-ene or thiol-yne shape memory polymers. The biomedical devices of the invention are capable of exhibiting shape memory behavior at physiological temperatures and may be used in surgical procedures. Methods of making the devices of the invention are also provided.