The Andhra Pradesh government has today informed that those evacuated from villages affected by the gas leak from a chemical plant in Visakhapatnam could not return till the impact of the chemical was...

Assam has 'temporarily' shut down the Guwahati Medical College and Hospital (GMCH) - the biggest medical college of the northeast and the B Borooah Cancer Institute in Guwahati after four coronavirus...

From home workouts and remote medical consultations to online classes and even virtual dating, technology today is ensuring that our lives go on, albeit from behind the screen

The CSIR has already tied up with Cadila Pharmaceuticals Ltd to evaluate Mycobacterium W (Mw) for faster recovery of hospitalised COVID-19 patients and minimise the spread of disease.

Former Chhattisgarh chief minister Ajit Jogi, 74, was admitted in a private hospital here on Saturday after he suffered a cardiac arrest, doctors said, adding that his condition is critical.

Rafael Nadal has said he views the rest of this year as "practically lost" for tennis and would even be relieved if the sport returned as normal at the start of 2021.

Mumbai Police asked residents to respect lockdown rules - and enlisted the help of some popular bands to do so.

RBI releases Framework for dealing with Domestic Systemically Important Banks (D-SIBs)

Amber Solutions, an IoT product company that sells smart outlets, switches and circuit breakers closed Series A Preferred Stock round of financing that equals $3.3M in gross proceeds. Amber will use the funds to support the commercial development of Amber's core technologies.

One of Amber’s product is solid-state circuit interrupter (GFCI) that basically stops harmful levels of electricity from passing through a person. It operates as a safety device alerting the homeowner of electrocution incidents in real time.

Amber Solutions’ core markets are builders that prepare smart home/smart building ready infrastructure, certified electrical contractors or remodelers, and electrical manufacturers.

Other latest funding news include Owlet’s $24M Series B, Axonize’s $6M Series A round and addition of Deutsche Telekom as its strategic investor, and $30M Series B raised by Palo Alto-based Armis.

Decades after Bhopal, lack of law enforcement and political will plagues Indian industry

The gas leak at a chemical factory in Visakhapatnam will immediately remind many in India and beyond of the 1984 Bhopal disaster, widely considered the world’s worst industrial disaster.

So far, the scale of the tragedies are very different. Eleven people are confirmed to have died in Visakhapatnam – but with hundreds hospitalised and thousands affected, there are fears the toll will rise. In Bhopal, 4,000 people died within days of the toxic gas leak from a pesticide plant in the central Indian city, and thousands more in the following years.

Gas from LG Polymers plant in Andhra Pradesh leaked into nearby homes while families slept

• Analysis: 36 years after Bhopal, another case of history repeating

At least 11 people have been killed and hundreds more taken to hospital after a gas leak at a chemical factory in south-east India.

A plastics plant owned by South Korea’s LG Corp started leaking styrene into the surrounding residential area at about 3am on Thursday. Some people were enveloped as they slept, while others collapsed in the streets as they tried to flee the area on the outskirts of the coastal city of Visakhapatnam.

Related: 'Bhopal’s tragedy has not stopped': the urban disaster still claiming lives 35 years on

Everyone within 5km of the plant in Andhra Pradesh told to leave over fear of repeat of accident that has left at least 11 dead

Indian officials have evacuated more people from the area around a chemical plant in the south of the country that leaked toxic gas, killing at least 11 people and sickening hundreds more.

There was confusion about whether the wider evacuation orders were sparked by a renewed leak at the LG Chem factory in Andhra Pradesh, or by the fear that rising temperatures at the plant could lead to another leak.

Related: India's chemical plant disaster: another case of history repeating itself

Related: 'Bhopal’s tragedy has not stopped': the urban disaster still claiming lives 35 years on

Hi Team,

Problem Statement:In hierarchical layout, I want to get BBOX of particular layer without actually flattening the layout.

Description:The layer can be at any hierarchical depth i.e both from PCELL or shapes but at top level if they are overlapping then I want the merged BBOX.

Now, I am able to get BBOX of all the shapes present at different hierarchy.But i finding issue in merging BBOX.

Please can help me on the same issue as I require efficient way to merge the BBOX because list containing the BBOX is huge.

Thanks in advance.

Regrads,

Prasanna

Imagine you are on a vacation with your family, and suddenly, your phone starts buzzing. You pick it up and what are you looking at is a bunch of pending, unanswered e-mails. You start recollecting the checklist you had made before taking off only to realize that you haven’t put on the automatic replies! (read more)

I want to write a transition coverage on an enumeration. One of the parts of that transition is a queue of the enum. I construct this queue in my constructor. Considering the example below, how would one go about it.

In my coverage bin I can create a range like this A => [queue1Enum[0]:queue1Enum[$]] => [queue2Enum[0]:queue2Enum[$]]. But I only get first and last element then.

typedef enum { red, d_green, d_blue, e_yellow, e_white, e_black } Colors;
 Colors dColors[$];
 Colors eColors[$];
 Lcolors = Colors.first();
 do begin
  if (Lcolors[0].name=='d') begin
   dColors.push_back(Lcolors);
  end
  if (Lcolors[0].name=='e') begin
   eColors.push_back(Lcolors);
  end
 end while(Lcolors != Lcolors.first())

 covergroup cgTest with function sample(Colors c);
   cpTran : coverpoint c{
      bins t[] = (red => dColors =>eColors);   
   }
 endgroup

The complexity and size of mixed-signal designs in wireless, power management, automotive, and other fast growing applications requires continued advancements in a mixed-signal verification methodology. An SoC, in these fast growing applications, incorporates a large number of analog and mixed-signal (AMS) blocks/IPs, some acquired from IP providers, some designed, often concurrently. AMS IP must be verified independently, but this is not sufficient to ensure an SoC will function properly and all scenarios of interaction among many different AMS IP blocks at full chip / SoC level must be verified thoroughly. To reduce an overall verification cycle, AMS IP and SoC verification teams must work in parallel from early stages of the design. Easier said than done! We will outline a methodology than can help.

AMS designers verify their IP meets required specifications by running a testbench they develop for standalone / out of-context verification. Typically, an AMS IP as analog-centric, hierarchal design in schematic, composed of blocks represented by transistor, HDL and behavioral description verified in Virtuoso® Analog Design Environment (ADE) using Spectre AMS Designer simulation. An SoC verification team typically uses UVM SystemVerilog testbech at full chip level where the AMS IP is represented with a simple digital or real number model running Xcelium /DMS simulation from the command line.

Ideally, AMS designers should also verify AMS IP function properly in the context of full-chip integration, but reproducing an often complex UVM SystemVerilog testbench and bringing over top-level design description to an analog-centric environment is not a simple task.

Last year, Cadence partnered with Infineon on a project with a goal to automate the reuse of a top-level testbench in AMS verification. The automation enabled AMS verification engineers to automatically configure setup for verification runs by assembling all necessary options and files from the AMS IP Virtuoso GUI and digital SoC top-level command line configurations. The benefits of this method were:

• AMS verification engineers did not need to re-create complex stimuli representing interaction of their IP at the top level
• Top-level verification stays external to the AMS IP verification environment and continues to be managed by the SoC verification team, but can be reused by the AMS IP team without manual overhead
• AMS IP is verified in-context and any inconsistencies are detected earlier in the verification process
• Improved productivity and overall verification time

For more details, please see Infineon’s CDNLlive presentation.

This blog discusses key features of concurrently editing a hierarchical cellview.(read more)

Technical Cyber Security Alert TA07-163A - Microsoft has released updates that address critical vulnerabilities in Microsoft Windows, Windows Secure Channel, Internet Explorer, Win32 API, Windows Mail and Outlook Express. Exploitation of these vulnerabilities could allow a remote, unauthenticated attacker to execute arbitrary code or cause a denial of service on a vulnerable system.

The Juniper SRX suffers from a dual-homed swapfile overflow error that can cause denial of service conditions.