A continuous process for the thermal treatment of a refinery sludge, comprising the following operations: a. drying of the refinery sludge, possibly mixed with pet-coke, at a temperature ranging from 110 to 120° C.; b. gasification of the dried sludge, at a temperature ranging from 750 to 950° C., for a time of 30 to 60 minutes, in the presence of a gas containing oxygen and water vapour, with the associated production of synthesis gas (CO+H2) and a solid residue; c. combustion of the synthesis gas at a temperature ranging from 850 to 1,200° C. and recycling of the combustion products for the drying and gasification phases; and d. inertization of the solid residue, at a temperature ranging from 1,300 to 1,500° C., by vitrification with plasma torches.

Techniques for disposing of one or more toxic materials, such as coal waste (e.g., fly ash, sludge, etc.), include incorporating the toxic materials into artificial feldspar or forming artificial feldspar from the toxic material(s). The artificial feldspar may be used to form an artificial aggregate, which may be used in a construction material, as road base, as a fill material or for any other suitable purpose. Artificial aggregates that are formed from toxic materials are also disclosed, as are construction materials that include such artificial aggregates.

A process for encapsulating a radioactive object to render the object suitable for shipment and/or storage, and including the steps of preparing a plastic material, causing the plastic material to react with a foaming agent, generating a foaming plastic, encapsulating the radioactive object in the foaming plastic, and allowing the foaming plastic to solidify around the radioactive object to form an impervious coating.

A treatment process of persistent organic pollutants contained in particles is provided. Said process includes reacting persistent organic pollutant in particles under hydrothermal conditions in the presence of Fe2+ and Fe3+. Several beneficial effects can be achieved, including 1) no other additive is needed during the reaction process; 2) Fe2+ and Fe3+ are safe, cheap and extensive sources; 3) because Fe2+ and Fe3+ are dissolved, they can fully disperse into particles, and fully contact can be achieved, thus obtaining a decomposition rate no less than 70% of the persistent organic pollutants is under subcritical conditions.

The cost relating to a reduction in volume and storage of a waste resin including a radioactive nuclide is reduced. In an aspect of the invention, a volume reduction processing system 1000 is provided. The volume reduction processing system 1000 includes a radioactivity meter 102 that measures the radioactivity of a processing target resin, a volume reduction processing device 110 that carries out a heating process, and an oxidation process using oxygen plasma P on the processing target resin, and a process stopping point computation unit 180 that determines a process stopping point for carrying out a volume reduction process on the processing target resin with the volume reduction processing device as far as a volume reduction target value. The volume reduction processing device 110 stops at least one process of the heating process and oxidation process on the process stopping point being reached.

Disclosed is a processor that is able to efficiently execute DFT operations without having part of a basic operational circuit idle even during non-DFT-operation processing. The processor (1) has an operational means (operation unit) (2) and a control means (control unit) (3). The operation means (2) has a plurality of shift addition-and-subtraction means connected such that CORDIC (COordinate Rotation DIgital Computer) operations can be executed. The shift adding-and-subtracting means also execute shift addition-and-subtraction processing of butterfly operations that process shift addition-and-subtraction for one stage or more. The control means (3) instructs the operation means (2) to execute either CORDIC operations or butterfly operations, based on a plurality of data received from the outside.

A random number generation method and apparatus using a low-power microprocessor is provided. In the random number generation method, a low-power microprocessor determines whether external power is supplied to a random number generator. The low-power microprocessor updates an internal state of the random number generator based on a first scheme if it is determined that the external power is supplied to the random number generator. The low-power microprocessor updates the internal state of the random number generator based on a second scheme different from the first scheme if it is determined that the external power is not supplied to the random number generator.

Apparatus and method for processing linear systems of equations and finding a n×1 vector x satisfying Ax=b where A is a symmetric, positive-definite n×n matrix corresponding to n×n predefined high-precision elements and b is an n1 vector corresponding to n predefined high-precision elements. A first iterative process generates n low-precision elements corresponding to an n×1 vector xl satisfying Alxl=bl where Al, bl are elements in low precision. The elements are converted to high-precision data elements to obtain a current solution vector x. A second iterative process generates n low-precision data elements corresponding to an n×1 correction vector dependent on the difference between the vector b and the vector product Ax. Then there is produced from the n low-precision data elements of the correction vector respective high-precision data elements of an n×1 update vector u. The data elements of the current solution vector x are updated such that x=x+u.

Distributed processing system and method for discrete logarithm calculation. The speed and resource efficiency of discrete logarithm calculation may be improved by allowing a plurality of operation agents to distributively process an operation of generating a modulo multiplication auxiliary table, an operation of generating a pre-calculation table, and an operation of searching for an answer by applying an iterated function for discrete logarithm calculation in a discrete logarithm calculation operation using the pre-calculation table.

The invention relates to a radiation curable composition for taking a dental impression comprising (A) a cationically hardenable compound comprising at least one aziridine moiety, and (B) a radiation sensitive starter, the radiation sensitive starter comprising an onium salt, a ferrocenium salt, a combination or mixture thereof.

A process for the preparation of polymer lattices comprising polymer nanoparticles by a photo-initiated heterophase polymerization includes preparing a heterophase medium comprising a dispersed phase and a continuous phase and at least one of at least one surfactant, at least one photoinitiator, and at least one polymerizable monomer. The at least one polymerizable monomer is polymerized by irradiating the heterophase medium with electromagnetic radiation so as to induce a generation of radicals. The at least one photoinitiator is selected from compounds comprising at least one phosphorous oxide group (P═O) or at least one phosphorous sulfide (P═S) group. The irradiating of the heterophase medium is effected so that a ratio of an irradiated surface of the heterophase medium to a volume of the heterophase medium is at least 200 m−1.

A process for the preparation of modified polymers by a photo-initiated polymerization includes preparing a polymerization medium comprising at least one photoinitiator comprising at least one phosphorous oxide (P═O) group or at least one phosphorous sulfide (P═S) group, and at least one polymerizable monomer. The at least one polymerizable monomer is polymerized by irradiating the polymerization medium with electromagnetic radiation so as to induce a generation of radicals so as to obtain a polymer. The polymer is modified by irradiating the polymer with electromagnetic radiation so as to induce a generation of radicals from the polymer in a presence of at least one modifying agent.

The present invention provides a process for producing electret fine particles or coarse powder that can be uniformly electrified and exhibits excellent electrophoretic properties. Specifically, the present invention relates to the production processes (1) and (2) below:(1) A process for producing electret fine particles, comprising emulsifying a fluorine-containing material that contains a vinylidene fluoride-hexafluoropropylene-tetrafluoroethylene terpolymer in a liquid that is incompatible with the fluorine-containing material to obtain emulsified particles; and subjecting the emulsified particles to electron ray irradiation, radial ray irradiation, or corona discharge treatment.(2) A process for producing electret coarse powder, comprising subjecting a resin sheet containing a vinylidene fluoride-hexafluoropropylene-tetrafluoroethylene terpolymer to electron ray irradiation, radial ray irradiation, or corona discharge treatment to process the resin sheet into an electret resin sheet; and pulverizing the electret resin sheet.

A method includes configuring a processing circuit to perform: receiving a control word for an I/O operation, forwarding a transport command control block (TCCB) from the channel subsystem to a control unit, gathering data associated with the I/O operation, and transmitting the gathered data to the control unit in the I/O processing system. Gathering the data includes accessing entries of a list of storage addresses that collectively specifying the data. Based on an entry of the list comprising a not-set first flag and a corresponding first storage address, gathering data from a corresponding storage location, and based on an entry of the list comprising a set first flag and a corresponding second storage address, obtaining a next entry of the list from a second storage location.

Method and system for an adapter is provided. The adapter includes a plurality of function hierarchies, with each function hierarchy including a plurality of functions and each function being associated with an event. The adapter also includes a plurality of processors for processing one or more events generated by the plurality of functions. The adapter further includes a first set of arbitration modules, where each arbitration module is associated with a function hierarchy and receives interrupt signals from the functions within the associated function hierarchy and selects one of the interrupt signals. The adapter also includes a second set of arbitration modules, where each arbitration module receives processor specific interrupt signals and selects one of the interrupt signals for processing an event associated with the selected interrupt signal.

In an interrupt control method of a multicore processor system including cores, a cache coherency mechanism, and a device, a first core detecting an interrupt signal from the device writes into an area prescribing an interrupt flag in the cache memory of the first core, first data indicating detection of the interrupt signal, and notifies the other cores of an execution request for interrupt processing corresponding to the interrupt signal, consequent to the cache coherency mechanism establishing coherency among at least cache memories of the other cores when the first data is written; and a second core different from the first core, maintaining the first data written as the interrupt flag, and notified of the execution request executes the interrupt processing, and writes over the area prescribing the interrupt flag written in the cache memory of the second core, with second data indicating no-detection of the interrupt signal.

A data processing apparatus has a plurality of processors and a plurality of interrupt interfaces each for handling interrupt requests from a corresponding processor. An interrupt distributor controls routing of interrupt requests to the interrupt interfaces. A shared interrupt request is serviceable by multiple processors. In response to the shared interrupt request, a target interrupt interface issues an interrupt ownership request to the interrupt distributor, without passing the shared interrupt request to the corresponding processor, if it estimates that the corresponding processor is available for servicing the shared interrupt request. The shared interrupt request is passed to the corresponding processor when an ownership confirmation is received from the interrupt distributor indicating that the processor has been selected for servicing the shared interrupt request.

An information processing apparatus includes a plurality of modules connected in a ring shape via a bus, and each module processes a packet flowing in a single direction on the ring in a predetermined order. The module includes a communication unit for transmitting a packet received from a first direction in the ring via the bus to a second direction, a discrimination unit for discriminating a packet from among the packets received from the first direction as a processing packet to be processed by the module, and a processing unit which is connected with the communication unit one by one and configured to process the processing packet. The communication unit transmits the packet processed by the processing unit at an interval equivalent to processing time or more for a processing packet processed by a module in a latter stage in the predetermined order among packets transmitted by the communication unit to the second direction.

A method for efficient dispatch/completion of a work element within a multi-node data processing system. The method comprises: selecting specific processing units from among the processing nodes to complete execution of a work element that has multiple individual work items that may be independently executed by different ones of the processing units; generating an allocated processor unit (APU) bit mask that identifies at least one of the processing units that has been selected; placing the work element in a first entry of a global command queue (GCQ); associating the APU mask with the work element in the GCQ; and responsive to receipt at the GCQ of work requests from each of the multiple processing nodes or the processing units, enabling only the selected specific ones of the processing nodes or the processing units to be able to retrieve work from the work element in the GCQ.

Systems, methods and computer program products may provide managing utilization of one or more physical processors in a shared processor pool. A method of managing utilization of one or more physical processors in a shared processor pool may include determining a current amount of utilization of the one or more physical processors and generating an instruction message. The instruction message may be at least partially determined by the current amount of utilization. The method may further include sending the instruction message to a guest operating system, the guest operating system having a number of enabled virtual processors.

Techniques for adaptive thread scheduling on a plurality of cores for reducing system energy are described. In one embodiment, a thread scheduler receives leakage current information associated with the plurality of cores. The leakage current information is employed to schedule a thread on one of the plurality of cores to reduce system energy usage. On chip calibration of the sensors is also described.

Disclosed are a reconfigurable processor and processing method, a reconfiguration control apparatus and method, and a thread modeler and modeling method. A memory area of a reconfigurable processor may be divided into a plurality of areas, and a context enabling a thread process may be stored in respective divided areas, in advance. Accordingly, when a context switching is performed from one thread to another thread, the other thread may be executed by using information stored in an area corresponding to the other thread.

Disclosed is an information processing device and a task switching method that can reduce the time required for switching of tasks in a plurality of coprocessors. The information processing device (30) includes a processor core (301); coprocessors (311 to 31n) including operation units (321 to 32n) that perform operation in response to a request from the processor core (301) and operation storage units (331 to 22n) that store the contents of operation of the operation units (321 to 32n), save storage units (351 to 35n) that store the saved contents of operation, a task switching control unit (302) that outputs a save/restore request signal when switching a task on which operation is performed by the coprocessors (311 to 31n), and save/restore units (341 to 34n) that perform at least one of saving of the contents of operation in the operation storage units (331 to 33n) to the save storage units (351 to 35n) and restoration of the contents of operation in the save storage units (351 to 35 n) to the operation storage units (331 to 33n) in response to the save/restore request signal.

A process for producing a fluoroalkyl iodide as a telomer Rf(CF2CF2)nI (wherein Rf is a C1-10 fluoroalkyl group, and n is an integer of from 1 to 6) by telomerization from a fluoroalkyl iodide represented by the formula RfI (wherein Rf is as defined above) as a telogen and tetrafluoroethylene (CF2CF2) as a taxogen, which comprises a liquid phase telomerization step of supplying a homogeneous liquid mixture of the telogen and the taxogen from the lower portion of a tubular reactor, moving the mixture from the lower portion towards the upper portion of the reactor in the presence of a radical initiator over a retention time of at least 5 minutes while the reaction system is kept in a liquid phase state under conditions where no gas-liquid separation will take place, so that the taxogen supplied to the reactor is substantially consumed by the reaction in the reactor, and drawing the reaction product from the upper portion of the reactor.

Disclosed are: a diaryliodonium salt mixture which is a precursor of a BF4 salt or the like of a diaryliodonium compound, can be produced in the form of crystals at ambient temperature, can be purified in a simple manner, can be produced with high efficiency, and can be induced into a BF4 salt or the like salt that has excellent solubility in a monomer or the like; and a process for producing the diaryliodonium salt mixture. Also disclosed is a production process which can achieve good yield and can produce reduced amounts of byproducts, and is therefore applicable to the industrial mass production of a diaryliodonium compound. The diaryliodonium salt mixture is characterized by containing at least two specific diaryliodonium salts.

The instant invention relates to a process and method for manufacturing 2,3,3,3-tetrafluoropropene by dehydrohalogenating a reactant stream of 2-chloro-1,1,1,2-tetrafluoropropane that is substantially free from impurities, particularly halogenated propanes, propenes, and propynes.

Disclosed is a process for producing 1,2-dichloro-3,3,3-trifluoropropene, which is characterized by that 1-halogeno-3,3,3-trifluoropropene represented by the general formula [1]: (In the formula, X represents a fluorine atom, chlorine atom or bromine atom.) is reacted with chlorine in a gas phase in the presence of a catalyst. It is possible by this process to produce 1,2-dichloro-3,3,3-trifluoropropene in an industrial scale with good yield by using 1-halogeno-3,3,3-trifluoropropene, which is available with a low price, as the raw material.

The invention also relates a process for the manufacture of trans 1-chloro3,3,3-trifluoropropene. The process comprises an isomerization step from cis 1233zd to trans 1233zd.

The invention also relates a process for the manufacture of trans 1-chloro3,3,3-trifluoropropene. The process comprises an isomerization step from cis 1233zd to trans 1233zd.

The present disclosure relates to processes for reducing the concentration of RfC≡CX impurities in fluoroolefins. The process involves: contacting a mixture comprising at least one fluoroolefin and at least one RfC≡CX impurity with at least one amine to reduce the concentration of the at least one RfC≡CX impurity in the mixture; wherein Rf is a perfluorinated alkyl group, and X is H, F, Cl, Br or I. The present disclosure also relates to processes for making at least one hydrotetrafluoropropene product selected from the group consisting of CF3CF═CH2, CF3CH═CHF, and mixtures thereof and reducing the concentration of CF3C═CH impurity generated during the process. The present disclosure also relates to processes for making at least one hydrochlorotrifluoropropene product selected from the group consisting of CF3CCl═CH2, CF3CH═CHCl, and mixtures thereof and reducing the concentration of CF3C≡CH impurity generated during the process.

Disclosed is a process for the synthesis of 1,1,2,3-tetrachloropropene (HCC-1230xa) using 1,1,3-trichloropropene (HCC-1240za) and/or 3,3,3-trichloropropene (HCC-1240zf) and Cl2 gas as the reactants, wherein the process takes place in a single reactor system. Before this invention, HCC-1230xa was made in a two-step process using HCC-1240za/HCC-1240zf and Cl2 gas, and the processing was conducted using two separate reactors.

The present disclosure relates to a process for separating a fluoroolefin from a mixture comprising hydrogen fluoride and fluoroolefin, comprising azeotropic distillation both with and without an entrainer. In particular are disclosed processes for separating any of HFC-1225ye, HFC-1234ze, HFC-1234yf or HFC-1243zf from HF.

The present invention is directed to processes for the production of 1233zd from 240fa and HF, with or without a catalyst, at a commercial scale. The 240fa and HF are fed to a reactor operating at high pressure. The resulting product stream comprising 1233zd, HCl, HF, and other byproducts is treated to one or more purification techniques including phase separation and one or more distillations to provide purified 1233zd, which meets commercial product specifications, i.e., having a GC purity of 99.5% or greater.

The present invention relates to a process for separating chlorinated methanes utilizing a dividing wall column. Processes and manufacturing assemblies for generating chlorinated methanes are also provided, as are processes for producing products utilizing the chlorinated methanes produced and/or separated utilizing the present process(es) and/or assemblies.

The invention relates to a process for removing one or more undesired (hydro)halocarbon compounds from a (hydro)fluoroalkene, the process comprising contacting a composition comprising the (hydro)fluoroalkene and one or more undesired (hydro)halocarbon compounds with an aluminum-containing absorbent, activated carbon, or a mixture thereof.

The invention relates to a process for the preparation of formula (I) which process comprises pyrolyzing a compound of formula (II) wherein X is chloro or bromo, and to compounds which may be used as intermediates for the manufacture of the compound of formula I and to the preparation of said intermediates.

Disclosed is a reactor and agitator useful in a high pressure process for making 1-chloro-3,3,3-trifluoropropene (1233zd) from the reaction of 1,1,1,3,3-pentachloropropane (240fa) and HF, wherein the agitator includes one or more of the following design improvements: (a) double mechanical seals with an inert barrier fluid or a single seal;(b) ceramics on the rotating faces of the seal;(c) ceramics on the static faces of seal;(d) wetted o-rings constructed of spring-energized Teflon and PTFE wedge or dynamic o-ring designs; and(e) wetted metal surfaces of the agitator constructed of a corrosion resistant alloy.

The subject of the invention is a process for the preparation of fluoroolefin compounds. It relates more particularly to a process for manufacturing a (hydro)fluoroolefin compound comprising (i) bringing at least one compound comprising from three to six carbon atoms, at least two fluorine atoms and at least one hydrogen atom, provided that at least one hydrogen atom and one fluorine atom are located on adjacent carbon atoms, into contact with potassium hydroxide in a stirred reactor, containing an aqueous reaction medium, equipped with at least one inlet for the reactants and with at least one outlet, in order to give the (hydro)fluoroolefin compound, which is separated from the reaction medium in gaseous form, and potassium fluoride, (ii) bringing the potassium fluoride formed in (i) into contact, in an aqueous medium, with calcium hydroxide in order to give potassium hydroxide and to precipitate calcium fluoride, (iii) separation of the calcium fluoride precipitated in step (ii) from the reaction medium and (iv) optionally, the reaction medium is recycled after optional adjustment of the potassium hydroxide concentration to step (i).

The present invention provides routes for making 1-chloro-3,3,3-trifluoropropene (HCFO-1233zd) from commercially available raw materials. More specifically, this invention provides routes for HCFO-1233zd from inexpensive and commercially available trifluoromethane (HFC-23).

The present invention provides routes for making 1-chloro-3,3,3-trifluoropropene (HCFO-1233zd) from commercially available raw materials. More specifically, this invention provides several routes for forming HCFO-1233zd from 3,3,3-trifluoropropene (FC-1234zf).

Disclosed is a process for producing 2-chloro-1,3,3,3-tetrafluoropropene (1224), including a first step of separating 2,3-dichloro-1,1,1,3-tetrafluoropropane (234da) into erythro form and threo form, and a second step of bringing the separated erythro form or threo form in contact with a base to obtain 2-chloro-1,3,3,3-tetrafluoropropene (1224). The first step is a step of separating 234da by distillation to achieve a separation into a fraction containing mainly erythro form and a fraction containing mainly threo form. In the second step, 1224 cis form is obtained from the erythro form, and 1224 trans form is obtained from the threo form. By this process, it is possible to selectively and efficiently produce cis form or trans form of 2-chloro-1,3,3,3-tetrafluoropropene (1224).

This invention provides a process for producing 2,3,3,3-tetrafluoropropene, the process comprising: (1) a first reaction step of reacting hydrogen fluoride with at least one chlorine-containing compound selected from the group consisting of a chloropropane represented by Formula (1): CClX2CHClCH2Cl, wherein each X is the same or different and is CI or F, a chloropropene represented by Formula (2): CClY2CCl═CH2, wherein each Y is the same or different and is CI or F, and a chloropropene represented by Formula (3): CZ2═CClCH2Cl, wherein each Z is the same or different and is CI or F in a gas phase in the absence of a catalyst while heating; and (2) a second reaction step of reacting hydrogen fluoride with a reaction product obtained in the first reaction step in a gas phase in the presence of a fluorination catalyst while heating. According to the process of this invention, 2,3,3,3-tetrafluoropropene (HFO-1234yf) can be obtained with high selectivity, and catalyst deterioration can be suppressed.

Process for producing silica-comprising dispersions comprising a polyetherol or a polyether amine, which comprises the steps of (i) admixing an aqueous silica sol (K) having an average particle diameter of from 1 to 150 nm and a silica content, calculated as SiO2, of from 1 to 60% by weight and a pH of from 1 to 6 with at least one polyetherol (b1) and/or polyether amine (b2) based on ethylene oxide and/or propylene oxide and having an average OH or amine functionality of from 2 to 6 and a number average molecular weight of from 62 to 6000 g/mol,(ii) distilling off at least part of the water,(iii) admixing the dispersion with at least one compound (S) having at least one at least monoalkoxylated silyl group and at least one alkyl, cycloalkyl or aryl substituent, where this substituent may have groups which are reactive toward an alcohol, an amine or an isocyanate in an amount of from 0.1 to 20 μmol of (S) per m2 of surface area of (K), where steps (i) and (iii) can be carried out simultaneously or in succession in any order, (iv) optionally adjusting the pH of the silica-comprising dispersions obtained to a value of from 7 to 12 by adding a basic compound, where step (iv) can also be carried out between steps (ii) and (iii).

The invention relates to process for the treatment of a hydrophobic surface by a liquid film comprising an aqueous phase comprising the coating of said surface by the liquid whose aqueous phase comprises an effective amount of an agent of modification of the properties of surface and an active agent.

A data processing apparatus includes multiple processing means that are connected in a ring shape via corresponding communication means respectively. Each communication means includes a reception means for receiving data from a previous communication means, and a transmission means for transmitting data to a next communication means. Connection information is assigned to each of the reception means and the transmission means. The communication means, when receiving a packet that has same connection information as one assigned to its reception means, causes the corresponding processing means to perform data processing on the packet, sets the connection information assigned to its transmission means to the packet, and transmits the packet to the next communication means, and when receiving a packet that has connection information that is not same as one assigned to its reception means, transmits the packet to the next communication means without changing the connection information of the packet.

A statue management section of a control section is provided with a corresponding real number storage section that stores a real number converted from a logical number by a configuration number converting section. When the corresponding real number storage section has stored configuration information with a real number of the next transition state, the state management section directly supplies the real number to the configuration information storage section in the next or later processing cycle.

A method and circuit arrangement utilize a low latency variable transfer network between the register files of multiple processing cores in a multi-core processor chip to support fine grained parallelism of virtual threads across multiple hardware threads. The communication of a variable over the variable transfer network may be initiated by a move from a local register in a register file of a source processing core to a variable register that is allocated to a destination hardware thread in a destination processing core, so that the destination hardware thread can then move the variable from the variable register to a local register in the destination processing core.

The disclosure relates to the implementation of multi-tasking on a digital signal processor. Blocking functions are arranged such that they do not make use of a processor's hardware stack. Respective function calls are replaced with a piece of inline assembly code, which instead performs a branch to the correct routine for carrying out said function. If a blocking condition of the blocking function is encountered, a task switch can be done to resume another task. Whilst the hardware stack is not used when a task switch might have to occur, mixed-up contents of the hardware stack among function calls performed by different tasks are avoided.

A technique for activating processor cores within a computer system is disclosed. Initially, a value representing a number of processor cores to be enabled within the computer system is received. The computer system includes multiple processors, and each of the processors includes multiple processor cores. Next, a scale variable value representing a specific type of tasks to be optimized during an execution of the tasks within the computer system is received. From a pool of available processor cores within the computer system, a subset of processor cores can be selected for activation. The subset of processor cores is activated in order to achieve system optimization during an execution of the tasks.

The disclosure provides a method for passing a parameter between processors. The method comprises the following steps: in a source program of a slave processor, directly introducing a static configuration parameter to be passed; obtaining a relative address of the static configuration parameter when converting the source program of the slave processor into a target program of the slave processor; and configuring directly, by a master processor, a parameter value of the static configuration parameter in the target program of the slave processor according to the obtained relative address of the static configuration parameter. The disclosure also provides a system for passing a parameter between processors. The system has no need to use external hardware such as a dual-port Random Access Memory (RAM) and a register, thus, the requirement of parameter transmission on the external hardware is reduced, and further the area and static power consumption of a chip are reduced. The disclosure reduces the cycle delay of the slave processor in accessing the dual-port RAM and the register, thereby effectively reducing the dynamic power consumption of the chip, improving the processing capability of the slave processor and enhancing the effective performance of the slave processor.