In a pulse output circuit in a shift register, a power source line which is connected to a transistor in an output portion connected to a pulse output circuit at the next stage is set to a low-potential drive voltage, and a power source line which is connected to a transistor in an output portion connected to a scan signal line is set to a variable potential drive voltage. The variable potential drive voltage is the low-potential drive voltage in a normal mode, and can be either a high-potential drive voltage or the low-potential drive voltage in a bath mode. In the batch mode, display scan signals can be output to a plurality of scan signal lines at the same timing in a batch.

A pixel circuit able to prevent a spread of the terminal voltages of drive transistors inside a panel and in turn able to reliably prevent deterioration of uniformity, wherein a source of a TFT serving as a drive transistor is connected to an anode of a light emitting element, a drain is connected to a power source potential, a capacitor is connected between a gate and source of the TFT, and a source potential of the TFT is connected to a fixed potential through a TFT serving as a switch transistor and wherein pixel circuit lines are connected by an upper line and bottom line and are arranged in parallel with pixel circuit power source voltage lines so as not to have intersecting parts.

Embodiments of the present disclosure are directed towards a circuit board having integrated passive devices such as inductors, capacitors, resistors and associated techniques and configurations. In one embodiment, an apparatus includes a circuit board having a first surface and a second surface opposite to the first surface and a passive device integral to the circuit board, the passive device having an input terminal configured to couple with electrical power of a die, an output terminal electrically coupled with the input terminal, and electrical routing features disposed between the first surface and the second surface of the circuit board and coupled with the input terminal and the output terminal to route the electrical power between the input terminal and the output terminal, wherein the input terminal includes a surface configured to receive a solder ball connection of a package assembly including the die. Other embodiments may be described and/or claimed.

A circuit card is provided that includes ground traces that extend from a resistor to a commoning bar, where a resultant electrical length between the resistor and the commoning bar and is configured to reduce energy carried on the ground terminals that could otherwise result in cross-talk. In an embodiment, the ground trace may be configured in a meandering manner. In another embodiment, the ground trace may be split and joined by an inductor.

A SAW filter circuit having improved ESD resistance is specified, in which a series interconnection composed of SAW resonators is interconnected between a first signal port and a dual-mode SAW filter port. The static capacitance of the series interconnection is at most four times the static capacitance of the dual-mode SAW filter transducers interconnected therewith.

An attenuation reduction control structure for high-frequency signal transmission lines of a flexible circuit board includes an impedance control layer formed on a surface of a substrate. The impedance control layer includes an attenuation reduction pattern that is arranged in an extension direction of the high-frequency signal transmission lines of the substrate and corresponds to bottom angle structures of the high-frequency signal transmission lines in order to improve attenuation of a high-frequency signal transmitted through the high-frequency signal transmission lines. An opposite surface of the substrate includes a conductive shielding layer formed thereon. The conductive shielding layer is formed with an attenuation reduction pattern corresponding to top angle structures of the high-frequency signal transmission lines.

Embodiments of resonator circuits and modulating resonators and are described generally herein. One or more acoustic wave resonators may be coupled in series or parallel to generate tunable filters. One or more acoustic wave resonances may be modulated by one or more capacitors or tunable capacitors. One or more acoustic wave modules may also be switchable in a filter. Other embodiments may be described and claimed.

A de-noise circuit and a de-noise method for differential signals and a chip for receiving differential signals are provided. The de-noise circuit includes a filter and a register. Both the filter and the register are disposed in the chip. The chip receives a differential signal through a first input terminal and a second input terminal. The filter is coupled between the first input terminal and the second input terminal of the chip. The filter filters out noises in the differential signal. The filter includes at least one filter unit. Each filter unit has at least one resistance value or at least one capacitance value. The register is coupled to the filter. The register receives and stores a control value. The register controls the resistance value or the capacitance value of at least one of the filter units based on the control value.

To provide a capacitive device capable of accurately securing a capacitance value, a variable capacitive device capable of sufficiently securing a capacity variability rate, and a resonance circuit that uses the capacitive devices. A capacitive device includes a capacitive device body constituted of a dielectric layer and at least a pair of capacitive device electrodes that sandwich the dielectric layer and cause a desired electric field in the dielectric layer; and stress adjustment portions to adjust a stress caused in the dielectric layer of the capacitive device body.

An unbalanced-balanced conversion circuit element includes an inductor connected in series between an unbalanced terminal and a first balanced terminal. The first balanced terminal side of the inductor is grounded via a capacitor. A capacitor is connected in series between the unbalanced terminal and a second balanced terminal. An inductor is connected between the first balanced terminal side of the inductor and the second balanced terminal side of the capacitor. In a laminate defining the unbalanced-balanced conversion circuit element, the capacitor is spaced far from a mounting surface of the laminate in comparison with other circuit elements.

A circuit for connecting a first accumulator line to a second accumulator line from an accumulator is described. The accumulator is provided for charging and discharging electrical energy via the accumulator lines. Each accumulator line has a positive pole and a negative pole for charging and discharging electrical energy. The circuit has at least one first switch which is provided for disconnecting and connecting two similar poles of the two accumulator lines.

A method for charging an assembled battery including series circuits connected in parallel, each of the series circuits including series-connected lead storage batteries, using a single charger is provided. The method includes: a first step of obtaining a first index value, corresponding to a resistance value of a first series circuit with a correlative relationship, the first series circuit having a lowest resistance value; a second step of obtaining a second index value corresponding to a resistance value of a second series circuit with a correlative relationship, the second series circuit having a highest resistance value; a third step of performing normal charging, in which the assembled battery is charged with a first amount of charge corresponding to the first index value; and a fourth step of performing refresh charging, in which the assembled battery is charged with a second amount of charge corresponding to the second index value.

A disclosed battery protecting circuit includes a battery protecting IC powered by a voltage of a secondary battery; another battery protecting IC powered by a voltage of another secondary battery connected to the secondary battery in series; and a constant voltage output unit which receives a maximum voltage obtained by adding voltages of the secondary battery and the other secondary battery in series and outputs a constant voltage upon receipt of a control signal from an output terminal of the battery protecting IC or the other battery protecting IC.

The present inventions, in one aspect, are directed to techniques and/or circuitry to adapt the charging of a battery using data which is representative of an overpotential or relaxation time (full or partial) of the battery. In another aspect the present inventions are directed to techniques and/or circuitry to calculate data which is representative of an overpotential or relaxation time (full or partial) of the battery. In yet another aspect the present inventions are directed to techniques and/or circuitry to calculate data which is representative of a state of charge of the battery using an overpotential or relaxation time (full or partial) of the battery.

Circuitry and techniques to measure, at the battery's terminals, characteristic(s) of the charging signal applied to the battery/cell during the recharging operation and, in response to feedback data which indicates the charging signal is out-of-specification, control or instruct the charging circuitry to adjust characteristic(s) of the recharging signal (e.g., the amplitude of the voltage of and/or current applied to or removed from the battery during the charging operation). For example, a rechargeable battery pack comprising a battery, and controllable switch(es), a current meter and voltmeter, all of which are fixed to the battery. Control circuitry generates control signal(s) to adjust a current and/or voltage of the charging signal using the feedback data from the current meter and/or voltmeter, respectively.

A system for detecting a short-circuited ultracapacitor cell in a machine is disclosed. The system may have a memory that stores instructions and one or more processors capable of executing the instructions. The one or more processors may be configured to perform cell balancing among ultracapacitor cells arranged within two or more ultracapacitor modules, each ultracapacitor module including at least two ultracapacitor cells connected in series. The one or more processors may be further configured to measure a module voltage generated by each of the plurality of ultracapacitor modules after performing the cell balancing and before applying a load of the machine to the ultracapacitor modules, and determine whether an ultracapacitor cell among the plurality of ultracapacitor cells is short-circuited based on a comparison of the measured module voltages.

A system for protecting a power consuming circuit, the system comprising two terminals for receiving power and two terminals for providing received power. Between one of the receiving terminals and a providing terminal, a transistor is provided which is controlled by a Zener diode and to break the connection between one of the receiving terminals and a providing terminal, if a voltage over the providing terminals or the receiving terminals exceeds the breakdown voltage of the Zener diode.

A novel 3-Input-3-Output (3×3) Fuel-Air Ratio Model-Free Adaptive (MFA) controller is introduced, which can effectively control key process variables including Bed Temperature, Excess O2, and Furnace Negative Pressure of combustion processes of advanced boilers. A novel 7-input-7-output (7×7) MFA control system is also described for controlling a combined 3-Input-3-Output (3×3) process of Boiler-Turbine-Generator (BTG) units and a 5×5 CFB combustion process of advanced boilers. Those boilers include Circulating Fluidized-Bed (CFB) Boilers and Once-Through Supercritical Circulating Fluidized-Bed (OTSC CFB) Boilers.

A circulating fluidized bed boiler includes a rectangular furnace having multiple particle separators connected to an upper portion of each of a front wall and a back wall of the furnace. Each particle separator includes a gas outlet, and a flue gas duct system connected to the gas outlets for conducting cleaned flue gas to a back pass. The particle separators are arranged in pairs. Each pair includes a front separator arranged adjacent to the front wall and a back separator arranged adjacent to the back wall. The flue gas duct system includes cross over ducts, each duct connecting the gas outlet of a front separator of a pair of particle separators, across and over the furnace, to the gas outlet of the back separator of the same pair of particle separators, and to the back pass, which back pass is arranged on the back wall side of the furnace.

An evaporator surface structure of a circulating fluidized bed boiler having a furnace that is enclosed by sidewalls and has a bottom and a ceiling. The evaporator surface structure includes at least one vertical and separate evaporator surface unit that is spaced apart from the sidewalls of the furnace. The at least one evaporator surface unit (i) is formed of planar water tube panels that extend from the bottom of the furnace to the ceiling of the furnace, and (ii) consists of two cross-wise joined vertical water tube panels.

An improved stun-gun or electrical shock device which includes improved circuit elements to eliminate the frequent product failure due to corrosion and pitting of an internal spark gap as found in prior art electrical shocking devices. The conventional internal spark gap found in prior art stun-guns is replaced with a pair of surge arrestors, thereby eliminating the problems caused by corrosion and pitting of the internal spark gap which has caused prior art stun-guns to have a limited life and fail.

The silicon nitride layer 910 formed by plasma CVD using a gas containing a hydrogen compound such as silane (SiH4) and ammonia (NH3) is provided on and in direct contact with the oxide semiconductor layer 905 used for the resistor 354, and the silicon nitride layer 910 is provided over the oxide semiconductor layer 906 used for the thin film transistor 355 with the silicon oxide layer 909 serving as a barrier layer interposed therebetween. Therefore, a higher concentration of hydrogen is introduced into the oxide semiconductor layer 905 than into the oxide semiconductor layer 906. As a result, the resistance of the oxide semiconductor layer 905 used for the resistor 354 is made lower than that of the oxide semiconductor layer 906 used for the thin film transistor 355.

In one aspect, an apparatus for drilling a wellbore into an earth formation is disclosed, which apparatus, according to one embodiment, may include a drill string configured to be conveyed into a wellbore, wherein an annulus is formed between the drill string and a wellbore wall, a first flow device configured to circulate a first fluid from an annulus to a bore of the drill string, and a second flow device positioned downhole of the first flow device, the second flow device configured to circulate a second fluid from the bore of the drill string to the annulus.

An automatic circle forming apparatus adapted for automatically forming OPP (O-phenylphenol) plastic circles includes a lower equipment cabinet, a first base plate, a transmitting module, an automatic separating module, an automatic tearing film module, a sucking waste mechanism, a displacement module, an automatic forming module and an upper equipment cabinet. The upper equipment cabinet is positioned on the first base plate for installing the transmitting module, the automatic separating module, the automatic tearing film module, the sucking waste mechanism, the displacement module and the automatic forming module therein. The upper equipment cabinet is equipped with a man-machine control interface which connects with and controls the transmitting module, the automatic separating module, the automatic tearing film module, the sucking waste mechanism, the displacement module and the automatic forming module for automatically forming the OPP plastic circles so as to improve operation efficiency and save a human cost.

A PWM circuit that can have two refresh rates, including: a first PWM signal generator and a second PWM signal generator; wherein the first PWM signal generator and the second PWM signal generator respectively control refresh rates in two dimensions of an output data generated from a target apparatus. A PWM signal generation method that can have two refresh rates, including: generating a first PWM signal; generating a second PWM signal; and controlling refresh rates in different dimensions of an output data generated from a target apparatus respectively by using the first PWM signal and the second PWM signal.

A PWM signal generating circuit, printer, and PWM signal generating method are described. The PWM signal generating circuit includes: a single counter configured to count values expressed in N bits; and at least one arithmetic device configured to generate a PWM signal, each of the at least one arithmetic device including a pulse width data storage unit for storing N-bit pulse width data representing a pulse width of the PWM signal to be generated, and an adder for calculating a carry value from a most significant bit obtained when adding the count value and the pulse width data. A signal having a level corresponding to the carry value is output at every change in the count value so that the PWM signal having the pulse width of the pulse width data is generated.

A circuit breaker is provided which can be filled with a quenching gas and which has two contact arrangements, which can be moved relative to one another and along a longitudinal axis of the circuit breaker. The contact arrangements form a arcing contact system and a rated current contact system connected electrically in parallel with it. One of the contact arrangements includes inner rated current contacts and outer rated current contacts of the rated current contact system, where the inner rated current contacts overhang the outer rated current contacts in the direction of the longitudinal axis, and the outer rated current contacts coaxially surround the inner rated current contacts. The circuit breaker has a high current carrying capability as well as a reliable switching-on and -off behavior, such as during and after the occurrence of a short-circuit current in the circuit breaker.

An arc runner assembly for use in a circuit interrupter provides a pair of arc runners that are situated at opposite sides of a stationary contact of the circuit interrupter. If used in a DC application, the arc runner assembly is configured to communicate a positive DC arc along one of the arc runners in a first direction away from the stationary contact and is further configured to communicate a negative DC arc along the other arc runner in another direction away from the stationary contact. The arc runner assembly additionally includes a support that is electrically engaged with a conductor of the circuit interrupter on a surface opposite that on which the stationary contact is disposed. The improved arc runner assembly advantageously facilitates extinction of electrical arc and extinguishes both positive and negative DC arcs in a DC application.

A circuit interrupter includes, a first contact and a second contact, the second contact being moveable relative to the first contact, a drive assembly structured to move the second contact relative to the first contact, and an erosion monitoring device including a linear transducer coupled to a portion of the drive assembly. The liner transducer is structured to generate an output signal representative of an amount of linear displacement of the portion of the drive assembly, wherein the erosion monitoring device is structured to monitor a degree of erosion of at least one of the first contact and the second contact based on the output signal.

A gas circuit breaker comprising: a sealed tank; two breaking sections disposed in the sealed tank; a bracket to support movable parts of the breaking sections while enabling switching operation of the movable parts; an insulation cylinder to support the bracket through an electric field relaxation shield; an insulated operating rod disposed in the insulation cylinder movably in the axial direction and an end thereof is connected to an actuator; and a link mechanism connected to other end of the insulated rod and transmits drive force from the actuator to the movable parts of the breaking sections, wherein the electric field relaxation shield is provided with out-side groove and in-side groove on the insulation cylinder respectively, and the out-side groove and in-side groove are formed openings at the link mechanism side respectively, and end of the in-side groove is extended to near the outer surrounding of the insulated operating rod.

In a vacuum circuit breaker corresponding to three-phase, which is configured by linearly arranging three pressure tanks respectively corresponding to one-phase, in which insulation gas is encapsulated, and a vacuum valve is installed, each pressure tank has a nearly longitudinal shape or a nearly square shape, viewed from a plane surface, and the vacuum valve is arranged in each of the pressure tanks in a state where a drive direction of the movable conductor is aligned with an upper lower direction, and the movable conductor is positioned lower than the vacuum valve, and keeps a sufficient insulation distance with respect to the movable-side connection conductor, and is neared to a position in one of diagonal directions or longitudinal directions of the pressure tank having a nearly square shape or nearly ellipsoidal shape, and moreover, the operation mechanism is arranged and configured at a position, which is lower than the vacuum valve.

A gas circuit breaker includes movable and fixed electrode parts arranged to face each other in an engaging/separating manner in a container filled with an insulating gas, an operating mechanism attached to a partition of the container and configured to output an operating force to the movable electrode part, an operating rod attached to the movable electrode part, a first link rotatably attached to the operating rod, a lever rotatably attached to the first link, a support bearing fixed to the partition of the container via an insulating spacer, a second link rotatably attached to the lever and also rotatably attached to the support bearing, a seal bearing connected through the partition of the container, a seal rod rotatably attached to the center of the lever and slidably supported to the seal bearing, and a third link rotatably attached to the seal rod and also attached to the operating mechanism.

An arc chamber for a circuit breaker has first and second mounting bodies. The mounting bodies are disposed at the ends of an electrically insulating insulation section of the arc chamber. The insulation section is formed of at least two shell-shaped partial sections. The partial sections are curved concavely relative to a longitudinal axis of the arc chamber. A gap is formed between the edges of the bodies of the partial sections.

A gas circuit breaker is provided, avoiding change in the position of a cover member and without weakening of the blow of gas to the arc in an arc discharge cavity even when a surface of the cover member in contact with the arc discharge cavity is damaged. The gas circuit breaker includes a contact ring, a holder attached to the contact ring, and extending to a path of arc-extinguishing gas that extinguishes an arc, and an electrically insulative cover member attached to the holder.

A flexible shunt for a vacuum circuit breaker can have a reduced straight length and improved flexibility even with an increased thickness within a predetermined accommodation space of a main circuit part. The flexible shunt comprises a pair of conductive plates, each including a clamp connecting portion configured as a flat conductive member, the clamp connecting portion being connected the clamp, a terminal side connecting portion configured as a flat conductive member, the terminal side connecting portion being connected to the terminal side, and a flexible curved portion configured to connect the clamp connecting portion to the terminal side connecting portion, the flexible curved portion being formed to be projected outwardly.

A gas-insulated type circuit breaker including a housing defining a gas volume for a dielectric insulation gas; a first arcing contact member and a second arcing contact member, wherein the first arcing contact member and the second arcing contact member are movable relative to each other along an axis; a first nominal contact member and a second nominal contact member, wherein the first nominal contact member and the second nominal contact member are movable relative to each other along the axis; and a first nominal contact shielding arrangement including an inner shield member and an outer shield member, wherein the inner shield member and the outer shield member are arranged coaxially about the axis. The first nominal contact member is arranged co-axially between the inner shield member and the outer shield member, and is movable relative to the inner shield member and to the outer shield member.

The disclosure relates to a gas circuit breaker switch (5) which can be integrated inside a switching device insulated in a dielectric gas, said switch (5) comprising an arc chute (1) inside which a fixed contact (3) and a moving contact (4) are arranged. The integration of the contacts (3, 4) inside at least one casing (19, 20) corresponding to the arc chute (1) allows reducing distances between phases, in addition to preventing any incident in one phase from affecting the remaining phases, and finally more compact electrical equipment is obtained. The switch (5) also comprises at least one generation means (6) for generating at least one gas, at least one blowout/intake means (7) for at least one extinguishing gas and at least one generation means (2) for generating a magnetic field, such that the electric arc generated between the contacts (3, 4) of the switch (5) can be extinguished by combining said means (6, 7, 2).

A circuit breaker includes a first contact and a second contact. An electric arc zone is disposed between the contacts. A feed channel opens into the electric arc zone, connecting the electric arc zone to a hot gas reservoir volume. The hot gas reservoir volume, in turn, is connected to a compression volume. An outflow opening is disposed in a wall of the compression volume. The outflow opening is permanently open, at least in a contacting state of the contacts.

Circuit breakers include an arc chamber and an arc chute comprising a plurality of arc plates in the arc chamber. The circuit breakers also include a line conductor assembly with at least one arc runner attached to a line conductor in the arc chamber. The arc runner can extend below but adjacent to a bottom arc plate to thereby guide a respective arc into the arc chute.

An arc guider configured to provide an arc movement path, one side thereof forming a fixation projection and a center thereof forming a groove in a longitudinal direction, a fixation element sequentially including a main contact, an arc contact being spaced apart from the main contact and an insertion groove accommodating the arc guider and a plurality of projection fixing units being formed on both sides of the insertion groove and being curved toward the accommodated arc guider through an outer force so that the fixation projection does not escape wherein triangle V shaped groove marks by the outer force are formed in the plurality of the projection fixing units.

A method and circuit arrangement for controlling the motor current in an electric motor, in particular a stepper motor, by a chopper method is provided. In the method/circuit arrangement, the motor is operated with a coil current that follows a target coil current substantially more accurately at least at the zero crossing of the coil current. The method/circuit arrangement provides a good symmetry of the sinusoidal wave shape of the coil current with respect to the zero crossing of the coil current. The method is achieved in particular by the active control of the coil current both in the direction of a predefined target coil current and opposite the direction of the predefined target coil current with respect to upper or lower desired current values and a lowering or increasing of the upper or lower desired current values.

Circuits and techniques to linearize the operation of an RF power amplifier are described. A linearizer circuit may include a non-amplification signal path which includes a delay line and an amplification signal path which includes at least one amplifier stage. In some embodiments, the amplification signal path may include an odd number of amplification stages. The linearizer may be used to precondition an input signal of an RF power amplifier in a manner that improves the overall linearity of operation.

A differential circuit with a function to compensate unevenness observed in the differential gain thereof is disclosed. The differential circuit provides a low-pass filter in one of the paired transistors not receiving the input signal in addition to another low-pass filter that provides an average of output signals as a reference level of the differential circuit. The cut-off frequency of the filter is preferably set to be equal to the transition frequency at which the self-heating effect explicitly influences the trans-conductance of the transistor.

An input receiver circuit including a single-to-differential amplifier and a semiconductor device including the input receiver circuit are disclosed. The input receiver circuit includes a first stage amplifier unit and a second stage amplifier unit. The first stage amplifier unit amplifies a single input signal in a single-to-differential mode to generate a differential output signal, without using a reference voltage. The second stage amplifier unit amplifies the differential output signal in a differential-to-single mode to generate a single output signal.

A TIA circuit and method are provided that merge the automatic gain control function with the bandwidth adjustment function to allow the TIA circuit to operate over a wide dynamic range at multiple data rates. The TIA circuit has an effective resistance that is adjustable for adjusting the gain and the bandwidth of the TIA circuit. The mechanism of the TIA circuit that is used to adjust the effective resistance, and hence the gain and bandwidth of the TIA circuit, is temperature independent, and as such, the performance of the TIA circuit is not affected by temperature variations.

Circuitry for reducing power consumption is described. The circuitry includes a power amplifier. The circuitry also includes a predistorter coupled to the power amplifier. The circuitry further includes a power supply coupled to the power amplifier. The circuitry additionally includes a controller coupled to the power amplifier, to the predistorter and to the power supply. The controller captures a transmit signal and a feedback signal concurrently and determines a minimum bias voltage from a set of voltages and a predistortion that enable the power amplifier to produce an amplified transmit signal in accordance with a requirement.

Differential amplifier circuits for LDMOS-based amplifiers are disclosed. The differential amplifier circuits comprise a high resistivity substrate and separate DC and AC ground connections. Such amplifier circuits may not require thru-substrate vias for ground connection.

An information handling system (IHS) employs a power fault protection circuit to protect the IHS from overvoltages which may occur on an information line from a power adapter to the IHS. The system includes a processor coupled to the protection circuit. The circuit is operative in a first mode to decouple an information line from the IHS in response to a disable command and operative in a second mode to decouple the information line from the IHS when a voltage in the information line exceeds a predetermined threshold voltage.

An analog front-end circuit includes an analog processing circuit, an A/D converter, a target register in which a lower limit target value of an input image signal is set, and a calculation circuit. The analog processing circuit includes an offset control circuit which performs offset control based on an offset control value set in an offset control register. The calculation circuit monitors the A/D-converted value in a lower limit value output period when the A/D-converted value corresponding to a lower limit value of an input range is output from the A/D converter, and sets the offset control value that causes the A/D-converted value to become closer to the lower limit target value set in the target register in the offset control register.

A line voltage control circuit for use with a multi-string LED drive system which provides a common line voltage for multiple LED strings that are connected to respective current sink circuits at respective junctions. An error amplifier receives the minimum junction voltage and a reference ‘desired junction voltage’ at respective inputs, and a voltage regulator outputs the line voltage in response to a voltage applied to a feedback input. A comparator toggles an output when the maximum junction voltage (Vmax) exceeds a reference limit (Vlimit). A multiplexer receives the error amplifier output and a fixed voltage at respective inputs and provides one of the signals to the regulator's feedback input in response to the comparator output. When Vmax>Vlimit, the fixed voltage is provided to the feedback input and the line voltage is reduced, thereby protecting low voltage current sinks from potentially damaging high voltages.