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Method and apparatus for performing logical compare operations

A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, instruction decode logic decodes instructions for an execution unit to operate on packed data elements including logical comparisons. A register file including 128-bit packed data registers stores packed single-precision floating point (SPFP) and packed integer data elements. The logical comparisons may include comparison of SPFP data elements and comparison of integer data elements and setting at least one bit to indicate the results. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting the at least one bit, which in turn may be utilized by a branching unit in response to a branch instruction. Alternatively, the branch support actions may include branching to an indicated target code location.




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Method and apparatus for performing logical compare operations

A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, instruction decode logic decodes instructions for an execution unit to operate on packed data elements including logical comparisons. A register file including 128-bit packed data registers stores packed single-precision floating point (SPFP) and packed integer data elements. The logical comparisons may include comparison of SPFP data elements and comparison of integer data elements and setting at least one bit to indicate the results. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting the at least one bit, which in turn may be utilized by a branching unit in response to a branch instruction. Alternatively, the branch support actions may include branching to an indicated target code location.




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System and method of operating a computing device to perform memoization including transforming input/output parameters to reduce redundancies and efficiently cache data

A system (200) and a method (100) of operating a computing device to perform memoization are disclosed. The method includes determining whether a result of a function is stored in a cache and, if so, retrieving the result from the cache and, if not, calculating the result and storing it in the cache. The method (100) includes transforming (104) by the computing device at least one selected from the input parameters and the output parameters of the function, the transforming being based on an analysis of the function and its input arguments to establish whether or not there is a possible relationship reflecting redundancy among the input parameters and output parameters of the function. The transforming may include at least one of: use of symmetry, scaling, linear shift, interchanging of variables, inversion, polynomial and/or trigonometric transformations, spectral or logical transformations, fuzzy transformations, and systematic arrangement of parameters.




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Method and apparatus for performing logical compare operation

A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, instruction decode logic decodes instructions for an execution unit to operate on packed data elements including logical comparisons. A register file including 128-bit packed data registers stores packed single-precision floating point (SPFP) and packed integer data elements. The logical comparisons may include comparison of SPFP data elements and comparison of integer data elements and setting at least one bit to indicate the results. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting the at least one bit, which in turn may be utilized by a branching unit in response to a branch instruction. Alternatively, the branch support actions may include branching to an indicated target code location.




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Active ray-curable inkjet ink, and image formation method

The active ray-curable inkjet ink comprises a gelling agent, photopolymerizable compounds and a photoinitiator, and reversibly transitions into a sol-gel phase according to the temperature. Therein: (1) a (meth)acrylate compound having a molecular weight of 300-1,500 and having 3-14 (—CH2—CH2—O—) structural units within a molecule is included as the first photopolymerizable compound at a proportion of 30-70 mass % relative to the total mass of the ink; (2) a (meth)acrylate compound having a molecular weight of 300-1,500 and a C log P value of 4.0-7.0 is included as the second photopolymerizable compound at a proportion of 10-40 mass % relative to the total mass of the ink; and (3) the gelling agent has a total of at least 12 carbon atoms, and has a straight or branched alkyl chain including at least three carbon atoms.




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Silicone hydrogels having a structure formed via controlled reaction kinetics

The present invention relates to a process comprising the steps of reacting a reactive mixture comprising at least one silicone-containing component, at least one hydrophilic component, and at least one diluent to form an ophthalmic device having an advancing contact angle of less than about 80°; and contacting the ophthalmic device with an aqueous extraction solution at an elevated extraction temperature, wherein said at least one diluent has a boiling point at least about 10° higher than said extraction temperature.




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Method and apparatus for obtaining equipment identification information

Embodiments of the present invention relate to a method and an apparatus for obtaining equipment identification information, where the method includes: detecting, by using a first GPIO port, a first discharging duration for a capacitor to discharge through a resistor to be tested; detecting, by using a second GPIO port, a second discharging duration for the capacitor to discharge through a fixed value resistor; and obtaining a resistance of the resistor to be tested according to the first discharging duration, the second discharging duration, and a resistance of the fixed value resistor. The embodiments of the present invention are capable of increasing identification efficiency of the GPIO port.




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Information processing apparatus, method thereof, and storage medium

An information processing apparatus includes a plurality of modules connected in a ring shape via a bus, and each module processes a packet flowing in a single direction on the ring in a predetermined order. The module includes a communication unit for transmitting a packet received from a first direction in the ring via the bus to a second direction, a discrimination unit for discriminating a packet from among the packets received from the first direction as a processing packet to be processed by the module, and a processing unit which is connected with the communication unit one by one and configured to process the processing packet. The communication unit transmits the packet processed by the processing unit at an interval equivalent to processing time or more for a processing packet processed by a module in a latter stage in the predetermined order among packets transmitted by the communication unit to the second direction.




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PCI express channel implementation in intelligent platform management interface stack

Certain embodiments of the present disclosure are directed to a baseboard management controller (BMC) that includes a PCI express (PCIe) interface controller configured to provide access to a PCIe channel over a PCIe link, and firmware. The firmware includes a PCIe module being configured to access the PCIe channel through the PCIe interface controller and registered as a PCIe function. A software stack of the BMC communicates, through the PCIe module, with a PCIe device over the PCIe channel.




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Apparatuses enabling concurrent communication between an interface die and a plurality of dice stacks, interleaved conductive paths in stacked devices, and methods for forming and operating the same

Various embodiments include apparatuses, stacked devices and methods of forming dice stacks on an interface die. In one such apparatus, a dice stack includes at least a first die and a second die, and conductive paths coupling the first die and the second die to the common control die. In some embodiments, the conductive paths may be arranged to connect with circuitry on alternating dice of the stack. In other embodiments, a plurality of dice stacks may be arranged on a single interface die, and some or all of the dice may have interleaving conductive paths.




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System and method for a workload management and scheduling module to manage access to a compute environment according to local and non-local user identity information

A system, method and computer-readable media for managing a compute environment are disclosed. The method includes importing identity information from an identity manager into a module performs workload management and scheduling for a compute environment and, unless a conflict exists, modifying the behavior of the workload management and scheduling module to incorporate the imported identity information such that access to and use of the compute environment occurs according to the imported identity information. The compute environment may be a cluster or a grid wherein multiple compute environments communicate with multiple identity managers.




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End to end modular information technology system

Embodiments of the invention are directed to a system, method, or computer program product for providing an information technology build service for building a platform in response to a service request. The invention receives a service request for the platform build from a requester, receives a plurality of platform parameters from the requester, determines whether the service request requires one or more physical machines or one or more virtual machines, and if the service request requires one or more virtual machines, initiates build of the one or more virtual machines. The invention also provisions physical and virtual storage based on received parameters, provisions physical and virtual processing power based on received parameters, and manages power of resources during the build, the managing comprising managing power ups, power downs, standbys, idles and reboots of one or more physical components being used for the build.




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System and method for performing memory management using hardware transactions

The systems and methods described herein may be used to implement a shared dynamic-sized data structure using hardware transactional memory to simplify and/or improve memory management of the data structure. An application (or thread thereof) may indicate (or register) the intended use of an element of the data structure and may initialize the value of the data structure element. Thereafter, another thread or application may use hardware transactions to access the data structure element while confirming that the data structure element is still part of the dynamic data structure and/or that memory allocated to the data structure element has not been freed. Various indicators may be used determine whether memory allocated to the element can be freed.




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Verification of controls in information technology infrastructure via obligation assertion

A processing device comprises a processor coupled to a memory and implements an obligation management system for information technology infrastructure, with the obligation management system being configured to process a plurality of obligations on behalf of a relying party to verify implementation of corresponding controls in information technology infrastructure of a claimant. A given one of the obligations has an associated obligation fulfiller that is inserted or otherwise deployed as a component within the information technology infrastructure of the claimant and is configured to provide evidence of the implementation of one or more of the controls responsive to an obligation assertion so as to establish an associated trust aspect of the claimant. The information technology infrastructure may comprise distributed virtual infrastructure of a cloud service provider. The claimant may comprise the cloud service provider and the relying party may comprise a tenant of the cloud service provider.




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Converting dependency relationship information representing task border edges to generate a parallel program

According to an embodiment, based on task border information, and first-type dependency relationship information containing N number of nodes corresponding to data accesses to one set of data, containing edges representing dependency relationship between the nodes, and having at least one node with an access reliability flag indicating reliability/unreliability of corresponding data access; task border edges, of edges extending over task borders, are identified that have an unreliable access node linked to at least one end, and presentation information containing unreliable access nodes is generated. According to dependency existence information input corresponding to the set of data, conversion information indicating absence of data access to the unreliable access nodes is output. According to the conversion information, the first-type dependency relationship information is converted into second-type dependency relationship information containing M number of nodes (0≦M≦N) corresponding to data accesses to the set of data and containing edges representing inter-node dependency relationship.




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Information processing device and task switching method

Disclosed is an information processing device and a task switching method that can reduce the time required for switching of tasks in a plurality of coprocessors. The information processing device (30) includes a processor core (301); coprocessors (311 to 31n) including operation units (321 to 32n) that perform operation in response to a request from the processor core (301) and operation storage units (331 to 22n) that store the contents of operation of the operation units (321 to 32n), save storage units (351 to 35n) that store the saved contents of operation, a task switching control unit (302) that outputs a save/restore request signal when switching a task on which operation is performed by the coprocessors (311 to 31n), and save/restore units (341 to 34n) that perform at least one of saving of the contents of operation in the operation storage units (331 to 33n) to the save storage units (351 to 35n) and restoration of the contents of operation in the save storage units (351 to 35 n) to the operation storage units (331 to 33n) in response to the save/restore request signal.




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Additives for inhibiting gas hydrate formation

The invention relates to the use of polymers, containing between 1 and 100 mol % of structural units of the formula (1), wherein R1 means hydrogen or C1-C6 alkyl, A means C2-C4 alkylene groups, and B means C2-C4 alkylene groups, with the stipulation that A is different from B, and x and y mean an integer from 1 to 100 independent of each other, in amounts of 0.01 to 2 wt % relative to the water phase, as gas hydrate inhibitors.




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Additives for inhibition of gas hydrate formation

The invention provides for the use of copolymers comprising 1 to 99 mol % of structural units of the formula (1) in which R1 is hydrogen or C1-C6-alkyl, A is C2-C4-alkylene groups and B is C2-C4-alkylene groups, with the proviso that A is different than B, and x, y are each independently an integer of 1-100, and 1 to 99 mol % of structural units of the formula (3) in which R6 is hydrogen or C1-C6-alkyl, D is C2-C4-alkylene groups and z is an integer of 1-50, in amounts of 0.01 to 2% by weight, based on the water phase, as gas hydrate inhibitors.




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Stabilized formulations of fatty acids

Disclosed herein are stabilized powder and aqueous formulations comprising a substantially water insoluble lipophilic bioactive compound and a micelle-forming surfactant. In one embodiment, the formulation further comprises a water soluble reducing agent, and/or a water insoluble reducing agent, and/or a metal chelator, and/or a metal bisulfite reducing agent, or combinations thereof, wherein the formulation remains substantially clear and stable when stored at or below room temperature for a period of at least 6 months or at least 12 months; and methods for preparing these formulations.




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Metal nanoparticle dispersion usable for ejection in the form of fine droplets to be applied in the layered shape

According to the present invention, a metal nanoparticle dispersion suitable to multiple layered coating by jetting in the form of fine droplets is prepared by dispersing metal nanoparticles having an average particle size of 1 to 100 nm in a dispersion solvent having a boiling point of 80° C. or higher in such a manner that the volume percentage of the dispersion solvent is selected in the range of 55 to 80% by volume and the fluid viscosity (20° C.) of the dispersion is chosen in the range of 2 mPa·s to 30 mPa·s, and then when the dispersion is discharged in the form of fine droplets by inkjet method or the like, the dispersion is concentrated by evaporation of the dispersion solvent in the droplets in the course of flight, coming to be a viscous dispersion which can be applicable to multi-layered coating.




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Indirect designation of physical configuration number as logical configuration number based on correlation information, within parallel computing

A computing section is provided with a plurality of computing units and correlatively stores entries of configuration information that describes configurations of the plurality of computing units with physical configuration numbers that represent the entries of configuration information and executes a computation in a configuration corresponding to a designated physical configuration number. A status management section designates a physical configuration number corresponding to a status to which the computing section needs to advance the next time for the computing section and outputs the status to which the computing section needs to advance the next time as a logical status number that uniquely identifies the status to which the computing section needs to advance the next time in an object code. A determination section determines whether or not the computing section has stored an entry of configuration information corresponding to the status to which the computing section needs to advance the next time based on the logical status number that is output from the status management section. A rewriting section correlatively stores the entry of the configuration information and a physical configuration number corresponding to the entry of the configuration information in the computing section when the determination section determines that the computing section has not stored the entry of configuration information corresponding to the status to which the computing section needs to advance the next time.




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Information processing apparatus for restricting access to memory area of first program from second program

A processor determines whether a first program is under execution when a second program is executed, and changes a setting of a memory management unit based on access prohibition information so that a fault occurs when the second program makes an access to a memory when the first program is under execution. Then, the processor determines whether an access from the second program to a memory area used by the first program is permitted based on memory restriction information when the fault occurs while the first program and the second program are under execution, and changes the setting of the memory management unit so that the fault does not occur when the access to the memory area is permitted.




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High performance computing (HPC) node having a plurality of switch coupled processors

A High Performance Computing (HPC) node comprises a motherboard, a switch comprising eight or more ports integrated on the motherboard, and at least two processors operable to execute an HPC job, with each processor communicably coupled to the integrated switch and integrated on the motherboard.




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Conducting verification in event processing applications using formal methods

A method of applying formal verification methodologies to event processing applications is provided herein. The method includes the following stages: representing an event processing application as an event processing network, being a graph with event processing agents as nodes; generating a finite state machine based on the event processing network, wherein the finite state machine is an over-approximation of the event processing application; expressing stateful rules and policies that are associated with the event processing application using temporal logic, to yield a temporal representation of the event processing application; combining the temporal representation and the finite state machine into a model; generating a statement associated with a user-selected verification-related property of the event processing application, wherein the statement is generated using the temporal representation; and applying the statement to the model, to yield an indication for: (i) a correctness of the statement or (ii) a counter example, respectively.




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Information editing apparatus

An information editing device is provided with an object storage portion 11 in which a character string object or image object is stored, a placement information storage portion 12 that stores placement area designation information that sets two or more placement areas that do not overlap each other for respectively placing the objects, and that correspond to the objects, an object output portion 13 that outputs, into placement areas that are set based on the placement area designation information, each of the objects corresponding to the respective placement areas, an input receiving portion 14 that receives a deletion instruction or a modification instruction for at least one of the objects output by the object output portion 13, and a placement modification portion 15 that, according to the deletion instruction or modification instruction, modifies the placement area of the object such that the placement area is placed without overlapping.




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Cross-platform compiler for data transforms

Techniques for automatically partitioning a multi-platform data transform flow graph to one or more target output platforms are provided. The techniques include performing type inference on a transform graph, wherein the transform graph comprises one or more data transforms, automatically partitioning the transform graph to one or more target output platforms based on one or more policies, performing an optimization of the partitioned transform graph, and generating code, from the partitioned transform graph, for each set of the one or more data transforms based on the one or more target output platforms.




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Systems and methods for information flow analysis

Computer-implemented methods for analyzing computer programs written in semi-structured languages are disclosed. The method is based on unification of the two classic forms of program flow analysis, control flow and data flow analysis. As such, it is capable of substantially increased precision, which increases the effectiveness of applications such as automated parallelization and software testing. Certain implementations of the method are based on a process of converting source code to a decision graph and transforming that into one or more alpha graphs which support various applications in software development. The method is designed for a wide variety of digital processing platforms, including highly parallel machines. The method may also be adapted to the analysis of (semi-structured) flows in other contexts including water systems and electrical grids.




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Hydrogenation of styrene oxide forming 2-phenyl ethanol

A process for preparation of 2-phenyl ethanol by catalytic hydrogenation of styrene oxide using a catalyst consisting of Pd (II) on basic inorganic support is investigated. The present invention comprises development of new Pd based catalysts. The present method yields 2-phenyl ethanol in 98% selectivity at total conversion of styrene oxide. The present process represents an environment friendly alternative to conventionally used methods in industry and eliminates the reduction step for catalyst preparation. In the present invention the active catalyst is generated in situ during the hydrogenation of styrene oxide. In addition, Pd (II) supported catalysts do not catch fire (non pyrophoric), can be stored under ambient conditions and produce very less or no dust which makes said catalysts suitable for industrial application.




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Dive computer incorporating stored dive site information

Dive computers in accordance with embodiments of the invention are disclosed that store information concerning a dive site. The stored information can be accessed during the dive to provide information concerning such things as points of interest and/or hazards. One embodiment of the invention includes a processor, memory connected to the processor, a pressure transducer connected to the processor and configured to measure depth, and a display connected to the processor. In addition, the memory contains factual information concerning a dive site, and the processor is configured to display at least a portion of the stored factual information concerning the dive site via the display.




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System and method for automated updating of map information

Traffic information readings corresponding to a vehicle are received, the readings including at least a location. The traffic information readings are compared to information already within a map database, and are used to derive additional map information augmenting or correcting that already within the database, the additional map information subsequently being stored in the database. Additional information that is derived includes the presence of stop signs and traffic lights at intersections, the legality of turns at certain times of day, and the connectedness or non-connectedness of road segments.




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Path information providing server, method of providing path information, and terminal

Provided are an apparatus and method of providing path information based on a status of a path and/or a purpose of the use of the path. A path information providing server collects environmental information from a sensing device. The path information providing server receives a path information request including a departure and a destination from a terminal device, and provides path information generated by mapping environmental data to a searched path.




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System and method for integrated transformer synthesis and optimization using constrained optimization problem

A method for designing a transformer in an integrated circuit includes receiving one or more desired characteristics of the transformer from user input and iteratively determining a design solution for the transformer through one or more simulations and modifications using a rule-set. The method combines the one or more desired characteristics with other preset characteristics of the transformer or the integrated circuit. A first model of the transformer is defined with typical load impedances and simulated having the combined characteristics to determine performance. Results of the simulation are processed to calculate performance with the load impedances specified by the user. The results are further processed to obtain a mathematical model that includes tuning capacitors. The first and subsequent models are modified by drawing on a rule-set of expert knowledge relating to general dependency of at least one design criterion, such as a physical, geometrical or performance characteristic, with another design criterion.




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Method and system for forming patterns with charged particle beam lithography

In a method for fracturing or mask data preparation or mask process correction for charged particle beam lithography, a plurality of shots are determined that will form a pattern on a surface, where shots are determined so as to reduce sensitivity of the resulting pattern to changes in beam blur (βf). In some embodiments, the sensitivity to changes in βf is reduced by varying the charged particle surface dosage for a portion of the pattern. Methods for forming patterns on a surface, and for manufacturing an integrated circuit are also disclosed, in which pattern sensitivity to changes in βf is reduced.




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Method and system for semiconductor design hierarchy analysis and transformation

A method and apparatus for partitioning of the input design into repeating patterns called template cores for the application of reticle enhancement methods, design verification for manufacturability and design corrections for optical and process effects is accomplished by hierarchy analysis to extract cell overlap information. Also hierarchy analysis is performed to extract hierarchy statistics. Finally template core candidates are identified. This allows to the design to be made amenable for design corrections or other analyses or modifications that are able to leverage the hierarchy of the design since the cell hierarchy could otherwise be very deep or cells could have significant overlap with each other.




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Method and system for critical dimension uniformity using charged particle beam lithography

A method for mask data preparation or mask process correction is disclosed in which a set of charged particle beam shots is determined which is capable of forming a pattern on a surface, wherein critical dimension uniformity (CDU) of the pattern is optimized. In some embodiments the CDU is optimized by varying at least two factors. In other embodiments, model-based techniques are used. In yet other embodiments, the surface is a reticle to be used in an optical lithographic process to form a pattern on a wafer, and CDU on the wafer is optimized.




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Prediction of dynamic current waveform and spectrum in a semiconductor device

A method for accurately determining the shape of currents in a current spectrum for a circuit design is provided. The method includes determining timing and power consumption characteristics. In one embodiment, timing characteristics are provided through a electronic design automation tool. The timing characteristics yield a current pulse time width. In another embodiment, power consumption characteristics are provided by an EDA tool. The power consumption characteristics yield a current pulse amplitude. The shape of the current pulse is obtained by incrementally processing a power analyzer tool over relatively small time increments over one or more clock cycles while capturing the switching nodes of a simulation of the circuit design for each time increment. In one embodiment, the time increments are one nanosecond or less.




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DRC format for stacked CMOS design

The present disclosure relates a method of performing a design rule checking (DRC) procedure on a multi-tiered integrated chip. In some embodiments, the method is performed by defining layer databases for a plurality of tiers within a multi-tiered integrated chip. The layer databases respectively identify design layers within an associated tier. A DRC (design rule checking) deck is then generated, which defines one or more individual design layer definitions as a function of a plurality of layer databases, so that the one or more individual design layer definitions are defined for a plurality of tiers. One or more design rules for the one or more individual design layer definitions are defined within the DRC deck. Since the individual design layer definitions are defined as functions of the plurality of layer databases, the design rules apply to the plurality of tiers.




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Method and system for forming high accuracy patterns using charged particle beam lithography

A method and system for optical proximity correction (OPC) is disclosed in which a set of shaped beam shots is determined which, when used in a shaped beam charged particle beam writer, will form a pattern on a reticle, where some of the shots overlap, where the pattern on the reticle is an OPC-corrected version of an input pattern, and where the sensitivity of the pattern on the reticle to manufacturing variation is reduced. A method for fracturing or mask data preparation is also disclosed.




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Topical skin care formulations comprising plant extracts

Disclosed are topical skin compositions and corresponding methods of their use that include an extract from Artabotrys hexapetalus, an extract from Sassafras tzumu, and an extract from Prunus salicina.




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Segmented soap bar with soap bodies forming concave arc surface

An elongated segmented soap bar is segmented longitudinally into a plurality of soap bodies separate and discrete from one another. Adjacent soap bodies are movable with respect to one another between at least two different configurations including at least an arc configuration with the plurality of soap bodies disposed in an arc. At least one coupler couples the plurality of soap bodies together to allow the adjacent soap bodies to move with respect to one another between the at least two different configurations.




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Targeted performance of hypohalite methods thereof

This invention relates to extend the benefits of using hypochlorite compounds such as sodium hypochlorite to clean and disinfect articles while reducing or eliminating the side effects of treating an article with a strong oxidant material. The invention relates to a single step process involving mixing of precursor compositions of a suitable hypohalite or hypohalous acid with a solution of a reducing agent. Optionally a buffer may be present in either or both precursor compositions, such that at time of use such active hypohalous acid concentration in the resulting aqueous mixture remains at a sufficient activity level to effect one or more desired benefits against a target substrate for a desired period of time. The oxidant is substantially consumed by reaction with the reducing agent after the time needed for achieving the desired benefit has passed.




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Superconducting film-forming substrate, superconducting wire, and superconducting wire manufacturing method

A tape-shaped superconducting film-forming substrate is disclosed, which includes a film-forming face for forming a laminate including a superconducting layer thereon, a rear face that is a face at a side opposite to the film-forming face, a pair of end faces connected to the film-forming face and the rear face, and a pair of side faces connected to the film-forming face, the rear face, and the pair of end faces, in which each of the pair of side faces includes a spreading face that spreads toward an outer side in an in-plane direction of the film-forming face from an edge part of the film-forming face toward the rear face side. A superconducting wire and a superconducting wire manufacturing method are also disclosed.




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Increased normal zone propagation velocity in superconducting segments

There is described herein a superconducting segment and method of making same comprising one or several layers with very high electrical resistivity, acting as a current flow diverter when the current transfers from the superconductor to the stabilizer. The purpose of this current flow diverter is: i) to increase the contact resistance between the superconductor and the stabilizer, by reducing the contact area, and ii) to force the current to flow along a specific path, so as to increase momentarily the current density in a specific portion of the stabilizer. The consequence of i) and ii) is that heat generated at the extremities of the normal zone is increased and spread over a longer length along the superconducting segment, which increases the NZPV and thus, the uniformity of the quench.




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Extracting information from unstructured text using generalized extraction patterns

Methods, systems, and apparatus, including computer program products, for extracting information from unstructured text. Fact pairs are used to extract basic patterns from a body of text. Patterns are generalized by replacing words with classes of similar words. Generalized patterns are used to extract further fact pairs from the body of text. The process can begin with fact pairs, basic patterns, or generalized patterns.




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Method for configuring displets for an interactive platform for analyzing a computer network performance

A method for configuring an interactive platform for monitoring the performance and the quality of a computer network, the monitoring data being suitable to be displayed on a dynamic page of type webpage in a form of graphic components called “displets”; including providing, on the interactive platform a configuration interface in which are defined, for at least one given user, filtering criteria for displaying displets, the criteria being defined in the form of parameters for configuring the rights of the at least one user.




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Information processing apparatus, information processing system, information processing apparatus control method, and storage medium

An information processing apparatus according to this invention, being capable of communicating with a Web server via a network, receives from the Web server a response to a processing request issued to a Web application of the Web server. The information processing apparatus changes, when screen control information described in a header of the response contains information which designates priority of a screen display by a Web browser of the information processing apparatus, priority of the screen display by the Web browser to the designated priority. When an event to display a screen other than a screen by the Web browser occurs while the Web browser presents a screen display corresponding to the response, the information processing apparatus inhibits an interrupt display by the event in order for the designated priority.




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System and method for simultaneous display of multiple information sources

A computerized method of presenting information from a variety of sources on a display device. Specifically the present invention describes a graphical user interface for organizing the simultaneous display of information from a multitude of information sources. In particular, the present invention comprises a graphical user interface which organizes content from a variety of information sources into a grid of tiles, each of which can refresh its content independently of the others. The grid functionality manages the refresh rates of the multiple information sources. The present invention is intended to operate in a platform independent manner.




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Information processing apparatus for displaying screen information acquired from an outside device in a designated color

An information processing apparatus configured to display a user interface on a display unit according to screen information acquired from an outside device changes the screen information according to a display attribute set by a user, and if setting of a display attribute of an object included in the screen information is unchangeable, color conversion processing of a specified object included in the screen information is performed and the screen information obtained by executing conversion processing according to the display attribute set by the user with respect to the screen information including the object which has undergone the color conversion processing is displayed.




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Methods and apparatus to create process control graphics based on process control information

Methods and apparatus to automatically link process control graphics to process control algorithm information are described. An example method involves displaying a first process control image including process control algorithm information and displaying adjacent to the first process control image a second process control image to include process control graphics. The method automatically links at least some of the process control algorithm information to a graphic in the second process control image in response to user inputs associated with the first and second process control images.




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System and method for managing and displaying securities market information

A message screen display comprises a static non-scrollable display area for display of at least part of a first message, the first message having an associated first message time. The message screen display further comprises a scrollable display area for display of at least part of a second message, the second message having an associated second message time. The message screen display further comprises a feature applied to at least part of the first message that varies based on time as referenced to the associated first message time.