A method for virtual channel management is provided. The method includes the following steps. In response to a command, a control unit of a network-based multimedia reproduction system determines whether the command is associated with virtual channel switching. When the command is associated with virtual channel switching, the control unit checks whether a channel value corresponding to the command exists in an application virtual channel table. When the channel value exists in the application virtual channel table, the control unit determines an application corresponding to the channel number from the application virtual channel table, and executes the application. According to a first operation parameter set corresponding to the application, the control unit sets the executed application to retrieve digital contents through a network unit of the network-based multimedia reproduction system.

A digital broadcast receiver on a mobile body includes: a tuner that receives a broadcast signal of a physical channel; a signal intensity detector that detects a signal intensity of the broadcast signal; a current position detector that detects a current position of the mobile body; a movement direction detector that detects a movement direction of the mobile body; a reception judging unit that controls the tuner to judge whether the physical channel can be received; an area information storage unit that stores receivable area information indicating a receivable area of the physical channel; and an area information updating unit that determines, when it is judged that the physical channel can be received, a position apart from the current position in the movement direction according to the signal intensity as a receivable position, and updates the receivable area information to extend the receivable area to the receivable position.

A video-on-demand (VOD) content delivery system has a VOD Application Server which manages a database of templates ordered in a hierarchy for presentation of video content elements of different selected types categorized in hierarchical order. The templates include those for higher-order displays which have one or more links to lower-order displays of specific content. The VOD Application Server, in response to viewer request, displays a high-order templatized display, and in response to viewer selection of a link, displays the lower-order display of specific content. The hierarchical templatized displays enable viewers to navigate to an end subject of interest while having a unique visual experience of moving through a series of displays to the end subject of interest. For example, the higher-order display may be a product ad and the lower-order display may be an ad for a local retailer of the product. Similarly, a viewer can navigate from national product to local product ad, or classified ad category to specific classified ad, or bulletin board topic category to specific posting. In another embodiment, the VOD content delivery system is used to deliver consumer-generated classified ads on TV. A web-based Content Management System receives consumer-generated content uploaded online in industry-standard file formats with metadata for title and topical area, and automatically converts it into video data format compatible with the VOD content delivery system indexed by title and topical area. A User Interface for the system delivers listings data to the viewer's TV indexed by title and topical area, and displays a requested classified ad in response to viewer selection.

An air duct assembly includes upper and lower pliable sheets that can be assembled in a sequence that makes the assembly easier to install and later easier to remove for periodic cleaning. To install the assembly, the upper sheet can be installed first by inserting the edges of the upper sheet within a pair of tracks and then fastening the upper sheet to a vertical supply air duct. An optional airflow modifier (e.g., filter, airflow turning vane, or noise attenuator) can be install where the supply air duct connects to the upper sheet. Once the upper sheet is suspended from the tracks and fastened to the main supply air duct, the lower sheet can be installed separately. Pliable end panels and pliable fasteners (e.g., zipper or VELCRO fastener) can make most of the air duct assembly machine washable. The upper and lower sheets can have different degrees of air permeability.

A method of processing content according to a workflow, where a digital content is processed on one of a plurality of processing devices according to process definition associated to the content, includes the steps, iterated at the processing device, of: a) receiving from a server a signed workflow information, a workflow information comprising a status of the content processing, a signature of the process definition and a hash of the content;b) verifying the workflow information;c) when the workflow information is verified, processing the content according to the process definition and according to status of the content processing;d) updating and signing the workflow information;e) sending to the server the signed workflow information;and the steps iterated at the server of:f) receiving from a processing device a signed workflow information;g) publishing the signed workflow information received from the processing device. A system for performing the method is also provided.

The present invention relates to a method for selecting an appropriate mode when performing a new broadcast, such as a 3D stereo broadcast, a UHDTV broadcast, and a multi-view broadcast, among others, while maintaining compatibility with existing broadcasting channels in an MPEG-2-TS format for transmitting and receiving digital TV, and to a method for recognizing a descriptor. To this end, the present invention suggests providing the descriptor which is related to synthesizing left and right images using the type of stream, existence of the descriptor, and a frame-compatible mode flag.

A process control system user display provides a display image containing control system information. The system may include a digital recording module including an image capture module for making a real-time digital recording of at least a portion of the display image, the image capture module buffering a terminal portion of the real-time digital recording. A storage module may store at least a portion of the real-time digital recording. A real-time digital recording may contain at least a portion of the display image, wherein, at any particular time, the real-time digital recording includes information from the control system for a predetermined duration proximate the particular time, and at least a portion of the real-time digital recording may be stored. A desired portion of the digital recording may be played back, optionally with process control system event and/or continuous history.

A digital camera includes an image capture assembly; a print media transport assembly; a pagewidth ink jet printhead; a roll of print media; an internal chassis serving as a frame on which the image capture assembly, the print media transport assembly, and the printhead are directly supported; and an external casing completely encasing therewithin the internal chassis. The external casing is openable, and the internal chassis together with the assemblies and printhead supported thereon are removable from the external casing. The internal chassis is provided as an integral frame configured with pre-molded fittings adapted to receive and support the assemblies and printhead.

An n-bit counter is formed from cascading counter sub-modules. The counter includes combinatorial control logic coupled to a lower order counter sub-module. The control logic is arranged to clock gate at least one higher order counter sub-module dependent on a logical combination of outputs of the lower order counter sub-module and where the control logic uses pipelining to store at least one previous control logic output for use in determining a later control logic output.

A digital fractional frequency divider for fractionally dividing a digital frequency signal can include a plurality of clock division counter modules, a plurality of sampling modules, and a summing module. The plurality of clock division counter modules can each receive an input clock signal that is phase-shifted from a remaining plurality of input clock signals. Each clock division counter module can generate a long periodic pulse from the received input clock signal. Each sampling module can couple to an output of one of the plurality of clock division counter modules and can generate a short periodic pulse from the long periodic pulse. The summing module can sum the plurality of short periodic pulses to generate a fractional frequency clock signal.

A programmable routing scheme provides improved connectivity both between Universal Digital Blocks (UDBs) and between the UDBs and other micro-controller elements, peripherals and external Inputs and Outputs (I/Os) in the same Integrated Circuit (IC). The routing scheme increases the number of functions, flexibility, and the overall routing efficiency for programmable architectures. The UDBs can be grouped in pairs and share associated horizontal routing channels. Bidirectional horizontal and vertical segmentation elements extend routing both horizontally and vertically between different UDB pairs and to the other peripherals and I/O.

A method and apparatus that controls the clock of a digital circuit, and therefore power consumption, without substantially comprising performance is provided. The apparatus may include monitoring the utilization of a First in First Out (FIFO) buffer. For example in a systems and methods according to the invention, clock speed may be reduced when the FIFO is relatively empty and increased when the FIFO is relatively full. The clock speed may be controlled by a phase locked loop, a clock divider, a clock masking device or a combination of more than one of these methods. Power reduction may also be obtained by controlling the clocking of different stages of a pipelined device. One or more aspects of the inventions may be implemented in combination with other aspects of the invention to further reduce power use.

A digitally controlled oscillator has a high-order ΔΣ modulator configured to be of at least an order higher than a first order and configured to input a digital control signal and output a pseudorandom digital output signal, a first-order ΔΣ modulator configured to input the pseudorandom digital output signal and generate a control pulse signal including a pulse width corresponding to the pseudorandom digital output signal, a low pass filter configured to pass a low frequency component of the control pulse signal, and an oscillator configured to generate a high-frequency output signal whose frequency is controlled based on the control pulse signal outputted by the low pass filter so as to be a frequency corresponding to the digital control signal.

A digitally-controlled oscillator includes a base frequency generator having an odd number of base inverters connected end-to-end to generate an output signal that oscillates at a predetermined frequency and a frequency-adjusting unit connected to the base frequency generator. The frequency-adjusting unit includes a first string of switchable inverters connected in series with each other, the switchable inverters having sizes that decrease from an input end of the first string to the output end of the first string.

The present invention proposes a digital system and method of measuring (estimating) non-energy parameters of the signal (phase, frequency and frequency rate) received in additive mixture with Gaussian noise. The first embodiment of the measuring system consists of a PLL system tracking variable signal frequency, a block of NCO full phase computation (OFPC), a block of signal phase primary estimation (SPPE) and a first type adaptive filter filtering the signal from the output of SPPE. The second embodiment of the invention has no block SPPE, and NCO full phase is fed to the input of a second type adaptive filter. The present invention can be used in receivers of various navigation systems, such as GPS, GLONASS and GALILEO, which provide precise measurements of signal phase at different rates of frequency change, as well as systems using digital PLLs for speed measurements.

An injection locking oscillator (ILO) comprising a tank circuit having a digitally controlled capacitor bank, a cross-coupled differential transistor pair coupled to the tank circuit, at least one signal injection node, and at least one output node configured to provide an injection locked output signal; a digitally controlled injection-ratio circuit having an injection output coupled to the at least one signal injection node, configured to accept an input signal and to generate an adjustable injection signal applied to the at least one injection node; and, an ILO controller connected to the capacitor bank and the injection-ratio circuit configured to apply a control signal to the capacitor bank to adjust a resonant frequency of the tank circuit and to apply a control signal to the injection-ratio circuit to adjust a signal injection ratio.

Disclosed are a phase locked loop (PLL) of a digital scheme and a method thereof. More specifically, disclosed are a digital phase locked loop having a time-to-digital converter (TDC), a digital loop filter (DLF), and a digitally controlled oscillator (DCO), and that is designed to have a constant jitter characteristic at all times even though an operating condition of a circuit varies according to a process, voltage, temperature (PVT) change, and a method thereof.

A current output control device is provided that includes: a current cell array section including plural current cell circuits that are each connected in parallel between a first terminal (power source) and a second terminal (ground) that connect between the first terminal and the second terminal in by operation ON so as to increase control current flowing between the first terminal and the second terminal; and a code conversion section (decoder) that generates signals (row codes, column codes) to ON/OFF control current cells so as to change the number of current cells that connect the first terminal and the second terminal according to change in an externally input code and that inputs the generated signals to the current cell array section.

A method and apparatus for use in a digitally tuning a capacitor in an integrated circuit device is described. A Digitally Tuned Capacitor DTC is described which facilitates digitally controlling capacitance applied between a first and second terminal. In some embodiments, the first terminal comprises an RF+ terminal and the second terminal comprises an RF− terminal. In accordance with some embodiments, the DTCs comprise a plurality of sub-circuits ordered in significance from least significant bit (LSB) to most significant bit (MSB) sub-circuits, wherein the plurality of significant bit sub-circuits are coupled together in parallel, and wherein each sub-circuit has a first node coupled to the first RF terminal, and a second node coupled to the second RF terminal. The DTCs further include an input means for receiving a digital control word, wherein the digital control word comprises bits that are similarly ordered in significance from an LSB to an MSB.

An optical beam scanning apparatus is disclosed, including: a laser source that emits an optical beam, a deflection part that deflects the optical beam, a light receiving part that receives a returning light of the optical beam which is deflected toward the laser source by the deflection part, a signal generation part that generates a synchronization detection signal, and an optical source drive part that conducts a lighting control of the laser source. The light receiving part is arranged in vicinity to the laser source. The signal generation part detects a timing at which the light receiving part receives the returning light, by an output signal from the light receiving part to generate the synchronization detection signal. The optical source drive part conducts the lighting control of the laser source in response to the synchronization detection signal as a reference.

Next generation pervasive wireless ecosystems and mobile information apparatus are herein disclosed and enabling millions of users to migrate to pervasive digital living and enterprise. Wireless communications may include the mobile information apparatus accessing wireless local area network or by direct wireless communication. The mobile information apparatus may include a wireless unit compatible with Bluetooth and/or IEEE802.11. Mobile information apparatus may conduct a local area wireless search within short distances for discovering wireless devices in its vicinity, receive an attribute related to the discovered wireless device, establish secure wireless communication with the discovered wireless device, and transfer or synchronize digital content or applications to/from the discovered wireless device. The discovered wireless device may be other mobile apparatus, wireless televisions, wireless audio devices, wireless speakers, wireless printers, among others, in a digital living room or office. Mobile apparatus may be smart phones, information pads, or laptops with touch sensitive screen interface.

A digital phase locked loop (DPLL), a method of operating the same, and a device including the same are provided. The DPLL includes a digitally-controlled oscillator configured to change a frequency and a phase of an output oscillation signal in response to a digital control code; a main divider configured to divide the frequency of the output oscillation signal and generate a first feedback signal based on the divided frequency; and a phase-to-digital converter configured to subdivide the phase of the output oscillation signal and to generate a quantized code by converting a phase difference between a reference signal and the first feedback signal using a phase-subdivided signal resulting from the subdivision. The digital control code is generated based on the quantized code.

Methods, systems, and apparatuses are described for compensating for an undesired fractional spur due to a PLL in a communication system. The communication system includes a time-to-digital converter (TDC) that is configured to execute in parallel to the PLL. The TDC is configured to determine a phase difference between a reference frequency and an output oscillation signal provided by the PLL. The phase difference is received by a processor to estimate particular characteristics of the undesired fractional spur, and the estimate of the characteristics is used to construct an estimate of the undesired fractional spur.

A circuit includes a power supply terminal and a clock parsing circuit configured to produce multiple clock signals having a common clock period and different phases. The circuit further includes a plurality of digital circuits coupled to the clock parsing circuit and the power supply terminal. Each digital circuit includes an input to receive data and logic to process the data. Each digital circuit is responsive to a phase associated with a respective clock signal of the multiple clock signals to draw current from the regulated power supply terminal to process the data to produce a data output. Additionally, the circuit includes an output timing management circuit coupled to each of the plurality of digital circuits and configured to control data outputs of each of plurality of digital circuits to prevent timing violations at one or more destination circuits.

A computer-implemented method for gain calibration is provided. The method includes sorting the calibration data of each pixel location from the offset-corrected X-ray image data into a sequence. The method also includes removing part of the calibration data from one end or both ends of the respective sequence for each pixel location. The method further includes averaging the calibration data remaining within each respective sequence to obtain an average pixel value for each pixel location. The method yet further includes generating a gain map based on the average pixel value for each pixel location.

Among other things, one or more systems and/or techniques are described for dynamically adjusting, in a fan-angle direction, attenuation of radiation during an examination of an object such that portions of the object that are not represented in resulting (tilted/targeted) images of the object are exposed to less radiation than portions of the object that are represented in resulting (tilted/targeted) images of the object. As a rotating gantry is rotated, blades of a pre-object collimator are dynamically repositioned to selectively attenuate emitted radiation. A collimator adjustment component may be configured to determine how to reposition the blades based at least in part upon at least one of a desired tilt of the resulting (tilted) image(s), a translational position of the object, and a gantry rotation angle, for example.

A digital broadcasting receiving system is provided. A receiving module receives an M number of symbols each carrying an N number of subcarriers of a control signal. A converting module performs FFT on respective kth subcarriers of an ith symbol and an (i+1)th symbol to generate an (i, k)th converted value and an (i+1, k)th converted value. A demodulating module performs differential demodulation on the (i, k)th and (i+1, k)th converted values to generate an (i, k)th demodulation value. A combining module soft-combines the (i, 1)th demodulation value through the (i, N)th demodulation value to generate an ith prediction value corresponding to the ith symbol. A determining module identifies a synchronization segment in the control signal according to the 1st prediction value to the (M−1)th prediction value.

Radio frequency (RF) receivers having whitened digital clocks and related methods are disclosed. Disclosed embodiments generate whitened clocks having random variations that are used to operate digital processing blocks so that interference created by the whitened clocks is seen as white noise within the received RF signal spectrum. RF input signals are received by RF front-ends (RFFEs) that output analog signals associated with channels within the RF input signals. These analog signals are converted to digital information and processed by digital receive path circuitry that outputs digital data associated with the channel. The digital receive path circuitry includes a whitened clock generator that generates a whitened clock having random variations and which a digital processing block that operates based upon the whitened clock. Further, the RFFE and the digital receive path circuitry are located within a single integrated circuit.

A transport stream (TS) generating apparatus, a transmitting apparatus, a receiving apparatus, a digital broadcast system having the above, and a method thereof are provided. The digital broadcast system includes a transport stream (TS) generating apparatus which generates a multi transport stream (TS) by multiplexing a normal stream and a turbo stream having a variable coding rate, a transmitting apparatus which re-constructs the multi TS by processing the turbo stream, and transmits the re-constructed multi TS, and a receiving apparatus which receives the re-constructed multi TS, and decodes the normal stream and the turbo stream respectively, to recover normal data and turbo data. Accordingly, a multi TS, which includes normal stream and a turbo stream of various coding rates, can be transmitted and received efficiently.

Generating a digital-media-enhanced electronic record of a locate and/or marking operation performed by a locate technician. The locate and/or marking operation comprises locating and/or identifying, using at least one physical locate mark, a presence or an absence of at least one underground facility within a dig area, wherein at least a portion of the dig area may be excavated or disturbed during excavation activities. A location of the at least one underground facility and/or the at least one physical locate mark is electronically rendered on a display device so as to generate an electronic visual representation of the locate and/or marking operation. At least one digital media file representation of a corresponding digital media file relating to at least one aspect of the locate and/or marking operation or an environment of the dig area is also electronically rendered on the display device, so as to generate a digital-media-annotated representation of the locate and/or marking operation. Information relating to the digital-media-annotated representation of the locate and/or marking operation is electronically transmitted and/or stored so as to generate the digital-media-enhanced electronic record of the locate and/or marking operation.

The rotary electrical machine is capable of functioning as a generator and outputs a continuous output voltage (Ub+) that is adjustable by an excitation current. The digital regulator (2) of the machine comprises an excitation current control means (7) and a control loop (6) that includes a device (10) for measurement, by sampling, of the output voltage (Ub+), the measurement device generating a signal sampled at a predetermined first sampling frequency (F1 e). The machine has a bandwidth that is limited by a predetermined first cutoff frequency (F1 c). The measurement device includes an apparatus for oversampling such that the first sampling frequency (F1 e) is greater than twice the first cutoff frequency (F1 c), and the control loop also includes an apparatus (12) for decimating the sampled signal.

An amplifier receives an amplitude signal of a polar modulated signal at a base terminal of a transistor and receives a phase modulated carrier signal of the polar modulated signal at the base terminal of the transistor. The amplifier combines the amplitude signal and the phase modulated signal to produce a full complex waveform at a collector terminal of the transistor.

A modulator generates a baseband digital signal from an information-bearing digital signal. The baseband signal has time-varying phase and amplitude defined by a sequence of complex data words, each having an in-phase (I) component and a quadrature (Q) component. A noise-shaping modulator generates a noise-shaped digital signal from the baseband digital signal such that quantization noise in the noise-shaping modulator is attenuated by a spectral null of its noise transfer function. The spectral null is selected by a noise-shaping parameter corresponding to a selected one of a plurality of output frequencies. A signal converter generates an analog signal conveying the information of the information-bearing digital signal on an analog carrier signal having the selected output frequency.

A method for tuning a digital compensation filter within a transmitter includes: obtaining at least one resistance-capacitance (RC) detection result, wherein the digital compensation filter includes an RC compensation module; and tuning the digital compensation filter by inputting the RC detection result into the RC compensation module. For example, the RC detection result may correspond to a detected value representing a product of a resistance value and a capacitance value. In another example, the at least one RC detection result may be obtained by performing RC detection on at least a portion of the transmitter without individually measuring resistance values of resistors therein and capacitance values of capacitors therein. An associated digital compensation filter and an associated calibration circuit are also provided.

A digital pulse width modulation controller includes a pulse width modulation controller, a selection unit having at least one selector, a comparison unit having at least one comparator, and a signal conversion unit having at least one digital-to-analog converter. The digital-to-analog converter generates a reference current and/or voltage. The comparator receives the reference current and/or voltage, and performs a comparison operation to generate a comparison signal based on a feedback signal. The selector selects one selection signal to input into the pulse width modulation controller, which receives other parameters set by a user or the system at the same time so as to control characteristics of the digital pulse width modulation signals, thereby improving the electric properties of a loading circuit.

A frequency modulator includes a digitally-controlled oscillator (DCO) arranged for producing a frequency deviation in response to a modulation tuning word and a phase-locked loop (PLL) tuning word. In addition, another frequency modulator includes a DCO and a DCO interface circuit. The DCO is arranged for producing a frequency deviation in response to an integer tuning word and a fractional tuning word. The DCO interface circuit is arranged for generating the integer tuning word and the fractional tuning word to the DCO, wherein the fractional tuning word is obtained through asynchronous sampling of a fixed-point tuning word.

Embodiments of digital high-speed bi-phase modulator and method for bi-phase modulation are generally described herein. In some embodiments, the digital high-speed bi-phase modulator comprises a high-speed digital divider, a high-speed digital multiplexer, and matched signal paths provided between the divider and the multiplexer. The high-speed digital divider is configured to receive a carrier signal and generate complementary output signals. The high-speed digital multiplexer is configured to switch between the complementary output signals and generate a bi-phase modulated output at a carrier frequency (fc) modulated with a bi-phase code. The bi-phase code may be provided to control inputs of the multiplexer.

The present invention relates to a digital modulation method and a corresponding modulator. The modulator comprises a transcoder (110) followed by a FIFO register (120) and a 2-PSK modulator (130). The transcoder codes a binary word of fixed size into a code word of variable size using a transcoding table. The transcoding table codes at least one first binary word, leading to a first number of phase transitions at the output of the modulator, into a second word of size greater than that of the first word, leading to, at the output of the modulator, a second number of phase transitions less than the first number of phase transitions.

The present invention provides a digitally controlled, current starved, pulse width modulator (PWM). In the PWM of the present invention, the amount of current from the voltage source to the ring oscillator is controlled by the proposed header circuit. By changing the header current, the pulse width of the switching signal generated at the output of the ring oscillator is dynamically controlled, where the duty cycle can vary between 50% and 90%. A duty cycle to voltage converter is used to ensure the accuracy of the system under process, voltage, and temperature (PVT) variations. The proposed pulse width modulator is appropriate for dynamic voltage scaling systems due to the small on-chip area and high accuracy under process, voltage, and temperature variations.

A memristor-based emulator including a memristor circuit for use in digital modulation that includes a first current feedback operational amplifier (CFOA) having multiple terminals in communication with a capacitor Cd and in further communication with a resistor Ri. A second CFOA having multiple terminals is in communication with the first CFOA and is adapted to be in further communication with a voltage vM to provide an input current iM for integration by a capacitor Ci. A nonlinear resistor is in communication with the second CFOA. A third CFOA having multiple terminals is in communication with the nonlinear resistor and is in further communication with the first CFOA and a resistor Rd. The third CFOA and the resistor Rd act as an inverting amplifier associated with the nonlinear resistor to increase a current gain to increase a difference between ON and OFF values of a resistance of a realized memristor.

An analog-to-digital converter can use a variable sampling rate. By using a variable sampling rate analog-to-digital converter and an anti-aliasing filter lower sampling rates, and accordingly, generally lower power consumption may be achieved. For example, a lower sampling rate can be used when it is determined that no undesirable signals are present and a higher sampling period can be used when an undesirable signal is present. Determining the presence of an undesired signal can be based on signal-to-noise ratio, over-sampling, bit error rate, using a detector, etc. An undesirable signal can be any signal that is close in frequency to a signal of interest or a signal farther away in frequency that has a relatively high amplitude. Sampling rate can be varied in a binary fashion, stepwise, continuously, etc.

A machine for distributing blowing wool from a bag of compressed blowing wool is provided. The machine includes a chute having an inlet end configured to receive the bag of compressed blowing wool. A shredding chamber is positioned downstream from the chute and configured to shred and pick apart the blowing wool. The shredding chamber includes a plurality of shredders configured for rotation. Each shredder includes a plurality of paddle assemblies mounted to a shredder shaft. Each paddle assembly has a plurality of paddles. The paddles have a hardness within the range of 60 A to 70 A Durometer to better grip the blowing wool for shredding and prevent jamming of the blowing wool within the shredder.

Circuits and processes for detecting a peak value of an input signal are disclosed. In one example, a peak detector circuit may sample a line sense signal, determine the peak value of the line sense signal during a search window, and output a peak detection signal representative of the determined peak value. In a first mode, the peak detector circuit may cause the peak detection signal to be representative of the determined peak value from an immediately preceding search window. In a second mode, the peak detector circuit may cause the peak detection signal to follow the sampled line sense signal. The peak detector circuit may operate in the second mode in response to the sample of the line sense signal being greater than a peak value of the line sense signal from an immediately preceding search window by more than a threshold amount.

An elastic longitudinal net (1) for longitudinal food products, especially cold meat products, is formed as a sleeve having at least one longitudinal main warp (21) of a tightening chain weave having at least one substantially inextensible thread (213, 214), and at least one weft (3) having at least one elastic fiber and circumferential sections (31), the ends of which are interweaved substantially perpendicularly between the substantially inextensible fiber and longitudinal sections (32) existing between neighboring circumferential sections (31) and running in a concurrent manner relative to and weaved with at least one main warp (21). The longitudinal sections are interweaved through at least one main warp (21) substantially perpendicularly relative to its longitudinal axis, passing through loops (215, 216) of the at least one substantially inextensible thread (213, 214) of the main warp, forming a serpentine run having at least two external loops (321).

A system and method for interactively producing a 3D representation of a vector graphic is disclosed. A vector graphic representing a 2D graphic having a number of endpoints joined by vector segments is automatically or interactively converted into a triangulated mesh in a form readable by a 3D printer. The conversion from vector graphic to a triangulated mesh is accomplished by generating an n-sided polygon in the vicinity of each endpoint of the vector graphic. Each of the vertices of the polygon are then be joined by a line to a corresponding vertex on the next adjacent polygon. Each vertex is also joined to an adjacent vertex on the next adjacent polygon. The process is continued until all polygons are joined, resulting in a triangulated mesh, which is then converted into a format readable by a 3D printer and sent to a 3D printer to produce the 3D representation.

A communication system for communicating with at least one loudspeaker is described where the loudspeaker is connected to audio equipment over standard two-wire speaker wire operable to carry an audio signal. The communication system includes a master node in electrical communication with a signal path carrying the audio signal between the audio equipment and the loudspeaker, the master node also including an interface with the audio equipment, a data encoder operable to encode data signals, a data transceiver operable to place the data signals onto the audio signal at frequencies above audio frequencies. The communication system also includes at least one slave node in electrical communication with the audio signal and each loudspeaker, the slave node including a data transceiver operable to receive data signals from the master node, a data decoder, and an interface able to communicate with the loudspeaker.

A digital sheet-fed printing method includes providing one cycle of printing to print on a series of sheets of paper whose number is equal to the least common multiple of respective numbers of allocated positions; producing a reference signal on the basis of which an image in each color is printed on the sheet of paper; detecting with an image detection sensor means a mutual out of register between images in different colors printed on each sheet of paper in the series, furnishing the printing control means with a detection signal for each sheet of paper from the image detection sensor, and correcting the timing at which each image is printed on each sheet of paper in one cycle of printing so that timings to print the images in different colors on each sheet of paper coincide with one another; and printing images in the different colors.

A system for dampening fluid recovery in an ink-based digital printing system includes a seal manifold having a front seal portion, the front seal portion having an upper wall facing the imaging surface, the upper wall being configured to define an air flow channel with the imaging surface, the upper wall being contoured to form a distance between the upper wall and the imaging surface at an evaporation location that is less than distance between the upper wall and the imaging surface at locations interposing the evaporation location and a vacuum inlet channel of the seal manifold.

A system and corresponding methods are disclosed for depositing of a layer of dampening fluid to a reimageable surface of an imaging member in a variable data lithography system by way of condensation. Dampening fluid in an airborne state is introduced proximate the reimageable surface in a condensation region. Conditions in the condensation region are such that the airborne dampening fluid preferentially condenses on the reimageable surface in a precisely controlled quantity, to thereby form a precisely controlled layer of dampening fluid of desired thickness over the reimageable surface. Among other advantages, improved print quality is obtained.

The embodiments herein disclose a method and a system for creating a singular platform to harness a plurality of technical capabilities in order to deliver multiple digital services such as end user device management, analytics, enterprise mobility, digital identity management, smart device management and so on by orchestrating certain service related support capabilities. The embodiments function as an interface between the user equipment and the applications that are running on several operating systems. Further, an enablement platform is created and modified for a digital ecosystem that sits on the network and user equipment to act as an interface. Essentially, a flexible and extensible API driven platform capable of seamlessly integrating multiple platforms spanning across network services and functions, analytics, device management and orchestration platforms in enabled.