Some embodiments include transistors having a channel region under a gate, having a source/drain region laterally spaced from the channel region by an active region, and having one or more dielectric features extending through the active region in a configuration which precludes any straight-line lateral conductive path from the channel region to the source/drain region. The dielectric features may be spaced-apart islands in some configurations. The dielectric features may be multi-branched interlocking structures in some configurations.

The silicon nitride layer 910 formed by plasma CVD using a gas containing a hydrogen compound such as silane (SiH4) and ammonia (NH3) is provided on and in direct contact with the oxide semiconductor layer 905 used for the resistor 354, and the silicon nitride layer 910 is provided over the oxide semiconductor layer 906 used for the thin film transistor 355 with the silicon oxide layer 909 serving as a barrier layer interposed therebetween. Therefore, a higher concentration of hydrogen is introduced into the oxide semiconductor layer 905 than into the oxide semiconductor layer 906. As a result, the resistance of the oxide semiconductor layer 905 used for the resistor 354 is made lower than that of the oxide semiconductor layer 906 used for the thin film transistor 355.

To provide a semiconductor device which has transistor characteristics with little variation and includes an oxide semiconductor. The semiconductor device includes an insulating film over a conductive film and an oxide semiconductor film over the insulating film. The oxide semiconductor film includes a first oxide semiconductor layer, a second oxide semiconductor layer over the first oxide semiconductor layer, and a third oxide semiconductor layer over the second oxide semiconductor layer. The energy level of a bottom of a conduction band of the second oxide semiconductor layer is lower than those of the first and third oxide semiconductor layers. An end portion of the second oxide semiconductor layer is positioned on an inner side than an end portion of the first oxide semiconductor layer.

It is an object to provide a highly reliable semiconductor device with good electrical characteristics and a display device including the semiconductor device as a switching element. In a transistor including an oxide semiconductor layer, a needle crystal group provided on at least one surface side of the oxide semiconductor layer grows in a c-axis direction perpendicular to the surface and includes an a-b plane parallel to the surface, and a portion except for the needle crystal group is an amorphous region or a region in which amorphousness and microcrystals are mixed. Accordingly, a highly reliable semiconductor device with good electrical characteristics can be formed.

A semiconductor device including a circuit which does not easily deteriorate is provided. The semiconductor device includes a first transistor, a second transistor, a first switch, a second switch, and a third switch. A first terminal of the first transistor is connected to a first wiring. A second terminal of the first transistor is connected to a second wiring. A gate and a first terminal of the second transistor are connected to the first wiring. A second terminal of the second transistor is connected to a gate of the first transistor. The first switch is connected between the second wiring and a third wiring. The second switch is connected between the second wiring and the third wiring. The third switch is connected between the gate of the first transistor and the third wiring.

By applying an AC pulse to a gate of a transistor which easily deteriorates, a shift in threshold voltage of the transistor is suppressed. However, in a case where amorphous silicon is used for a semiconductor layer of a transistor, the occurrence of a shift in threshold voltage naturally becomes a problem for a transistor which constitutes a part of circuit that generates an AC pulse. A shift in threshold voltage of a transistor which easily deteriorates and a shift in threshold voltage of a turned-on transistor are suppressed by signal input to a gate electrode of the transistor which easily deteriorates through the turned-on transistor. In other words, a structure for applying an AC pulse to a gate electrode of a transistor which easily deteriorates through a transistor to a gate electrode of which a high potential (VDD) is applied, is included.

An amorphous oxide thin film containing amorphous oxide is exposed to an oxygen plasma generated by exciting an oxygen-containing gas in high frequency. The oxygen plasma is preferably generated under the condition that applied frequency is 1 kHz or more and 300 MHz or less and pressure is 5 Pa or more. The amorphous oxide thin film is preferably exposed by a sputtering method, ion-plating method, vacuum deposition method, sol-gel method or fine particle application method.

An embodiment of the present invention provides a TFT array substrate including: a base substrate (1) and thin film transistors. The thin film transistor includes a gate electrode (2), a semiconductor layer (5), a semiconductor protective layer, a source electrode (8) and a drain electrode (9). The semiconductor protective layer is disposed adjacent to the semiconductor layer (5) and includes a composite lamination structure, which includes a protective layer formed of an insulating material capable of preventing de-oxygen of the semiconductor layer (5) and an insulating layer formed of an insulating material to be etched more easily.

An object is to manufacture and provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which a semiconductor layer including a channel formation region serves as an oxide semiconductor film, heat treatment for reducing impurities such as moisture (heat treatment for dehydration or dehydrogenation) is performed after an oxide insulating film serving as a protective film is formed in contact with an oxide semiconductor layer. Then, the impurities such as moisture, which exist not only in a source electrode layer, in a drain electrode layer, in a gate insulating layer, and in the oxide semiconductor layer but also at interfaces between the oxide semiconductor film and upper and lower films which are in contact with the oxide semiconductor layer, are reduced.

A transistor device includes a compound semiconductor body having a first surface and a two-dimensional charge carrier gas disposed below the first surface in the compound semiconductor body. The transistor device further includes a source in contact with the two-dimensional charge carrier gas and a drain spaced apart from the source and in contact with the two-dimensional charge carrier gas. A first passivation layer is in contact with the first surface of the compound semiconductor body, and a second passivation layer is disposed on the first passivation layer. The second passivation layer has a different etch rate selectivity than the first passivation layer. A gate extends through the second passivation layer into the first passivation layer.

Interior panels having integrated airbag doors for motor vehicles and methods for making such interior panels are provided herein. In one example, an interior panel comprises a substrate having outer and inner surfaces and an opening extending therethrough. A multi-shot injection molded airbag chute-door assembly is mounted to the substrate and comprises a chute wall that at least partially surrounds an interior space. A door flap portion is pivotally connected to the chute wall and at least partially covers the opening. A perimeter flange extends from the chute wall and has a flange section that overlies the outer surface of the substrate. A molded-in lip feature extends from the flange section and contacts the outer surface to form a seal between the flange section and the substrate. A skin covering extends over the substrate and a foam is disposed between the skin covering and the substrate.

A lightweight folding motorized chair with mechanical traction steering and braking. A folding frame supports the traction wheels and the drive system with hinged frame members configured to mechanically fold the control levers, wheels and periphery components into a substantially flat configuration for easy storage in small spaces. A mix of weight saving choices including: structural materials; mechanical traction control system; lithium ion battery; and overall lightweight design keeps the folding motorized chair at a size and weight that a person can lift into the trunk of a car.

A tool comprising a tool body having an opening defined by interior walls extending into the tool body and a casing disposed within the opening. The tool further includes a scintillator material disposed within the casing and a first compressive member disposed within the tool body at a first axial location. The first axial location extends for a fraction of a total axial length of the casing and exerts a first radially compressive force at the first axial location.

Methods and systems are described for improved drilling operations through the use of real-time drilling data to predict bit wear, lithology, pore pressure, a rotating friction coefficient, permeability, and cost in real-time and to adjust drilling parameters in real-time based on the predictions. The real-time lithology prediction is made by processing the real-time drilling data through a multilayer neural network. The real-time bit wear prediction is made by using the real-time drilling data to predict a bit efficiency factor and to detect changes in the bit efficiency factor over time. These predictions may be used to adjust drilling parameters in the drilling operation in real-time, subject to override by the operator. The methods and systems may also include determining various downhole hydraulics parameters and a rotary friction factor. Historical data may be used in combination with real-time data to provide expert system assistance and to identify safety concerns.

Described herein is a wear indicator (100) for use in a drill bit or a core head. The wear indicator (100) comprises an elongate element that forms part of the drill bit. The elongate element has a plurality of numbers (110, 120, 130, 140, 150, 160, 170, 180) formed along its length, each number (110, 120, 130, 140, 150, 160, 170, 180) being formed as a void and corresponds to a level of wear in accordance with the IADC dull grading system. As the drill becomes worn, the wear indicator (100) wears at the same rate to reveal one of the numbers (110, 120, 130, 140, 150, 160, 170, 180). The numbers range from “1” to “8” where the number “1” illustrates the least wear and the number “8” indicates the most wear. When unworn, none of the numbers are visible.

An arrangement having a piston configured to move along an axial pathway a rotating seal configured to seal an inside environment from an outside environment, the rotating seal configured to be acted upon by a pressure exerted from the piston, a differential pressure sensor measuring a pressure difference between a first fluid from the outside environment and a second fluid on the inside environment, a motor connected to the piston, the motor configured to actuate the piston to a position along an axial pathway and an electronic feedback control system connected to the motor, the electronic feedback system configured to interface with the differential pressure sensor and maintain a pressure generated by the piston onto the rotating seal to a desired pressure.

A method of monitoring a well for unwanted formation fluid influx is disclosed. Measurements of well outflow are acquired during a period in which drilling operations are performed for the well. Occurrences of stagnant flow events during the period are determined. An outflow signature is generated from the well outflow measurements for each stagnant flow event. The outflow signatures are displayed sequentially in time of occurrence. Each outflow signature is analyzed for an anomaly.

A radiation detector is disclosed that includes a scintillation crystal and a plurality of photodetectors positioned to detect low-energy scintillation photons generated within the scintillation crystal. The scintillation crystals are processed using subsurface laser engraving to generate point-like defects within the crystal to alter the path of the scintillation photons. In one embodiment, the defects define a plurality of boundaries within a monolithic crystal to delineate individual detector elements. In another embodiment, the defects define a depth-of-interaction boundary that varies longitudinally to vary the amount of light shared by neighboring portions of the crystal. In another embodiment the defects are evenly distributed to reduce the lateral spread of light from a scintillation event. Two or more of these different aspects may be combined in a single scintillation crystal. Additionally, or alternatively, similar SSLE defects may be produced in other light-guiding elements of the radiation detector.

A sensor includes a collector, an emitter and a base-region barrier formed as an inverted bipolar junction transistor having a base substrate forming a base electrode to activate the inverted bipolar junction transistor. A level surface is formed by the collector, the emitter and the base-region barrier opposite the base substrate such that when the level surface is exposed to charge, the charge is measured during operation of the bipolar junction transistor.

A surface contamination monitoring system/method configured to correct the detected the radioactive net count rate (NCR) value of a whole-body surface contamination monitoring device based on monitored subject height and thickness is disclosed. The system includes a height detection means for determining the height of a monitored subject and a thickness detection means for determining the thickness of at least a portion of the monitored subject. The net count rate (NCR) is corrected based on the determined height and thickness of the monitored subject as applied to site calibration factor data and self-shielding factor data to produce a corrected net count rate (CNR). If the corrected net count rate (CNR) registers above a preset alarm threshold, the monitored subject is considered contaminated and an appropriate alarm is registered.

Disclosed is a scintillator panel provided with on a support a phosphor layer comprising columnar crystals and a protective layer sequentially in this order, wherein degraded areas on lateral surfaces of columnar crystals at an end of the phosphor layer and produced by a cutting treatment account for not less than 0% and not more than 40% of an area of all of the side surfaces of the columnar crystals. A production method of the scintillator panel is also disclosed.

The invention relates to a thermal conduction element (20) for a package for transporting and/or storing radioactive materials, comprising: an internal part (30) intended to be in contact with a lateral body (14) of the package;an external part (34) intended to form a portion of an external envelope (24) of said package, holding radiological protection means (22);an intermediate part (32) arranged between the internal and external parts,the internal, external and intermediate parts being produced from copper and one of the alloys thereof. According to the invention, the external part (34) is equipped, at each of its two opposite ends, with an area (36) for connection by welding to another thermal conduction element (20), each connection area (36) being produced from steel.

A system for measuring properties of a surface under test with surface waves includes a surface wave network including a dielectric substrate, a reactive grid of a plurality of metallic patches on a first surface of the dielectric substrate, a plurality of electronic nodes on the first surface of the dielectric substrate, and a ground plane on a second surface of the dielectric substrate permeable to RF fields of the surface waves, and a controller configured for causing a respective one of the electronic nodes to transmit at least one surface wave and configured for collecting data for signals received by at least one other of the plurality of electronic nodes.

An approach is disclosed for acquiring multi-sector computed tomography scan data. The approach includes activating an X-ray source during heartbeats of a patient to acquire projection data over a limited angular range for each heartbeat. The projection data acquired over the different is combined. An image having good temporal resolution is reconstructed using the combined projection data.

A fluidized bed reactor includes a bottom portion, a roof portion, and side walls vertically extending between the bottom portion and the roof portion, forming a reaction chamber of the reactor. At least one side wall of the reaction chamber forms at least one vertical indentation in the reaction chamber, which indentation extends from the plane of the at least one side wall towards the reaction chamber. The indentation extending from the plane of the at least one side wall towards the reaction chamber is formed of a portion of the at least one side wall, protruding from the plane of the at least one side wall towards the reaction chamber, and the portion of the at least one side wall includes at least two substantially vertical indenting wall portions deviating from the plane of the at least one side wall at vertical lines within a distance from each other.

A grate bar for an incinerator having a grate bar base body and a high temperature resistant cover plate covering the grate bar base body at least on a surface portion which in operation points to a combustion chamber. The cover plate is separated from the grate bar base body by a thermal insulating material. In the grate bar base body a cavity is inserted in a side pointing to the cover plate and/or in the cover plate in the side pointing to the grate bar base body, which cavity is at least partially filled with a ceramic fiber insulating material. The invention further relates to a method for producing such a grate bar.

A semiconductor device, in particular a solar cell, comprises a semiconductor substrate having a semiconductor substrate surface and a passivation composed of at least one passivation layer which surface-passivates the semiconductor substrate surface, wherein the passivation layer comprises a compound composed of aluminum oxide, aluminum nitride or aluminum oxynitride and at least one further element.

Accordingly, a method of forming a metal chalcogenide material may comprise introducing at least one metal precursor and at least one chalcogen precursor into a chamber comprising a substrate, the at least one metal precursor comprising an amine or imine compound of an alkali metal, an alkaline earth metal, a transition metal, a post-transition metal, or a metalloid, and the at least one chalcogen precursor comprising a hydride, alkyl, or aryl compound of sulfur, selenium, or tellurium. The at least one metal precursor and the at least one chalcogen precursor may be reacted to form a metal chalcogenide material over the substrate. A method of forming a metal telluride material, a method of forming a semiconductor device structure, and a semiconductor device structure are also described.

An optoelectronic semiconductor component includes a radiation emitting semiconductor chip having a radiation coupling out area. Electromagnetic radiation generated in the semiconductor chip leaves the semiconductor chip via the radiation coupling out area. A converter element is disposed downstream of the semiconductor chip at its radiation coupling out area. The converter element is configured to convert electromagnetic radiation emitted by the semiconductor chip. The converter element has a first surface facing away from the radiation coupling out area. A reflective encapsulation encapsulates the semiconductor chip and portions of the converter element at side areas in a form-fitting manner. The first surface of the converter element is free of the reflective encapsulation.

Photo-field-effect transistor devices and associated methods are disclosed in which a photogate, consisting of a quantum dot sensitizing layer, transfers photoelectrons to a semiconductor channel across a charge-separating (type-II) heterointerface, producing a sustained primary and secondary flow of carriers between source and drain electrodes. The light-absorbing photogate thus modulates the flow of current along the channel, forming a photo-field effect transistor.

A solar energy collection system can include support devices made with bearings formed from sheet material. These bearings can be optionally formed so as to provide tool-less connections to their associated bearing housings. The bearings can be formed with an open configuration allowing a shaft to be inserted into an open bite of the bearing. Optionally, the bearing can be made from an ultrahigh molecular weight polyethylene plastic material. Additionally, two open-type bearing assemblies can be mounted axially offset and opposed to one another.

A buffer store for a flat web material includes two roller registers having freely rotatable rollers movable relative to one another in a direction radial to a roller axis, thereby forming loops of the web material between the rollers, a piston-cylinder arrangement having a chamber containing a compressible medium and acting as a spring between the registers to generate web tension in the material, and a control-valve arrangement that switches between a first condition, for normal operation, and a second condition, for operation during a fault. In the first condition, the control-valve arrangement connects the cylinder chamber of the piston-cylinder arrangement to a device for providing a constant operating pressure. In the second condition, the control-valve arrangement closes the cylinder chamber of the piston-cylinder arrangement and connects it to a relief valve that relieves pressure therein to a residual pressure significantly smaller than the operating pressure.

According to one embodiment, a tractor comprises a guide shaft, a first belt unit, a second belt unit, a fixing unit and a connecting unit. The first belt unit is supported by the guide shaft so as to move in an axis direction of the guide shaft. The second belt unit is arranged to face the first belt unit in the axis direction of the guide shaft and supported by the guide shaft. The fixing unit, which is movably supported by the guide shaft in the axis direction of the guide shaft and is capable of being fixed on the guide shaft. The connecting unit configured to connect the first belt unit to the fixing unit with a clearance in the axis direction of the guide shaft.

A phase-locked loop double-point modulator may include a frequency divider having a ratio which can be changed by a first modulation signal, and an oscillator, a frequency of which can be changed by a second modulation signal correlated to the first modulation signal. A calibration circuit may be configured, in a calibration mode, to match the gains of the first and second modulation signals based on frequency measurements of the oscillator for two different calibration values of the second modulation signal. The phase-locked double-point modulator may also include an attenuator having a constant ratio greater than 1 and placed in the path of the second modulation signal, and a selector switch configured to be controlled by the calibration circuit to reduce the ratio of the attenuator in the calibration mode.

A modulator generates a baseband digital signal from an information-bearing digital signal. The baseband signal has time-varying phase and amplitude defined by a sequence of complex data words, each having an in-phase (I) component and a quadrature (Q) component. A noise-shaping modulator generates a noise-shaped digital signal from the baseband digital signal such that quantization noise in the noise-shaping modulator is attenuated by a spectral null of its noise transfer function. The spectral null is selected by a noise-shaping parameter corresponding to a selected one of a plurality of output frequencies. A signal converter generates an analog signal conveying the information of the information-bearing digital signal on an analog carrier signal having the selected output frequency.

A signal generator for a transmitter or a receiver for transmitting or receiving RF-signals according to a given communication protocol includes an oscillator and a mismatch compensator. The oscillator is configured to provide a signal generator output signal having a signal generator output frequency and comprises a fine tuning circuit for providing a fine adjustment of the signal generator output frequency based on a fine tuning signal and a coarse tuning circuit for providing a course adjustment of the signal generator output frequency based on a coarse tuning signal. The mismatch compensator is configured to receive the signal generator output signal and compensate a frequency mismatch between a desired signal generator output frequency and the signal generator output frequency generated by the oscillator by providing the fine tuning signal for changing the state of the fine tuning circuit of the oscillator and by providing the coarse tuning signal for changing a state of the coarse tuning circuit of the oscillator. The mismatch compensator provides the coarse tuning signal during a guard period defined in the given communication protocol, during which no RF-signals are transmitted by the transmitter or no RF-signals are to be received by the receiver, such that the state of the coarse tuning circuit is changed within the guard period.

A circuit includes a switched modulator stage combining an information signal with a square wave carrier to produce a first modulated signal; and a second modulation stage forming additional steps in the first modulated signal to produce a second modulated signal.

A rail-to-rail comparator including a first comparison unit connected to a first terminal and configured to compare differential input signals to differential reference voltages; a second comparison unit connected to a second terminal and configured to compare the differential input signals to the differential reference voltages; and an output unit configured to be driven in response to a clock signal and to generate a complementary output signal according to comparison results of the first and second comparison units.

An example PWM includes a driver and a two-way oscillator. The oscillator includes, a first frequency adjust current source, a second frequency adjust current source, a capacitor, a switching reference and a comparator. The capacitor integrates a frequency adjust current by charging with the first frequency adjust current source. The capacitor subsequently integrates a second frequency adjust current by discharging with the second frequency adjust current source. The switching reference outputs a first reference voltage and a second reference voltage responsive to an oscillator signal. The comparator compares the output of the switching reference with a voltage on the capacitor. The first and second frequency adjust current sources vary the first and second frequency adjust currents to vary the frequency of the PWM signal to spread energy of switching harmonics over a frequency band and to reduce EMI.

Methods and apparatus for translating duty cycle information in duty-cycle-modulated signals to higher frequencies or higher data rates. An exemplary duty cycle translator includes a duty cycle evaluator, a high-speed digital counter, and a comparator. The duty cycle evaluator generates a first digital number representing a duty cycle of a low-frequency input duty-cycle-modulated (DCM) signal. The comparator compares the first digital number to a second digital number generated by the high-speed digital counter, and generates, based on the comparison, an output DCM signal having a higher frequency or data rate than the frequency or data rate of the low-frequency input DCM signal but a duty cycle that is substantially the same as the duty cycle of the low-frequency input DCM signal.

A communications transmitter includes a baseband processor configured to generate amplitude, angle, in-phase and quadrature baseband signals and a combination modulator that is configurable to modulate in the polar domain and, alternatively, in the quadrature domain. The combination modulator includes a quadrature modulator and a separate and distinct angle modulator that is configured to serve as a local oscillator for the quadrature modulator. In one embodiment of the invention the combination modulator is configured to modulate in the quadrature domain when the transmitter is operating according to a first communications condition (e.g., first transmit power level or first modulation scheme) and is configured to modulate in the polar domain when the transmitter is operating according to a second communications condition (e.g., second transmit power level or second modulation scheme).

A frequency modulator includes a digitally-controlled oscillator (DCO) arranged for producing a frequency deviation in response to a modulation tuning word and a phase-locked loop (PLL) tuning word. In addition, another frequency modulator includes a DCO and a DCO interface circuit. The DCO is arranged for producing a frequency deviation in response to an integer tuning word and a fractional tuning word. The DCO interface circuit is arranged for generating the integer tuning word and the fractional tuning word to the DCO, wherein the fractional tuning word is obtained through asynchronous sampling of a fixed-point tuning word.

Embodiments of digital high-speed bi-phase modulator and method for bi-phase modulation are generally described herein. In some embodiments, the digital high-speed bi-phase modulator comprises a high-speed digital divider, a high-speed digital multiplexer, and matched signal paths provided between the divider and the multiplexer. The high-speed digital divider is configured to receive a carrier signal and generate complementary output signals. The high-speed digital multiplexer is configured to switch between the complementary output signals and generate a bi-phase modulated output at a carrier frequency (fc) modulated with a bi-phase code. The bi-phase code may be provided to control inputs of the multiplexer.

A radio frequency generator includes a power control module, a frequency control module and a pulse generating module. The power control module is configured to generate a power signal indicating power levels for target states of a power amplifier. The frequency control module is configured to generate a frequency signal indicating frequencies for the target states of the power amplifier. The pulse generating module is configured to (i) supply an output signal to the power amplifier, (ii) recall at least one of a latest power level or a latest frequency for one of the target states of the power amplifier, and (iii) adjust a current power level and a current frequency of the output signal from a first state to a second state based on the power signal, the frequency signal, and at least one of the latest power level and the latest frequency of the power amplifier.

Provided is a method of generating a driving signal for driving a dual mode supply modulator for a power amplifier. The method includes obtaining an envelope of a complex baseband signal to be transmitted, comparing the envelope of the complex signal with a preset threshold value, when a current envelope of the complex signal is the preset threshold value or greater or when there is a result having the preset threshold value or greater in previous N comparisons, outputting a digital board output signal configured with a first logic level through a digital-to-analog converter; and when the current envelope of the complex signal is smaller than the preset threshold value and when there is no result having the preset threshold value or greater in the previous N comparisons, outputting a digital board output signal configured with a second logic level through the digital-to-analog converter.

An ultra-wide band frequency modulator is disclosed. The frequency modulator includes a direct modulation phase lock loop that receives a small component. The frequency modulator also includes a delay module that produces a plurality of delay lines. The frequency modulator further includes an edge selector that receives a large component and the plurality of delay lines.

The present invention provides a digitally controlled, current starved, pulse width modulator (PWM). In the PWM of the present invention, the amount of current from the voltage source to the ring oscillator is controlled by the proposed header circuit. By changing the header current, the pulse width of the switching signal generated at the output of the ring oscillator is dynamically controlled, where the duty cycle can vary between 50% and 90%. A duty cycle to voltage converter is used to ensure the accuracy of the system under process, voltage, and temperature (PVT) variations. The proposed pulse width modulator is appropriate for dynamic voltage scaling systems due to the small on-chip area and high accuracy under process, voltage, and temperature variations.

Systems and methods for operating with oscillators configured to produce an oscillating signal having an arbitrary frequency are described. The frequency of the oscillating signal may be shifted to remove its arbitrary nature by application of multiple tuning signals or values to the oscillator. Alternatively, the arbitrary frequency may be accommodated by adjusting operation one or more components of a circuit receiving the oscillating signal.

A memristor-based emulator including a memristor circuit for use in digital modulation that includes a first current feedback operational amplifier (CFOA) having multiple terminals in communication with a capacitor Cd and in further communication with a resistor Ri. A second CFOA having multiple terminals is in communication with the first CFOA and is adapted to be in further communication with a voltage vM to provide an input current iM for integration by a capacitor Ci. A nonlinear resistor is in communication with the second CFOA. A third CFOA having multiple terminals is in communication with the nonlinear resistor and is in further communication with the first CFOA and a resistor Rd. The third CFOA and the resistor Rd act as an inverting amplifier associated with the nonlinear resistor to increase a current gain to increase a difference between ON and OFF values of a resistance of a realized memristor.

A modulator which has a first terminal to receive a carrier signal, a second terminal to receive a first control signal to control a frequency band of the carrier signal and a third terminal to receive a second control signal to control a modulation depth of the carrier signal.