A process is presented for the increasing the yields of aromatics from reforming a hydrocarbon feedstream. The process includes splitting a naphtha feedstream into a light hydrocarbon stream, and a heavier stream having a relatively rich concentration of naphthenes. The heavy stream is reformed to convert the naphthenes to aromatics and the resulting product stream is further reformed with the light hydrocarbon stream to increase the aromatics yields. The catalyst is passed through the reactors in a sequential manner.

A process for reforming a hydrocarbon stream is presented. The process involves splitting a naphtha feedstream to at least two feedstreams and partially processing each feedstream in separate reactors. The processing includes passing the light stream to a combination hydrogenation/dehydrogenation reactor. The process reduces the energy by reducing the endothermic properties of intermediate reformed process streams.

A process for reforming a hydrocarbon stream is presented. The process involves splitting a naphtha feedstream to at least two feedstreams and partially processing each feedstream in separate reactors. The processing includes passing the light stream to a combination hydrogenation/dehydrogenation reactor. The process reduces the energy by reducing the endothermic properties of intermediate reformed process streams.

Embodiments of methods and apparatuses for isomerization of paraffins are provided. In one example, a method comprises the steps of separating an isomerization effluent into a product stream that comprises branched paraffins and a stabilizer vapor stream that comprises HCl, H2, and C6-hydrocarbons. C6-hydrocarbons are removed from the stabilizer overhead vapor stream to form a HCl and H2-rich stream. An isomerization catalyst is activated using at least a portion of the HCl and H2-rich stream to form a chloride-promoted isomerization catalyst. A paraffin feed stream is contacted with the chloride-promoted isomerization catalyst in the presence of hydrogen for isomerization of the paraffins.

The invention relates to a method for the manufacture of branched saturated hydrocarbons, said method comprising the steps where a feed comprising olefins having at least 10 carbons is simultaneously hydrogenated and isomerized in the presence of hydrogen at a temperature of 100-400° C., under hydrogen partial pressure of 0.01-10 MPa, in the presence of a catalyst comprising a metal selected from the metals of Group VIIIb of the Periodic Table of Elements, a molecular sieve selected from ten member ring molecular sieves, twelve member ring molecular sieves and mesoporous molecular sieves embedded with zeolite, and a carrier, to yield branched saturated hydrocarbons.

Temperatures in microelectronic integrated circuit packages and components may be measured in situ using carbon nanotube networks. An array of carbon nanotubes strung between upstanding structures may be used to measure local temperature. Because of the carbon nanotubes, a highly accurate temperature measurement may be achieved. In some cases, the carbon nanotubes and the upstanding structures may be secured to a substrate that is subsequently attached to a microelectronic package.

Disclosed is a composite material wherein adhesion between a silicon surface and a plating material is enhanced. A method and an apparatus for producing the composite material are also disclosed. The method for producing a composite material comprises a dispersion/allocation step wherein the surface of a silicon substrate (102), which is a matrix provided with a silicon layer at least as the outermost layer, is immersed into a first solution containing gold (Au) ions, so that particulate or island-shaped gold (Au) serving as a first metal and substituted with a part of the silicon layer are dispersed/allocated on the matrix surface, and a plating step wherein the silicon substrate (102) is immersed into a second solution (24), which contains a reducing agent to which gold (Au) exhibits catalyst activity and metal ions which can be reduced by the reducing agent, so that the surface of the silicon substrate (102) is covered with the metal or an alloy of the metal (108) which is formed by autocatalytic electroless plating using gold (Au) as a starting point.

In a method for fabricating a graphene structure, there is formed on a fabrication substrate a pattern of a plurality of distinct graphene catalyst materials. In one graphene synthesis step, different numbers of graphene layers are formed on the catalyst materials in the formed pattern. In a method for fabricating a graphene transistor, on a fabrication substrate at least one graphene catalyst material is provided at a substrate region specified for synthesizing a graphene transistor channel and at least one graphene catalyst material is provided at a substrate region specified for synthesizing a graphene transistor source, and at a substrate region specified for synthesizing a graphene transistor drain. Then in one graphene synthesis step, at least one layer of graphene is formed at the substrate region for the graphene transistor channel, and at the regions for the transistor source and drain there are formed a plurality of layers of graphene.

The disclosure relates generally to a method for fabricating a patterned medium. The method includes providing a substrate with an exterior layer under a lithographically patterned surface layer, the lithographically patterned surface layer comprising a first pattern in a first region and a second pattern in a second region, applying a first masking material over the first region, transferring the second pattern into the exterior layer in the second region, forming self-assembled block copolymer structures over the lithographically patterned surface layer, the self-assembled block copolymer structures aligning with the first pattern in the first region, applying a second masking material over the second region, transferring the polymer block pattern into the exterior layer in the first region, and etching the substrate according to the second pattern transferred to the exterior layer in the second region and the polymer block pattern transferred to the exterior layer in the first region.

Disclosed are an epoxy resin composition and a light emitting apparatus. The epoxy resin composition includes a triazine derivative epoxy resin and an alicyclic epoxy resin.

The disclosure provides an ink jet ink for color filter and a method for preparing the same, as well as a method for preparing of a color filter. The ink jet ink for color filter comprising, by weight, 10 to 50 parts of aqueous nano pigment dispersion and 51 to 95 parts of a cold curing component.

Methods and apparatus for output of high-bandwidth debug data/traces in electronic devices using embedded high-speed debug port(s). Debug data is received from multiple blocks and buffered in a buffer. The buffer's output is operatively coupled to one or more high-speed serial I/O interfaces via muxing logic during debug test operations. The buffered data is encoded as serialized data and sent over the one or more high-speed serial I/O interfaces to a logic device that receives serialized data and de-serializes it to generate parallel debug data that is provided to a debugger. The buffer may be configured as a bandwidth-adapting buffer that facilitates transfer of debug data that is received at a variable combined data rate outbound via the one or more high-speed serial I/O interfaces at a data rate corresponding to the bandwidth of the serial I/O interfaces.

An approach for introspection of a software component and generation of a conditional memory dump, a computing device executing an introspection program with respect to the software component is provided. An introspection system comprises one or more conditions for generating the conditional memory dump based on operations of the software component. In one aspect, a computing device detects, through an introspection program, whether the one or more conditions are satisfied by the software component based on information in an introspection analyzer of the introspection program. In addition, the computing device indicates, through the introspection program, if the one or more conditions are satisfied by the software component. In another aspect, responsive to the indication, the computing device generates the conditional memory dump through the introspection program.

An apparatus includes a first memory, a second memory, a processor configured to perform an initialization process including adding data that generates a first error to initialization data and storing the initialization data together with the added data in the first memory to initialize the first memory, and a controller configured to perform an exchanging process including, when a second error occurs in the second memory during reading or writing data from or to the second memory, copying the data stored in the second memory into the first memory and switching, using a selector, a memory for use in writing and reading data from the second memory to the first memory. The processor is configured to read data from the first memory and the second memory and detect a failure of the selector or a failure of the exchanging process depending on whether the first error occurs or not.

A double data rate memory physical interface having self checking loopback logic on-chip is disclosed. Disposed on the chip is a first linear feedback shift register, which is capable of generating a set of test data values that comprise at least two data bits. Also disposed on the chip is a second linear feedback shift register. The second linear feedback shift register is capable of generating a set of expected data values that match the test data values. Further, an internal loopback error check element is disposed on the chip. The internal loopback error check element is used to compare the set of expected data values with the set of test data values.

An apparatus is equipped with a storage device including an error correction circuit. The apparatus performs a test of the storage device according to a predetermined testing procedure, and records a time-point at which error correction of the storage device has been performed by the error correction circuit during performance of the test. The apparatus determines, with predetermined accuracy, a first position within the storage device on which the error correction has been performed, based on a test speed at which the test is performed, a time-period from the time-point to current time, and a second position within the storage device on which the test is being performed at the current time. Then, the apparatus performs the test predetermined times on a range included in the storage device and including the first position, according to a testing procedure that has been used at the time-point.

A logical operations functional block for an execution unit of a processor includes a first input data link for a first operand and a second input data link for a second operand. The execution unit includes a register connected to an error correction code detection unit. The logical operations functional block includes a look-up table configured to receive an error correction code syndrome from the error correction code detection unit. The logical operations functional block also includes a multiplexer configured to receive an output signal from the look-up table at a first input and the first operand at a second input, wherein an output of the multiplexer is coupled to the first input data link of a logical functional unit.

Embodiments of apparatus and methods for error detection and correction are described. A codeword may have a data portion and associated check bits. In embodiments, one or more error detection modules may be configured to detect a plurality of error types in the codeword. One or more error correction modules coupled with the one or more error detection modules may be further configured to correct errors of the plurality of error types once they are detected by the one or more error detection modules. Other embodiments may be described and/or claimed.

A method of operating a memory controller to control a memory device includes reading a read vector from the memory device and correcting one or more errors in the read vector, where a power consumed at the correcting is varied according to the number of errors in the read vector.

A packet transmission/reception apparatus and method is provided. The packet transmission method of the present invention includes acquiring a source payload including partial source symbols from a source block, generating a source packet including the source payload and an identifier (ID) of the source payload, generating a repair packet including a repair payload corresponding to the source payload and an ID of the repair payload, generating a Forward Error Correction (FEC) packet block including the source and repair packets, and transmitting the FEC packet block. The source payload ID includes a source payload sequence number incrementing by 1 per source packet. The packet transmission/reception method of the present invention is advantageous in improving error correction capability and network resource utilization efficiency.

A method for providing error detection and/or correction to an array of storage cells includes determining a sensitive direction and an insensitive direction of the storage cells and adding a first error control mechanism to the array of storage cells in the insensitive direction. The method also includes adding a second error control mechanism to the array of storage cells in the sensitive direction. The second error control mechanism has a higher Hamming distance than the first error control mechanism.

The present invention discloses a method and apparatus for processing and error correction of a GFP-T superblock, where the 64 bytes of payload data of a first superblock are buffered in the first page of a two-page buffer. The flag byte is buffered in a separate buffer, and a CRC operation is performed in a separate logic element. The result of the CRC operation is checked against a single syndrome table which may indicate single- or multi-bit errors. As the payload data of the first superblock is processed and read out of the first page of the two-page buffer, the payload data of a second superblock is written into the second page of the two-page buffer to be processed and corrected.

A method for decoding and checking a tail-biting convolutional code is provided. The method fully utilizes structural features of the tail-biting convolutional code to re-sort Log-Likelihood Ratio (LLR) values input into a decoder, and by reconstructing a derivative generator polynomial of a convolutional code, allows the decoder to output in serial according to a normal ordering of information bits during backtracking, that is, a first bit of an information sequence is first decoded successfully. Thus, CRC checking may be activated as soon as possible, so that part of the backtracking process and the CRC checking may be performed in parallel, thereby achieving the objective of reducing a processing time delay in decoding and checking the tail-biting convolutional code.

A method is provided for receiving a signal. The method includes receiving a signal transmitted in a radio frequency (RF) band including at least one RF channel, demodulating the received signal, parsing a preamble of a signal frame including layer-1 information from the demodulated signal, deinterleaving bits of the layer-1 information, decoding the deinterleaved bits using an error correction decoding scheme including a shortening scheme and a puncturing scheme and obtaining physical layer pipes (PLPs) from the signal frame using the error-correction-decoded layer-1 information.

Generating error data associated with decoding data is disclosed, including: processing an input sequence of samples associated with data stored on media using a detector and a decoder during a global iteration; and generating one or more error values based at least in part on one or more decision bits output by the detector or the decoder and the input sequence of samples.

The present disclosure relates to a method for detecting a parity error in a sequence of DQPSK symbols of a digital transmission system, comprising determining a first demodulated symbol r1; determining a second demodulated symbol r2; determining a first parity symbol p1; determining a second parity symbol p2; determining a super-parity symbol q1; and detecting a parity error in the sequence of DQPSK symbols by comparing a combination of the first parity symbol p1 and the second parity symbol p2 against the super-parity symbol q1, wherein a parity between two DQPSK symbols describes a phase difference between the two DQPSK symbols.

A wireless communication system including a sender apparatus having a plurality of transmitting antennas that performs MIMO transmission of a plurality of data blocks; and a receiver apparatus that receives the plurality of data blocks. The sender apparatus transmits a process number via a control channel different from a data channel to the receiver apparatus, and wherein when the MIMO diversity transmission is performed, the receiver apparatus performs HARQ processing in the received data blocks based on not a process number which prevents the data blocks from competing but the received process number from the sender apparatus.

The present disclosure includes apparatus (e.g., computing systems, memory systems, controllers, etc.) and methods for providing data integrity. One or more methods can include, for example: receiving a number of sectors of data to be written to a number of memory devices; appending first metadata corresponding to the number of sectors and including first integrity data to the number of sectors, the first metadata has a particular format; generating second integrity data to be provided in second metadata, the second integrity data corresponding to at least one of the number of sectors (wherein the second metadata has a second format); and generating third integrity data to be provided in the second metadata, the third integrity data including error data corresponding to the second integrity data and the at least one of the number of sectors.

An apparatus and method for the granulation of radioactive waste in which a preprocessing method for the vitrification of radioactive waste is simplified to conform to onsite conditions of a nuclear power plant, additives are improved, and pellets suitable for vitrification are manufactured. The apparatus for the granulation of radioactive waste includes: a body frame having an inlet and an outlet; a hopper supplying the radioactive waste to be transferred and fed through the inlet; a feeder transferring/supplying the radioactive waste supplied to a specific position and in a certain quantity; a stirrer pulverizing/mixing lumps of the radioactive waste supplied; an additive supply part supplying a lubricant to the radioactive waste fed into the stirrer; and a pellet press pressing the radioactive waste fed through the feeder into a pellet shape and discharging the pellet through the outlet.

A continuous process for the thermal treatment of a refinery sludge, comprising the following operations: a. drying of the refinery sludge, possibly mixed with pet-coke, at a temperature ranging from 110 to 120° C.; b. gasification of the dried sludge, at a temperature ranging from 750 to 950° C., for a time of 30 to 60 minutes, in the presence of a gas containing oxygen and water vapour, with the associated production of synthesis gas (CO+H2) and a solid residue; c. combustion of the synthesis gas at a temperature ranging from 850 to 1,200° C. and recycling of the combustion products for the drying and gasification phases; and d. inertization of the solid residue, at a temperature ranging from 1,300 to 1,500° C., by vitrification with plasma torches.

An organic synthesis of materials to achieve removal of low molecular weight ionic species, such as transition metal ions including cobalt, iron, nickel, and zinc, from aqueous solutions. The synthesis includes the steps of providing a cation exchange resin, functionalizing the cation exchange resin using a chloride intermediate to form a sulfonyl chloride resin, and reacting a multi-amine based ligand with the sulfonyl chloride resin to form a sequestration resin. The synthesis further includes the steps of cooling the sequestration resin, and washing and drying the sequestration resin.

An apparatus for recovering valuable elements is provided herein. In some embodiments, the apparatus having a conveyor; a container configured to be moved on the conveyor, wherein the container has an open surface; a paper package which contains a mixture containing valuable elements, the paper package being configured to be disposed in the container and to be combusted; a cover that covers the open surface of the container, the cover having an opening for discharging valuable elements vaporized from the mixture; a microwave oven through which the container having the cover and the paper package passes, wherein the microwave oven having a microwave generator and a discharging opening for discharging the valuable elements vaporized from the mixture; and a condenser coupled to the discharge opening, wherein the condenser recovers the valuable elements vaporized from the mixture.

A decontamination method of solid-state material contaminated by radiocesium comprising bringing the solid-state material containing radiocesium in contact with a first processing solution and preferably eluting cesium ion from the solid-state material to the liquid phase under the presence of potassium ion or ammonium ion.

A method for sequestrating arsenic oxides, comprising forming an insoluble and stable glass incorporating a fully oxidized form of arsenic generated by oxidation of an initial lower oxide of arsenic and stabilization by calcium salt formation. The glass composition for sequestration of arsenic comprises from 50 to 75% silica; from 0.5 to 3% Al2O3; from 1 to 15% MnO; from 5 to 15% CaO; from 1 to 20% As2O5 and from 8 to 14% Na2O, less than four percent of iron oxides, magnesium oxide and other oxides.

Embodiments of this disclosure relate to tissue digestion and, more particularly, to methods and apparatuses for varying the number, size, and/or location of one or more tissue compartments within a digestive fluid vessel. Some examples include partitions that may be selectively positioned within a vessel (and may be selectively removable from the vessel) to create one or more tissue compartments. The partitions may be positioned, repositioned and rearranged within the vessel to form one or more tissue compartments. The partitions may be solid or include apertures, and may be oriented in horizontally and/or vertically. Alternate embodiments include one or more selectively closeable apertures that permit digestive fluid to circulate along alternate pathways, which can permit tissue digestion with reduced digestive fluid levels. Still further embodiments include baskets that are selectively positionable within the tissue digester. The baskets may also include one or more selectively positionable and/or repositionable partitions.

The invention provides a method and apparatus for creating plasma particles and applying the plasma particles to a liquid. Liquid feedstock (e.g., water and/or hydrocarbons mixed with biomass) is pumped through a pipeline; the single-phase stream is then transformed into a biphasic liquid-and-gas stream inside a chamber. The transformation is achieved by transitioning the stream from a high pressure zone to a lower-pressure zone. The pressure drop may occur when the stream further passes through a device for atomizing liquid. Inside the chamber, an electric field is generated with an intensity level that exceeds the threshold of breakdown voltage of the biphasic medium leading to a generation of a plasma state. Furthermore, the invention provides an energy-efficient highly adaptable and versatile method and apparatus for sanitizing water using plasma particles to inactivate biological agents contaminating water.

Method and apparatus for disposal of used home medication which comprises an outer container being sealable and disposable containing an inner water-soluble packet/bag of gelling agent and coloring agent for stabilizing the used medication wherein the outer container comprises a foil-type container having a double sealing mechanism including a first zip lock sealing portion and a second self-sticking sealing portion to insure that the contents are safely sealed prior to disposal in a conventional home solid waste disposal unit.

A method and apparatus for distributing objects. In one embodiment, the method comprises computing a modulus operand based on a number of objects to be distributed and a number of objects pertaining to a first category; computing a modulus operation based on a number of distributed objects and the modulus operand; and distributing a first object or a second object based on a result of computing the modulus operation.

The generation of individual-specific information having a good reliability and uniqueness is made possible with a little circuit scale. For this purpose, in an individual-specific information generation apparatus, a plurality of digital circuits are in the same circuit configuration. Each of the digital circuits outputs a fixed or a random number output value individually without their output with respect to a certain input being determined unambiguously among the digital circuits. In each of the digital circuit, an order is defined in advance. A random number judgment unit judges whether the output value is a random value or fixed, for each of the plurality of digital circuits. An individual-specific information generation unit generates the individual-specific information based on information of the order defined in the digital circuit judged by the random number judgment unit as having a fixed output value among the plurality of digital circuits and the output value.

Disclosed is a processor that is able to efficiently execute DFT operations without having part of a basic operational circuit idle even during non-DFT-operation processing. The processor (1) has an operational means (operation unit) (2) and a control means (control unit) (3). The operation means (2) has a plurality of shift addition-and-subtraction means connected such that CORDIC (COordinate Rotation DIgital Computer) operations can be executed. The shift adding-and-subtracting means also execute shift addition-and-subtraction processing of butterfly operations that process shift addition-and-subtraction for one stage or more. The control means (3) instructs the operation means (2) to execute either CORDIC operations or butterfly operations, based on a plurality of data received from the outside.

A circuit arrangement and method couple a hardware-based pseudorandom number generator (PRNG) to an execution unit in such a manner that pseudorandom numbers generated by the PRNG may be selectively output to the execution unit for use as an operand during the execution of instructions by the execution unit. A PRNG may be coupled to an input of an operand multiplexer that outputs to an operand input of an execution unit so that operands provided by instructions supplied to the execution unit are selectively overridden with pseudorandom numbers generated by the PRNG. Furthermore, overridden operands provided by instructions supplied to the execution unit may be used as seed values for the PRNG.

An independently functioning or centrally controlled wall light switch is configured to operate in normal mode and a Jewish holiday mode wherein the state of the light is fixed, regardless of the user's physical manipulation of the light switch. The control system automatically activates holiday mode by combining a geographically determined Jewish religious clock executed by software and hardware that utilizes the current time, date and geographical location of the apparatus in accordance with the Jewish definition of time and laws for calculating numerous religiously significant shifting daily points in time. The control system further incorporates several energy saving and preference modes by utilizing a particular day's calculated religious points in time in conjunction with holiday behavior patterns common to most Jewish families to provide the user with a greatly simplified means of programming an automatically adjusting on/off light timer and dimming overlay functionality during holiday mode.

Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding to a first architectural register. A functional unit operates responsive to a control signal, to convert a first packed first format value selected from a set of packed first format values into a plurality of second format values. Each of the first format values has a plurality of sub elements having a first number of bits The second format values have a greater number of bits. The functional unit stores the plurality of second format values into an architectural register.

Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding to a first architectural register. A functional unit operates responsive to a control signal, to convert a first packed first format value selected from a set of packed first format values into a plurality of second format values. Each of the first format values has a plurality of sub elements having a first number of bits The second format values have a greater number of bits. The functional unit stores the plurality of second format values into an architectural register.

In accordance with one or more aspects, an initial output string is generated by a random number generator. The initial output string is sent to a random number service, and an indication of failure is received from the random number service if the initial output string is the same as a previous initial output string received by the random number service. Operation of the device is ceased in response to the indication of failure. Additionally, entropy estimates for hash values of an entropy source can be generated by an entropy estimation service based on hash values of various entropy source values received by the entropy estimation service. The hash values can be incorporated into an entropy pool of the device, and the entropy estimate of the pool being updated based on the estimated entropy of the entropy source.

Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding to a first architectural register. A functional unit operates responsive to a control signal, to convert a first packed first format value selected from a set of packed first format values into a plurality of second format values. Each of the first format values has a plurality of sub elements having a first number of bits The second format values have a greater number of bits. The functional unit stores the plurality of second format values into an architectural register.

Method, apparatus, and program means for performing a conversion. In one embodiment, a disclosed apparatus includes a destination storage location corresponding to a first architectural register. A functional unit operates responsive to a control signal, to convert a first packed first format value selected from a set of packed first format values into a plurality of second format values. Each of the first format values has a plurality of sub elements having a first number of bits The second format values have a greater number of bits. The functional unit stores the plurality of second format values into an architectural register.

A random number generation method and apparatus using a low-power microprocessor is provided. In the random number generation method, a low-power microprocessor determines whether external power is supplied to a random number generator. The low-power microprocessor updates an internal state of the random number generator based on a first scheme if it is determined that the external power is supplied to the random number generator. The low-power microprocessor updates the internal state of the random number generator based on a second scheme different from the first scheme if it is determined that the external power is not supplied to the random number generator.

A function f(x) is calculated with a calculating apparatus that makes a correct calculation with a low probability. Provided that G and H are cyclic groups, f is a function that maps an element x of the group H into the group G, X1 and X2 are random variables whose values are elements of the group G, x1 is a realized value of the random variable X1, and x2 is a realized value of the random variable X2, an integer calculation part calculates integers a' and b' that satisfy a relation a'a+b'b=1 using two natural numbers a and b that are relatively prime. A first randomizable sampler is capable of calculating f(x)bx1 and designates the calculation result as u. A first exponentiation part calculates u'=ua. A second randomizable sampler is capable of calculating f(x)ax2 and designates the calculation result as v. A second exponentiation part calculates v'=vb. A determining part determines whether u'=v' or not. A final calculation part calculates ub'va' in a case where it is determined that u'=v'.

The disclosure is related systems and methods for using operation durations of a data storage medium to generate random numbers. In one embodiment, a device may comprise a random number generator circuit configured to store a value representing a duration of an operation on the data storage medium, and generate a random number based on the value. Another embodiment may be a method comprising recording durations of access operations to a data storage medium, and generating a random number based on the durations.