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Liquid crystal display device

It is an object of the present invention to apply a sufficient electrical field to a liquid crystal material in a horizontal electrical field liquid crystal display device typified by an FFS type. In a horizontal electrical field liquid crystal display, an electrical field is applied to a liquid crystal material right above a common electrode and a pixel electrode using plural pairs of electrodes rather than one pair of electrodes.




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Liquid crystal display device

A liquid crystal display device is provided, which includes a thin film transistor including an oxide semiconductor layer, a first electrode layer, a second electrode layer having an opening, a light-transmitting chromatic-color resin layer between the thin film transistor and the second electrode layer, and a liquid crystal layer. One of the first electrode layer and the second electrode layer is a pixel electrode layer which is electrically connected to the thin film transistor, and the other of the first electrode layer and the second electrode layer is a common electrode layer. The light-transmitting chromatic-color resin layer is overlapped with the pixel electrode layer and the oxide semiconductor layer of the thin film transistor.




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Constant-temperature equipment

Constant-temperature equipment wherein mechanical and electrical structures are eliminated from the inside of a temperature-controlled chamber (15) by using a non-contact magnetic arrangement as a drive transmission for a sample table (5) and a sample table drive mechanism (6), thus reducing failure and enhancing maintainability. In addition, a conveyance mechanism (11) is provided with a pass box adjacent which sliding shielding plates (9) are stacked vertically, and the shielding plates (9) are linked with the conveyance mechanism (11) by an engaging mechanism provided in the conveyance mechanism (11) to allow the plates to be opened and closed by a travel mechanism (12), thus simplifying the structure and minimizing change in atmosphere during conveying. The sample table drive mechanism (6) and the conveyance mechanism (11) can be attached removably to the temperature-controlled chamber (15) to permit sterilization at high temperature.




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Constant-temperature equipment

Provided is constant-temperature equipment wherein maintenance is facilitated with the least failure, and highly reliable culturing and testing can be carried out. Mechanical and electrical structures are eliminated from the inside of a temperature-controlled chamber (15) by using a non-contact magnetic arrangement as a drive transmission for a sample table (5) and a sample table drive (6), thus reducing failure and enhancing maintainability. In addition, a conveyor (11) is provided with a pass box to minimize change in atmosphere during conveying. The sample table drive (6) and the conveyor (11) can be attached removably to the temperature-controlled chamber (15) to permit sterilization at high temperature.




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Methods and systems for manipulating particles using a fluidized bed

The present invention comprises methods and systems for manipulation of media and particles, whether inert materials or biomaterials, such as cells in suspension cell culture. The methods and systems comprise use of an apparatus comprising a rotating chamber wherein the actions of the combined forces fluid flow force and centrifugal force form a fluidized bed within the rotating chamber.




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Premium class aircraft passenger suite

A premium class passenger suite that includes a main seat positioned in the suite together with separate bed. The bed has a flexible mattress of predetermined dimensions and is movable between a stowed position to one side of the main seat and a deployed position above and separate from the main seat. A drive apparatus is provided for driving the bed between the stowed and deployed positions. The main seat is configured to be movable between a seating position when the bed is stowed, and a stowed position with a lowered seat back when the bed is deployed for use.




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Height adjustment mechanism suitable for a footring

A mechanism for vertically adjusting a component on a shaft has a collet sleeve riding on the shaft. A spiral track of the component's hub receives a radially outwardly projecting pin on the collet sleeve. The outer surface of the collet sleeve and the inner surface of the hub are tapered so that the hub can rotated one direction to advance the hub on the collet sleeve and compress the collet sleeve onto the shaft to frictionally lock the collet sleeve to the shaft. Because the hub is joined to the collet sleeve by the pin, this also locks the vertical position of the component. Conversely, the hub can be oppositely rotated to release the compression of the collet sleeve so that the collet sleeve, and therefore the vertical component, is slidable on the shaft.




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Resonance circuit with variable diodes

A resistance having a high impedance is connected between anode terminals of two variable capacitance diodes sharing a cathode, and the components described above are sealed in one package. The resistance can be formed of a diffusion region between p-regions of the variable capacitance diodes or can be formed of polysilicon and disposed on a chip. Thus, the resistance can be mounted while a chip size of the variable capacitance diode is maintained. Accordingly, it is not required that a bias resistance having a high impedance is additionally provided, whereby achieving reduction in the substrate mounting area and reduction in costs of the set.




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Inductor Q factor enhancement apparatus has bias circuit that is coupled to negative resistance generator for providing bias signal

The present invention provides an apparatus for enhancing Q factor of an inductor. The apparatus includes a negative resistance generator coupled to the inductor for providing a negative resistance, and a bias circuit coupled to the negative resistance generator for biasing the negative resistance generator.




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Variable tuning circuit using variable capacitance diode and television tuner

The invention provides a variable tuning circuit capable of extending a variable range in a high frequency band, ensuring the value of L of an inductor to increase the value of Q of a circuit in a low frequency band, and preventing a reduction in gain, an increase in noise, and unstable oscillation. A variable tuning circuit includes: a first parallel resonance circuit that includes a varactor diode, a capacitor connected in series to the varactor diode, and a first inductor connected in parallel to the varactor diode and the capacitor; and a second parallel resonance circuit that includes a second inductor connected in parallel to the varactor diode with a direct current cut-off capacitor interposed therebetween. When the varactor diode has a maximum capacitance, a resonant frequency of the second parallel resonance circuit is set about a lowest frequency in a variable frequency range.




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Double-tuning circuit of television tuner

In a double-tuning circuit including a primary tuning circuit having a first inductor and a first variable capacitive element connected in parallel and a secondary tuning circuit having a second inductor and a second variable capacitive element connected in parallel, a fixed part of a copper-foil pattern is connected to a connection point at which the double-tuning circuit is connected to an input terminal of a frequency mixing circuit, and a tip part of the copper-foil pattern extends to near the first inductor, whereby a trap circuit for attenuating an image frequency component is formed. A pattern is formed between a ground-side terminal of the first inductor and the ground, and a capacitor is connected between a connection point at which the first inductor is connected to one terminal of the pattern and a ground-side terminal of the second variable capacitive element.




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Physiological data acquisition and management system for use with an implanted wireless sensor

Aspects and embodiments of the present invention provide a system for obtaining, processing and managing data from an implanted sensor. In some embodiments, a patient or other persons can use a flexible antenna to obtain data from the implanted sensor. The flexible antenna includes at least one transmit loop and at least one receive loop. The transmit loop is adapted to propagate energizing signals to the implanted sensor. The receive loop is adapted to detect a response signal from the implanted sensor. The transmit loop includes a capacitor formed by a discontinuous area. The capacitor is adapted to allow the loop to be tuned. The flexible antenna can communicate with a patient device that collects the data from the implanted sensor, creates a data file and transmits the data file to a remote server over a network. A physician or other authorized person may access the remote server using an access device.




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Tuner and transformer formed by printed circuit board thereof

A tuner and a transformer formed by printed circuit board thereof are provided. The transformer includes a first winding and a second winding. In which, the first winding forms a first inductor and the second winding forms a second inductor. The transformer is formed by the first and the second inductors, wherein the first winding and the second winding are formed by conducting wires of a printed circuit board.




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Memory cell based array of tuning circuit

A method applied in a tuning circuit comprising a plurality of turning cells is disclosed. the method comprises: laying out a array of tuning cells in a matrix configuration, the matrix comprising a first dimension and a second dimension; assigning a first index associated with the first dimension and a second index associated with the second dimension to each tuning cell; controlling each tuning cell using a word line and a bit line; and summing up outputs from all tuning cells to form a combined output. The tuning cell provides a first circuit value or a second circuit value according to the logical value of the bit line, and the difference between the first circuit value and the second circuit value is determined such that a turning resolution of the tuning circuit is determined.




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Tuner circuit with loop through function

The tuner circuit comprises a HF input and a HF output with a loop through function, wherein a variable capacitance diode is coupled with a first terminal to the HF input and with a second terminal to the HF output for providing a passive loop through function. The variable capacitance diode is in particular in a passing mode, when no DC reverse voltage is applied, for providing a passive loop through function. In a preferred embodiment, the tuner circuit is designed for reception of television channels, and for the variable capacitance diode one or two tuning variable capacitance diode is used being designed for satellite tuners with a frequency range of 1-2 GHz, or a specially designed variable capacitance diode with a capacitance ratio C1/C25>18 at a frequency of 1 MHz for DC reverse voltages of 1 and 25 Volts is used.




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TWACS pulse inductor reversal circuit

A circuit (C1-C4) is employed in a TWACS transponder (T) installed in an electric meter (M). The transponder generates inbound signals (IB) transmitted from the location of the electric meter to a central location (R). Firmware (F) within the transponder controls the flow of current for each pulse through the circuit by triggering a semi-conductor device such as a SCR (X1) or TRIAC (X2). The resulting current flow through the inductor for a subsequent pulse, regardless of the pulse's polarity, will be in the opposite direction to that of the previous pulse. The result is to maintain a constant level of magnetization of the inductor core which does not have to be overcome by energy in the subsequent pulse resulting in amplitude of all the pulses imposed on an AC waveform being substantially the same.




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Trimming circuit for clock source

A semiconductor trimming circuit includes parallel coupled PMOS devices coupled in parallel with parallel coupled NMOS devices and an additional pair of dummy NMOS devices. The dummy NMOS devices are coupled in parallel with the NMOS devices. A trimming circuit for an internal clock source may be formed with an array of such switches for selecting one or more trimming capacitors of the trimming circuit. Such an array has a low leakage current and permits good trimming linearity.




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Method and apparatus for use in digitally tuning a capacitor in an integrated circuit device

A method and apparatus for use in a digitally tuning a capacitor in an integrated circuit device is described. A Digitally Tuned Capacitor DTC is described which facilitates digitally controlling capacitance applied between a first and second terminal. In some embodiments, the first terminal comprises an RF+ terminal and the second terminal comprises an RF− terminal. In accordance with some embodiments, the DTCs comprise a plurality of sub-circuits ordered in significance from least significant bit (LSB) to most significant bit (MSB) sub-circuits, wherein the plurality of significant bit sub-circuits are coupled together in parallel, and wherein each sub-circuit has a first node coupled to the first RF terminal, and a second node coupled to the second RF terminal. The DTCs further include an input means for receiving a digital control word, wherein the digital control word comprises bits that are similarly ordered in significance from an LSB to an MSB.




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For in-field control module for managing wireless seismic data acquisition systems and related methods

An exemplary system for managing the deployment of a seismic data acquisition system uses a module configured to execute a plurality of task in the field by receiving one or more seismic devices. The module may include a power source that provides electrical power to the seismic devices. The module may also include a processor programmed to retrieve data stored in the seismic devices, perform diagnostics, facilitate inventory and logistics control, configure seismic devices and update data or pre-programmed instructions in the seismic device.




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Backlight unit with controllers of air and fluid and display device having the same using two different lights

Provided are a backlight unit and a display device having the same. The backlight unit includes a case having an opening, at least one lamp assembly disposed on a side surface of the case and including a light source, an optical transreflective unit on the case, the optical transreflective unit transmitting a portion of first light passing through the opening and reflecting a portion of second light generated from the light source, and an optical sheet including a first diffusion unit on the optical transreflective unit.




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Liquid crystal display device

A liquid crystal display (LCD) device capable of reducing the number of printed circuit boards (PCBs) and the number of signal transmitters, and thus reducing manufacturing costs, is disclosed. The LCD device includes a liquid crystal panel having a display to display an image, a plurality of data drive integrated circuits (ICs) connected between one-side portion of the liquid crystal panel and a source PCB, to drive data lines arranged on the display of the liquid crystal panel, a light source unit to provide light to the liquid crystal panel, and a unified board formed with a light source driver to drive the light source unit, and a drive circuit to drive the data drive ICs.




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Guide tube, guide tube apparatus, and endoscope system

A guide tube having a tube; a ciliary portion including many cilia inclined in a longitudinal direction of the tube, provided in an outer peripheral portion of the tube; and a vibration portion provided on the tube for vibrating the ciliary portion so as to move the tube in the longitudinal direction.




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Liquid crystal display device

According to one embodiment, a liquid crystal display device includes a first substrate including a gate line extending in a first direction, a source line including an oblique line portion extending in a third direction which crosses at an acute angle a second direction perpendicular to the first direction, a pixel electrode including an oblique electrode portion extending in the third direction, and a first alignment film covering the pixel electrode, a second substrate including a counter-electrode which is opposed to the pixel electrode, and a second alignment film covering the counter-electrode, and a liquid crystal layer held between the first substrate and the second substrate. A first rubbing direction of the first alignment film is a direction which crosses the third direction at an acute angle, and an angle formed between the first rubbing direction and the third direction is 3.6° or more.




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Fishing guide for directing a skewed fish in a wellbore

A guide has an open end and a finger structure preferably of a shape memory alloy. The guide is run in small-diameter configuration through a restriction with a fishing tool, such as an overshot, above it. Once through the restriction, power to heaters on the fingers takes the material past its transition temperature to allow the guide lower end to fan out and surround a skewed fish that is in a slanted position and leaning on a wall of a surrounding tubular that has a larger dimension than the restriction. The bottomhole assembly is then advanced until the fish is captured by the fishing tool and pulled out of the hole. The fingers are forcibly retracted as the assembly is pulled back through the restriction. The guide can use retained fingers with an outward bias to flare out after passing through a restriction, thus acting as a fish guide.




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Electromagnetic flow regulator, system and methods for regulating flow of an electrically conductive fluid

Disclosed embodiments include electromagnetic flow regulators for regulating flow of an electrically conductive fluid, systems for regulating flow of an electrically conductive fluid, methods of regulating flow of an electrically conductive fluid, nuclear fission reactors, systems for regulating flow of an electrically conductive reactor coolant, and methods of regulating flow of an electrically conductive reactor coolant in a nuclear fission reactor.




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Fuel assembly, a guide thimble device and use of the guide thimble device

The invention refers to a fuel assembly comprising a lower end structure, an upper end structure including a top nozzle (5), a plurality of fuel rods and a plurality of guide thimbles (3). The top nozzle includes a passageway and an annular groove (10) in said passageway. A sleeve (11) is provided for attaching the guide thimble (3) to the top nozzle (5). The sleeve has at least three slots (12) and includes at least three bulges (13). Each bulge (13) has two ends and extends between two of the slots (12). At least one of the ends of the bulge (13) extends to a position at a distance (d) from the respective slot (12). The invention also refers to a guide thimble device (9) for use in a fuel assembly.




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Liquid splat game kit and method of play

One embodiment of a liquid splat game kit includes a plurality of squirt bottles for storing water, a plurality of water coloring tablets for transitioning the water into a colored liquid, a plurality of playing cards, and a game-play manual.




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Pattern building game assembly with launching apparatus and methods

A game apparatus and a method using trays as the game board with vertical support columns, two sets of playing pieces and two launching devices. The one or more vertical support columns attach to the one or more trays to support the trays horizontally above a support surface. On the surface of each of the trays is a matrix and each element of the matrix has a recessed compartment orthogonal to the surface of the tray. Each recessed compartment is sized to hold a multiplicity of both types of playing pieces in a stacked manner. The recessed compartments may also be created so that the order and the number of the playing pieces in each recessed compartment are observable for additional variety in game play.




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Communication module, connector, and connector-equipped communication module

A connector-equipped communication module includes a communication module and a connector. The communication module includes a wiring board including antenna-mounted and IC-mounted regions at different positions in a planar view, an antenna element mounted in the antenna-mounted region, a wireless IC and a mounted component mounted in the IC-mounted region, and side terminals in the IC-mounted region and peripheral portions near the IC-mounted region. The connector includes a receiving portion including a placement portion configured to mount the communication module and a wall portion extending around the placement portion, inner wall terminals on an inner side of the wall portion at positions facing the side terminals, and external terminals located outward of the receiving portion and electrically connected to the inner wall terminals. In a state where the communication module is received in the receiving portion, the inner wall and side terminals are fitted so as to contact with each other.




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Integrated circuit device

A booster circuit is configured, such that: in response to a reading request for reading data from a flash memory, when a voltage of an output terminal detected by a voltage detection circuit is not higher than a voltage, an oscillator outputs a control clock signal of predetermined on time and off time to a transistor of a boost converter to perform switching control of the transistor; and when the voltage detection circuit detects that the voltage of the output terminal reaches a voltage, an oscillator outputs a control clock signal of an on time and an off time input from a selection circuit to a transistor of a boost converter to perform switching control of the transistor.




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Quantum circuit within waveguide-beyond-cutoff

A quantum information processing system includes a waveguide having an aperture, a non-linear quantum circuit disposed in the waveguide and an electromagnetic control signal source coupled to the aperture.




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Semiconductor device having pull-up circuit and pull-down circuit

To reduce power supply noises occurring in a control circuit unit for controlling an output buffer. A semiconductor device includes unit buffers for driving a data output terminal, impedance control circuits for controlling the unit buffers, and a control circuit unit for controlling the impedance control circuits. The impedance control circuits and the control circuit unit operate by mutually-different power supplies, the control circuit unit supplies pull-up data and pull-down data in mutually reverse phase to the impedance control circuits, and the impedance control circuits convert the pull-up data and the pull-down data from reverse phase to in-phase and supply the same to the unit buffers. Thereby, a noise is difficult to occur in a power supply VDD used for the control circuit unit.




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Sequence circuit

A sequence circuit includes first through third signal terminals, first through ninth resistors, and first through fifth electronic switches. The sequence circuit receives a first signal through the first signal terminal. The sequence circuit receives a second signal through the second signal terminal. The sequence circuit outputs a third signal through the third signal terminal. The sequence circuit is used to ensure the sequence of the first through third signals.




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Receiver circuit

A receiver circuit includes a first amplification unit, a second amplification unit, a first equalizing unit, and a second equalizing unit. The first amplification unit is configured to differentially amplify an input signal and a reference signal and generate a first intermediate output signal and a second intermediate output signal. The second amplification unit is configured to differentially amplify the first and second intermediate output signals and generate an output signal. The first equalizing unit is configured to control the level of the second intermediate output signal in response to the output signal. And the second equalizing unit is configured to control the level of the first intermediate output signal in response to the output signal.




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Flip-flops in a monolithic three-dimensional (3D) integrated circuit (IC) (3DIC) and related methods

Flip-flops in a monolithic three-dimensional (3D) integrated circuit (IC)(3DIC) and related method are disclosed. In one embodiment, a single clock source is provided for the 3DIC and distributed to elements within the 3DIC. Delay is provided to clock paths by selectively controllable flip-flops to help provide synchronous operation. In certain embodiments, 3D flip-flop are provided that include a master latch disposed in a first tier of a 3DIC. The master latch is configured to receive a flip-flop input and a clock input, the master latch configured to provide a master latch output. The 3D flip-flop also includes at least one slave latch disposed in at least one additional tier of the 3DIC, the at least one slave latch configured to provide a 3DIC flip-flop output. The 3D flip-flop also includes at least one monolithic intertier via (MIV) coupling the master latch output to an input of the slave latch.




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Low-power dual-edge-triggered storage cell with scan test support and clock gating circuit therefore

A storage cell having a pulse generator and a storage element is proposed. The storage element input is connected to receive a data input signal. The storage element output is connected to provide a data output signal. The storage element is operable in one of a data retention state and a data transfer state in response to a storage control signal received from the pulse generator. The pulse generator is connected to receive a clock signal with rising and falling clock signal edges and is adapted to provide control pulses in the storage control signal. Each control pulse has a leading edge and a trailing edge. The control pulses have a polarity suited to invoke the data transfer state on their leading edges. The novel feature is that the pulse generator is adapted to initiate a rising-edge control pulse when receiving a rising clock signal edge and to initiate a falling-edge control pulse when receiving a falling clock signal edge. In this way, a dual-edge-triggered flip-flop may be made using only combinatorial logic circuitry and one level- or single-edge-triggered storage element. The storage cell has low power consumption, facilitates scan testing and can be used by existing design tools and test equipment.




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Circuit and method of clocking multiple digital circuits in multiple phases

A circuit includes a power supply terminal and a clock parsing circuit configured to produce multiple clock signals having a common clock period and different phases. The circuit further includes a plurality of digital circuits coupled to the clock parsing circuit and the power supply terminal. Each digital circuit includes an input to receive data and logic to process the data. Each digital circuit is responsive to a phase associated with a respective clock signal of the multiple clock signals to draw current from the regulated power supply terminal to process the data to produce a data output. Additionally, the circuit includes an output timing management circuit coupled to each of the plurality of digital circuits and configured to control data outputs of each of plurality of digital circuits to prevent timing violations at one or more destination circuits.




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Pulse generation circuit and semiconductor device

Two gate drivers each comprising a shift register and a demultiplexer including single conductivity type transistors are provided on left and right sides of a pixel portion. Gate lines are alternately connected to the left-side and right-side gate drivers in every M rows. The shift register includes k first unit circuits connected in cascade. The demultiplexer includes k second unit circuits to each of which a signal is input from the first unit circuit and to each of which M gate lines are connected. The second unit circuit selects one or more wirings which output an input signal from the first unit circuit among M gate lines, and outputs the signal from the first unit circuit to the selected wiring(s). Since gate signals can be output from an output of a one-stage shift register to the M gate lines, the width of the shift register can be narrowed.




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Bias circuit for a switched capacitor level shifter

A noise resistant switch control circuit is provided. The circuit includes a low pass filter configured to couple to a first terminal of a switch and a first voltage clamp coupled to the low pass filter. The first voltage clamp is configured to couple to a control terminal of the switch and limit a voltage of the control terminal relative to the first terminal to within a first clamping range. The circuit includes a second voltage clamp coupled to an input terminal of the switch control circuit. The second voltage clamp is configured to couple to the control terminal of the switch. The second voltage clamp is further configured to reduce a level of a control voltage coupled to the second voltage clamp. The circuit includes a bias device configured to couple to the control terminal of the switch and to impress a biasing voltage to the control terminal.




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Semiconductor device and communication interface circuit

A semiconductor device prevents recognition failure in mutual recognition between a host and a device compliant with USB Specifications. The semiconductor device includes: an interterminal opening/closing section having a plurality of first conductivity type MOS transistors, the respective sources or drains of which are cascaded, in which the source or drain of a first-stage MOS transistor among the cascaded MOS transistors is used as a first terminal, the source or drain of a final-stage MOS transistor among the cascaded MOS transistors is used as a second terminal, and the respective gates of the cascaded MOS transistors receive a control signal for controlling the opening or short-circuiting between the first and second terminals; and a current bypass section that reduces a current flowing into either one connection node coupling the respective sources or drains of the cascaded MOS transistors.




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Short circuit safety audible monitor

An electrical short circuit protection device for an electric trailer brake controller includes a fuse connected between the controller and the trailer brakes and an acoustic piezoelectric transducer connected across the fuse. Upon a short circuit fault developing in the trailer brakes, the fuse opens and the transducer generates an audio warning signal.




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Method and apparatus for applying liquid compositions in rail systems

A method for applying a liquid composition to a rail surface is provided. This method involves supplying a liquid composition in one or more reservoirs on a rail car (revenue generating car), and applying the liquid composition from the one or more reservoirs to the rail surface.




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Method and apparatus for applying liquid compositions in rail systems

A method for applying a liquid composition to a rail surface is provided. This method involves supplying a liquid composition in one or more reservoirs on a rail car (revenue generating car), and applying the liquid composition from the one or more reservoirs to the rail surface.




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Ultra violet irradiating device for alignment of liquid crystal, and water-cooling coaxial tube

The present invention provides an ultra violet irradiating device for aligning liquid crystal and also an water-cooling coaxial tube. The ultraviolet irradiating device includes a water-cooling coaxial tube configured with an inter tube and an external pipe enveloping the internal pipe. A light tube is disposed within the internal pipe, and an infrared filter layer is disposed between the internal and external pipes; and an ultra violet filter layer is coated over an external surface of the external pipe so as to filter out an ultra violet light beam having wavelength lower than 320 nm. The breakage of the unit filters resulted from inter pushing with each other or leakage resulted from overlapping of the unit filters can be readily resolved.




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Light guide plate having uniform light emission and manufacturing method thereof

A light guide plate includes a main body and a number of micro protrusions. The main body includes a light emitting surface, a bottom surface, and a light incident surface. The bottom surface is opposite to the light emitting surface. The light incident surface connects the light emitting surface and the bottom surface. The protrusions are randomly positioned on the light emitting surface, and are used for reflecting light rays towards random directions.




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Method for repairing white defect of liquid crystal display panel

A method for repairing white defect of liquid crystal display panel includes: (1) providing a laser repairing platform and a liquid crystal display panel that contains a white defect to be repaired, wherein the white defect contained liquid crystal display panel comprises a substrate, a first insulation layer formed on the common wiring layer, a metal layer formed on the first insulation layer, a second insulation layer formed on the metal layer, and a transparent conductive layer formed on the second insulation layer; and (2) applying the laser repairing platform to carry out multi-spot welding on the common wiring layer, the metal layer, and the transparent conductive layer at a location corresponding to a white defect of the liquid crystal display panel so as to have the common wiring layer, the metal layer, and the transparent conductive layer electrically connected at sites corresponding to the multiple welding spots.




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Method of aligning liquid crystals in a process of manufacturing liquid crystal display

A method of manufacturing a liquid crystal display includes: preparing a lower mother substrate, where lower cells, each including a thin film transistor, are provided on the lower mother substrate, and a lower alignment layer is disposed on the lower cells; preparing an upper mother substrate, where upper cells corresponding to the lower cells are provided on the upper mother substrate, and an upper alignment layer is disposed on the upper cells; providing a mother substrate assembly by providing a liquid crystal mixture layer between the lower and upper mother substrates and combining the lower and upper mother substrates; providing a pretilt of the liquid crystals by applying a voltage to a voltage application unit of the lower mother substrate; and curing an alignment supporting agents in the liquid crystal mixture layer or the lower and upper alignment layers by irradiating light to a side of the mother substrate assembly.




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Liquid crystal display and method for manufacturing the same

A liquid crystal display is provided that includes: a first display panel including a thin film transistor and a plurality of pixel electrodes; a second display panel facing the first display panel with a cell gap therebetween; a lower resistive layer disposed on the first display panel; an upper resistive layer disposed on the second display panel; and a sensing spacer connecting the lower resistive layer and the upper resistive layer.




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Pressing device for assembling liquid crystal display panel and assembling method thereof

A pressing device for assembling a liquid crystal display panel is provided. The pressing device includes a base plate, a pressing plate, a first cushion and a second cushion. The pressing plate is disposed opposite to the base plate and adapted to move toward or away from the base plate. The first cushion is disposed between the base plate and the pressing plate. The second cushion is disposed between the pressing plate and the first cushion, wherein one of the first cushion and the second cushion has a hollow zone corresponding to a display area of the liquid crystal display panel. A method for assembling a liquid crystal display panel is further provided.




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Method of producing polymer dispersed liquid crystal device using cooling plate

Provided are a method of producing a polymer dispersed liquid crystal device with a cooling plate and a polymer dispersed liquid crystal device using the same. According to the producing method of the invention using the cooling plate capable of effectively removing heat with a simple method, it is possible to improve driving voltage characteristics and decrease a production cost of the polymer dispersed liquid crystal device.