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Method and device for development of a system for management of the warnings and procedures on an aircraft

A method to develop a system for management of warnings and electronic procedures for an aircraft, comprising a database of parameters relating to the warnings and to logic and procedures, the aircraft comprising ATA equipment, comprises definition and calculation of maturity criteria for development of the system, which comprises, in order: A) verification of warnings in the database with respect to predefined lists of warnings and calculation of a maturity criterion, B) if the criterion of A>predetermined threshold, verification of the coherence of the logic for the warnings then definition and calculation of a maturity criterion, C) if the criterion of B>predetermined threshold, verification of the existence of the procedures and, for each warning, analysis of its logic with respect to its procedure, then definition and calculation of a maturity criterion, the system being fully set up when the latter criterion>predetermined threshold.




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Receiving circuit, use, and method for receiving an encoded and modulated radio signal

A receiving circuit, use, and method for receiving an encoded and modulated radio signal is provided. The circuit comprise a demodulator and a digital filter connected downstream of the demodulator for moving averaging. The filter has at least two FIFO registers and subtractors. Whereby for subtracting an output value of the FIFO register from an input value of the FIFO register a subtractor is connected to each FIFO register. Wherein the filter has a weighting unit, which is connected downstream of each FIFO register, and wherein the filter has an integrator, which is connected downstream of the subtractors for integration.




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Data recovery circuit and operation method thereof

In a data recovery circuit, a sampling circuit is configured to sample data using a plurality of sampling clock signals having different phases relative to one another and to output a plurality of sampled data. A recovery data generation circuit is configured to perform a logic operation on the plurality of sampled data and to generate a plurality of intermediate recovery data according to a result of the logic operation. A recovery circuit is configured to check the plurality of intermediate recovery data for existence of an error and to output intermediate recovery data that is error-free, among the plurality of intermediate recovery data, as recovery data.




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VSWR measurement circuit, radio communication apparatus, VSWR measurement method, and recording medium having VSWR measurement program stored thereon

In this VSWR measurement circuit, a power measurement unit measures the power level of a reflected signal which is included in a feedback signal which has been extracted at a second CPL which has been deployed at a position connecting to an antenna end via a cable. To this end, the VSWR measurement circuit is provided with a main signal component removal circuit, wherein the main signal which has been extracted from the prestage of a digital pre-distortion circuit, and a signal in which the feedback signal that had been extracted at the second CPL has been converted to a digital signal at an A/D CONV, are provided as inputs, the main signal component included in the feedback signal is removed, and only the reflected signal is extracted so as to be output to the power measurement unit.




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Display apparatus, electronic apparatus, and image forming apparatus that hides non-specified images at the same hierarchical level as a specified image

A display apparatus includes a display section, a display control section, a distance detection section, and a coordinate detection section. The display section has a display area in which a selection image is displayed. When the selection image is formed by a plurality of images hierarchically associated with one another, the display control section displays consecutively the images configuring the selection image in accordance with the hierarchical association. The distance detection section detects a spatial distance between a pointer and the display area. The coordinate detection section detects coordinates which correspond to a position of the pointer. The display control section displays, together with a specified image displayed at a position corresponding to the coordinates detected by the coordinate detection section, related images in an immediately lower level in the hierarchy associated with the specified image, when the spatial distance detected is shorter than a preset threshold distance.




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5-wire resistive touch screen pressure measurement circuit and method

A 5-wire touch screen system includes a touch screen (10) including a wiper (11) and a resistive layer (16) aligned with the wiper and first (UL), second (UR), third (LR), and fourth (LL) resistive layer contacts, wherein a touch on the screen presses a small portion of the wiper against the resistive layer, producing a touch resistance (RZ) between them at a touch point on the resistive layer. The wiper and various contacts are selectively coupled to first (VDD) and second (GND) reference voltages, respectively, to generate an analog touch voltage (VZ) at the touch point. The wiper and various contacts are selectively coupled to an analog input (56) and a reference voltage input of an ADC (48) for converting the touch voltage (VZ) to a digital representation. Analog voltages (VX) and (VY) at the touch point are converted to corresponding digital representations by the ADC.




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Pulse output circuit, shift register, and display device

In a pulse output circuit in a shift register, a power source line which is connected to a transistor in an output portion connected to a pulse output circuit at the next stage is set to a low-potential drive voltage, and a power source line which is connected to a transistor in an output portion connected to a scan signal line is set to a variable potential drive voltage. The variable potential drive voltage is the low-potential drive voltage in a normal mode, and can be either a high-potential drive voltage or the low-potential drive voltage in a bath mode. In the batch mode, display scan signals can be output to a plurality of scan signal lines at the same timing in a batch.




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Pixel circuit and display device

A pixel circuit able to prevent a spread of the terminal voltages of drive transistors inside a panel and in turn able to reliably prevent deterioration of uniformity, wherein a source of a TFT serving as a drive transistor is connected to an anode of a light emitting element, a drain is connected to a power source potential, a capacitor is connected between a gate and source of the TFT, and a source potential of the TFT is connected to a fixed potential through a TFT serving as a switch transistor and wherein pixel circuit lines are connected by an upper line and bottom line and are arranged in parallel with pixel circuit power source voltage lines so as not to have intersecting parts.




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Methods, apparatus and systems for generating location-corrected searchable electronic records of underground facility locate and/or marking operations

Generating a corrected electronic record of a locate and/or marking operation. The operation comprises locating and/or identifying, using a physical locate mark, presence or absence of an underground facility within a dig area. At least a portion of the dig area may be excavated or disturbed. First information relating to a location of the facility and/or the mark is received. Based at least in part on the first information, the location of the facility and/or the mark is represented to generate an electronic visual representation of the operation. Second information relating to a corrected location of the facility and/or the mark is received. Based at least in part on the second information, the corrected location is represented to generate a corrected electronic visual representation of the operation. Third information relating to the corrected representation of the operation is transmitted and/or stored to generate the corrected electronic record of the operation.




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Methods, apparatus and systems for generating searchable electronic records of underground facility locate and/or marking operations and assessing aspects of same

A method is disclosed for assessing an aspect relating to a locate and/or marking operation performed by a locate technician based on an electronic representation of the operation. The operation includes locating and/or identifying, using a physical locate mark, a presence or an absence of an underground facility within a dig area. A portion of the dig area may be excavated or disturbed during excavation activities. The method includes digitally representing, on a display device, the facility and/or the physical locate mark to generate an electronic visual representation of the operation. The method further includes determining a length associated with a portion of the digitally represented facility and/or physical locate mark in the electronic visual representation of the operation. The method further includes, based on the determined length, automatically assessing the aspect relating to the operation.




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Methods, apparatus and systems for generating digital-media-enhanced searchable electronic records of underground facility locate and/or marking operations

Generating a digital-media-enhanced electronic record of a locate and/or marking operation performed by a locate technician. The locate and/or marking operation comprises locating and/or identifying, using at least one physical locate mark, a presence or an absence of at least one underground facility within a dig area, wherein at least a portion of the dig area may be excavated or disturbed during excavation activities. A location of the at least one underground facility and/or the at least one physical locate mark is electronically rendered on a display device so as to generate an electronic visual representation of the locate and/or marking operation. At least one digital media file representation of a corresponding digital media file relating to at least one aspect of the locate and/or marking operation or an environment of the dig area is also electronically rendered on the display device, so as to generate a digital-media-annotated representation of the locate and/or marking operation. Information relating to the digital-media-annotated representation of the locate and/or marking operation is electronically transmitted and/or stored so as to generate the digital-media-enhanced electronic record of the locate and/or marking operation.




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Circuit board with integrated passive devices

Embodiments of the present disclosure are directed towards a circuit board having integrated passive devices such as inductors, capacitors, resistors and associated techniques and configurations. In one embodiment, an apparatus includes a circuit board having a first surface and a second surface opposite to the first surface and a passive device integral to the circuit board, the passive device having an input terminal configured to couple with electrical power of a die, an output terminal electrically coupled with the input terminal, and electrical routing features disposed between the first surface and the second surface of the circuit board and coupled with the input terminal and the output terminal to route the electrical power between the input terminal and the output terminal, wherein the input terminal includes a surface configured to receive a solder ball connection of a package assembly including the die. Other embodiments may be described and/or claimed.




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Resonance reducing circuit board

A circuit card is provided that includes ground traces that extend from a resistor to a commoning bar, where a resultant electrical length between the resistor and the commoning bar and is configured to reduce energy carried on the ground terminals that could otherwise result in cross-talk. In an embodiment, the ground trace may be configured in a meandering manner. In another embodiment, the ground trace may be split and joined by an inductor.




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SAW filter circuit having improved ESD resistance

A SAW filter circuit having improved ESD resistance is specified, in which a series interconnection composed of SAW resonators is interconnected between a first signal port and a dual-mode SAW filter port. The static capacitance of the series interconnection is at most four times the static capacitance of the dual-mode SAW filter transducers interconnected therewith.




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Electromagnetic interface secured by using an indirect compression force to slidably engage first and second force transfer features

In an example embodiment, an electromagnetic interface can comprise: a first component comprising a first waveguide channel, a first interface surface, and a first force transfer feature; a second component comprising a second waveguide channel, a second interface surface, and a second force transfer feature; and a fastener that can be configured to force the first force transfer feature in sliding engagement with the second force transfer feature. The first and second force transfer features can be configured to interoperate to create an indirect force holding the first interface surface in contact with the second interface surface and holding the first waveguide channel in alignment with the second waveguide channel.




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Attenuation reduction control structure for high-frequency signal transmission lines of flexible circuit board

An attenuation reduction control structure for high-frequency signal transmission lines of a flexible circuit board includes an impedance control layer formed on a surface of a substrate. The impedance control layer includes an attenuation reduction pattern that is arranged in an extension direction of the high-frequency signal transmission lines of the substrate and corresponds to bottom angle structures of the high-frequency signal transmission lines in order to improve attenuation of a high-frequency signal transmitted through the high-frequency signal transmission lines. An opposite surface of the substrate includes a conductive shielding layer formed thereon. The conductive shielding layer is formed with an attenuation reduction pattern corresponding to top angle structures of the high-frequency signal transmission lines.




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Method, system, and apparatus for resonator circuits and modulating resonators

Embodiments of resonator circuits and modulating resonators and are described generally herein. One or more acoustic wave resonators may be coupled in series or parallel to generate tunable filters. One or more acoustic wave resonances may be modulated by one or more capacitors or tunable capacitors. One or more acoustic wave modules may also be switchable in a filter. Other embodiments may be described and claimed.




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De-noise circuit and de-noise method for differential signals and chip for receiving differential signals

A de-noise circuit and a de-noise method for differential signals and a chip for receiving differential signals are provided. The de-noise circuit includes a filter and a register. Both the filter and the register are disposed in the chip. The chip receives a differential signal through a first input terminal and a second input terminal. The filter is coupled between the first input terminal and the second input terminal of the chip. The filter filters out noises in the differential signal. The filter includes at least one filter unit. Each filter unit has at least one resistance value or at least one capacitance value. The register is coupled to the filter. The register receives and stores a control value. The register controls the resistance value or the capacitance value of at least one of the filter units based on the control value.




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Capacitive device and resonance circuit

To provide a capacitive device capable of accurately securing a capacitance value, a variable capacitive device capable of sufficiently securing a capacity variability rate, and a resonance circuit that uses the capacitive devices. A capacitive device includes a capacitive device body constituted of a dielectric layer and at least a pair of capacitive device electrodes that sandwich the dielectric layer and cause a desired electric field in the dielectric layer; and stress adjustment portions to adjust a stress caused in the dielectric layer of the capacitive device body.




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Unbalanced-balanced conversion circuit element

An unbalanced-balanced conversion circuit element includes an inductor connected in series between an unbalanced terminal and a first balanced terminal. The first balanced terminal side of the inductor is grounded via a capacitor. A capacitor is connected in series between the unbalanced terminal and a second balanced terminal. An inductor is connected between the first balanced terminal side of the inductor and the second balanced terminal side of the capacitor. In a laminate defining the unbalanced-balanced conversion circuit element, the capacitor is spaced far from a mounting surface of the laminate in comparison with other circuit elements.




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Multidirectional fiber-reinforced tape/film articles and the method of making the same

High tenacity, high elongation multi-filament polymeric tapes as well as ballistic resistant fabrics, composites and articles made therefrom. The tapes are fabricated from multi-filament fibers/yarns that are twisted together, bonded together, compressed and flattened.




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Reinforcing tape, cloth produced by sewing said reinforcing tape, and web structure utilizing said reinforcing tape

Provided are a lightweight, compact reinforcing tape capable of improving a tensile strength. A reinforcing tape for reinforcing a tensile strength of a cloth includes weft threads which constitute a weave structure of the reinforcing tape, and warp threads which constitute a weave structure of the reinforcing tape, wherein a part of the warp threads are made of a high-strength fiber.




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Parallel circuit of accumulator lines

A circuit for connecting a first accumulator line to a second accumulator line from an accumulator is described. The accumulator is provided for charging and discharging electrical energy via the accumulator lines. Each accumulator line has a positive pole and a negative pole for charging and discharging electrical energy. The circuit has at least one first switch which is provided for disconnecting and connecting two similar poles of the two accumulator lines.




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Assembled battery charging method, charging control circuit, and power supply system

A method for charging an assembled battery including series circuits connected in parallel, each of the series circuits including series-connected lead storage batteries, using a single charger is provided. The method includes: a first step of obtaining a first index value, corresponding to a resistance value of a first series circuit with a correlative relationship, the first series circuit having a lowest resistance value; a second step of obtaining a second index value corresponding to a resistance value of a second series circuit with a correlative relationship, the second series circuit having a highest resistance value; a third step of performing normal charging, in which the assembled battery is charged with a first amount of charge corresponding to the first index value; and a fourth step of performing refresh charging, in which the assembled battery is charged with a second amount of charge corresponding to the second index value.




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Battery protecting circuit, battery protecting device, and battery pack

A disclosed battery protecting circuit includes a battery protecting IC powered by a voltage of a secondary battery; another battery protecting IC powered by a voltage of another secondary battery connected to the secondary battery in series; and a constant voltage output unit which receives a maximum voltage obtained by adding voltages of the secondary battery and the other secondary battery in series and outputs a constant voltage upon receipt of a control signal from an output terminal of the battery protecting IC or the other battery protecting IC.




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Method and circuitry to calculate the state of charge of a battery/cell

The present inventions, in one aspect, are directed to techniques and/or circuitry to adapt the charging of a battery using data which is representative of an overpotential or relaxation time (full or partial) of the battery. In another aspect the present inventions are directed to techniques and/or circuitry to calculate data which is representative of an overpotential or relaxation time (full or partial) of the battery. In yet another aspect the present inventions are directed to techniques and/or circuitry to calculate data which is representative of a state of charge of the battery using an overpotential or relaxation time (full or partial) of the battery.




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Monitor and control circuitry for charging a battery/cell, and methods of operating same

Circuitry and techniques to measure, at the battery's terminals, characteristic(s) of the charging signal applied to the battery/cell during the recharging operation and, in response to feedback data which indicates the charging signal is out-of-specification, control or instruct the charging circuitry to adjust characteristic(s) of the recharging signal (e.g., the amplitude of the voltage of and/or current applied to or removed from the battery during the charging operation). For example, a rechargeable battery pack comprising a battery, and controllable switch(es), a current meter and voltmeter, all of which are fixed to the battery. Control circuitry generates control signal(s) to adjust a current and/or voltage of the charging signal using the feedback data from the current meter and/or voltmeter, respectively.




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Systems and methods for detecting ultracapacitor cell short circuits

A system for detecting a short-circuited ultracapacitor cell in a machine is disclosed. The system may have a memory that stores instructions and one or more processors capable of executing the instructions. The one or more processors may be configured to perform cell balancing among ultracapacitor cells arranged within two or more ultracapacitor modules, each ultracapacitor module including at least two ultracapacitor cells connected in series. The one or more processors may be further configured to measure a module voltage generated by each of the plurality of ultracapacitor modules after performing the cell balancing and before applying a load of the machine to the ultracapacitor modules, and determine whether an ultracapacitor cell among the plurality of ultracapacitor cells is short-circuited based on a comparison of the measured module voltages.




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System and method for protecting a power consuming circuit

A system for protecting a power consuming circuit, the system comprising two terminals for receiving power and two terminals for providing received power. Between one of the receiving terminals and a providing terminal, a transistor is provided which is controlled by a Zener diode and to break the connection between one of the receiving terminals and a providing terminal, if a voltage over the providing terminals or the receiving terminals exceeds the breakdown voltage of the Zener diode.




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Automatic start and stop of a portable engine driven power source

The present embodiments provide a control system and method that is able to automatically start and/or stop a portable engine-driven power source. For example, in one embodiment, a system includes an engine-driven power source having an engine, a compressor driven by the engine, a sensor configured to generate a first signal indicative of a demand for air pressure from the compressor and a second signal indicative of no demand for air pressure from the compressor. The engine-driven power source also includes a controller configured to stop the engine in response to the second signal.




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EPGS architecture with multi-channel synchronous generator and common unregulated PMG exciter

A generator system includes a generator having a stationary portion and a rotating portion. The generator includes a permanent magnet based exciter with permanent magnets disposed on the stationary portion. A first channel includes a first main field winding and a first main field power converter disposed on a rotating portion. The first main field power converter selectively delivers voltage from the exciter winding to the first main field winding. A second channel includes a second main field winding and a second main field power converter disposed on the rotating portion. The second main field power converter selectively delivers voltage from the exciter winding to the second main field winding. A generator control unit is connected to the first channel and the second channel. The generator control unit monitors an output voltage at each of the first channel and the second channel and generates the first and second control signals based on the output voltage.




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Mixed mode power generation architecture

An electric power generation system (EPGS) employs both a wild-source generator and a variable and/or constant frequency generator. The wild-source generator is coupled to receive mechanical power from a low-pressure spool on an aircraft engine and to generate in response a wild-source output for consumption by voltage and frequency-tolerant loads. The variable and/or constant frequency generator is coupled to receive mechanical power from a high-pressure spool on the aircraft engine and to generate in response a variable and/or constant frequency output for consumption by voltage and frequency-intolerant loads.




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Overvoltage limiter in an aircraft electrical power generation system

A generator includes a permanent magnet generator, an exciter and a main generator mounted for rotation on a shaft. The main generator is configured to produce a voltage output. A generator control unit includes a circuit configured to provide current from the permanent magnet generator to the exciter. A switch is provided in the circuit and is configured to change between open and closed conditions. The switch is configured to flow current in the circuit in the closed condition and interrupt current flow in the open condition. An overvoltage limit controller is programmed to determine an amount of overvoltage of the output voltage exceeding a desired voltage. Either a fixed reference threshold is used or a reference threshold voltage is calculated based upon the duration in over voltage condition, and the switch is modulated between the open and closed conditions according to error between the actual output voltage and the reference threshold voltage to limit the output voltage to the desired reference threshold voltage.




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Method and apparatus for generating electricity by thermally cycling an electrically polarizable material using heat from various sources and a vehicle comprising the apparatus

A method for converting heat to electric energy is described which involves thermally cycling an electrically polarizable material sandwiched between electrodes. The material is heated using thermal energy obtained from: a combustion reaction; solar energy; a nuclear reaction; ocean water; geothermal energy; or thermal energy recovered from an industrial process. An apparatus is also described which includes an electrically polarizable material sandwiched between electrodes and a heat exchanger for heating the material. The heat source used to heat the material can be: a combustion apparatus; a solar thermal collector; or a component of a furnace exhaust device. Alternatively, the heat exchanger can be a device for extracting thermal energy from the earth, the sun, ocean water, an industrial process, a combustion reaction or a nuclear reaction. A vehicle is also described which comprises an apparatus for converting heat to electrical energy connected to an electric motor.




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Model-free adaptive control of supercritical circulating fluidized-bed boilers

A novel 3-Input-3-Output (3×3) Fuel-Air Ratio Model-Free Adaptive (MFA) controller is introduced, which can effectively control key process variables including Bed Temperature, Excess O2, and Furnace Negative Pressure of combustion processes of advanced boilers. A novel 7-input-7-output (7×7) MFA control system is also described for controlling a combined 3-Input-3-Output (3×3) process of Boiler-Turbine-Generator (BTG) units and a 5×5 CFB combustion process of advanced boilers. Those boilers include Circulating Fluidized-Bed (CFB) Boilers and Once-Through Supercritical Circulating Fluidized-Bed (OTSC CFB) Boilers.




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Circulating fluidized bed boiler

A circulating fluidized bed boiler includes a rectangular furnace having multiple particle separators connected to an upper portion of each of a front wall and a back wall of the furnace. Each particle separator includes a gas outlet, and a flue gas duct system connected to the gas outlets for conducting cleaned flue gas to a back pass. The particle separators are arranged in pairs. Each pair includes a front separator arranged adjacent to the front wall and a back separator arranged adjacent to the back wall. The flue gas duct system includes cross over ducts, each duct connecting the gas outlet of a front separator of a pair of particle separators, across and over the furnace, to the gas outlet of the back separator of the same pair of particle separators, and to the back pass, which back pass is arranged on the back wall side of the furnace.




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Evaporator surface structure of a circulating fluidized bed boiler and a circulating fluidized bed boiler with such an evaporator surface structure

An evaporator surface structure of a circulating fluidized bed boiler having a furnace that is enclosed by sidewalls and has a bottom and a ceiling. The evaporator surface structure includes at least one vertical and separate evaporator surface unit that is spaced apart from the sidewalls of the furnace. The at least one evaporator surface unit (i) is formed of planar water tube panels that extend from the bottom of the furnace to the ceiling of the furnace, and (ii) consists of two cross-wise joined vertical water tube panels.




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Enhanced electrical shocking device with improved long life and increased power circuitry

An improved stun-gun or electrical shock device which includes improved circuit elements to eliminate the frequent product failure due to corrosion and pitting of an internal spark gap as found in prior art electrical shocking devices. The conventional internal spark gap found in prior art stun-guns is replaced with a pair of surge arrestors, thereby eliminating the problems caused by corrosion and pitting of the internal spark gap which has caused prior art stun-guns to have a limited life and fail.




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Animal defensive barrier and exercise device

An animal defensive barrier device comprising a hand-grip portion having end caps; a strap connected to the hand-grip through one of the end caps; a loop portion distal at one end of the hand-grip and a loop portion distal from the first loop end; a plurality of knots between the hand-grip and the distal loop portion; and a plurality of sleeves on the strap between the hand-grip portion and the distal loop portion.




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Row unit for a seeding machine having active downforce control for the closing wheels

A planter row unit is disclosed having an active downforce control system for the closing wheels. This separate control of the downforce pressure for the closing wheels is provided from the row unit downforce control. A single operator input is used to set a desired downforce for all row units. The control system then operates to produce the desired downforce. Alternatively, the control system may display a downforce load to the operator who then manually makes adjustments as desired.




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Down and/or up force adjustment system

An agricultural device includes a number of row units that each includes a seed furrow opener that creates a furrow in the soil for seed placement. Each row unit is mounted to a toolbar of the device by a four-bar linkage which allows each row unit to move vertically to adjust to the contour of the soil independently of the other row units on the same toolbar. The four-bar linkages include one or more springs which work to transfer weight from the toolbar to the row unit. An actuator varies the tension in the spring thereby adjusting the down or up force applied to the row unit.




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Dynamic supplemental downforce control system for planter row units

A dynamic supplemental downforce control system for a planter row unit. The system includes closed-loop feedback circuit that cooperates with a downforce actuator to dynamically control fluid flow to the downforce actuator to maintain balance between the actual gauge wheel downforce and a desired gauge wheel downforce during planting operations.




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Seed research plot planter and field layout system

A seed research plot planter includes a rotating seed plate for picking up and transporting seeds from a seed chamber to a release point, and a sensor that detects the rotational position of the seed plate. A distance measuring device measures a distance traveled by the planter. A controller uses a first signal from the sensor and a second signal from the distance measuring device to control a sequence of operations of the planter based on the rotational position of the seed plate and the location of the planter within the field. A field layout system is provided for creating a plot field layout having a desired number of ranges, a desired number of planter passes, and desired parameters for each plot within the field. The field layout system allows different plot lengths and seed populations to be input for individual plots within the same planter pass through the field.




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Electric arc for aqueous fluid treatment

An aqueous fluid treatment method and system is provided which preferably uses a 3 step electro-chemical oxidation process to remove organic contaminates from water. A high surface area electro-chemical reaction cell can be employed to remove organic particles and precipitate hardness salts from the aqueous solution. Several 3-phase spark arcs generated mixed oxidants and acoustic cavitations to remove dissolved organic compounds and oxidize organic metal compounds in the next step. Finally, a dielectric discharge in aqueous foam is used to eliminate recalcitrant organic compounds such as, but not limited to, polychlorinated aromatics, disinfectants, pesticides, and pharmaceuticals before release to environment or recycled.




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Method for fabricating a high coercivity hard bias structure for magnetoresistive sensor

A hard bias (HB) structure for longitudinally biasing a free layer in a MR sensor is disclosed that includes a mildly etched seed layer and a hard bias (HB) layer on the etched seed layer. The HB layer may contain one or more HB sub-layers stacked on a lower sub-layer which contacts the etched seed layer. Each HB sub-layer is mildly etched before depositing another HB sub-layer thereon. The etch may be performed in an IBD chamber and creates a higher concentration of nucleation sites on the etched surface thereby promoting a smaller HB average grain size than would be realized with no etch treatments. A smaller HB average grain size is responsible for increasing Hcr in a CoPt HB layer to as high as 2500 to 3000 Oe. Higher Hcr is achieved without changing the seed layer or HB material and without changing the thickness of the aforementioned layers.




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Structures for improving current carrying capability of interconnects and methods of fabricating the same

Interconnect structures and methods of fabricating the same are provided. The interconnect structures provide highly reliable copper interconnect structures for improving current carrying capabilities (e.g., current spreading). The structure includes an under bump metallurgy formed in a trench. The under bump metallurgy includes at least: an adhesion layer; a plated barrier layer; and a plated conductive metal layer provided between the adhesion layer and the plated barrier layer. The structure further includes a solder bump formed on the under bump metallurgy.




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Oxide-based semiconductor non-linear element having gate electrode electrically connected to source or drain electrode

A non-linear element (e.g., a diode) with small reverse saturation current is provided. A non-linear element includes a first electrode provided over a substrate, an oxide semiconductor film provided on and in contact with the first electrode, a second electrode provided on and in contact with the oxide semiconductor film, a gate insulating film covering the first electrode, the oxide semiconductor film, and the second electrode, and a third electrode provided in contact with the gate insulating film and adjacent to a side surface of the oxide semiconductor film with the gate insulating film interposed therebetween or a third electrode provided in contact with the gate insulating film and surrounding the second electrode. The third electrode is connected to the first electrode or the second electrode.




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Transistors having features which preclude straight-line lateral conductive paths from a channel region to a source/drain region

Some embodiments include transistors having a channel region under a gate, having a source/drain region laterally spaced from the channel region by an active region, and having one or more dielectric features extending through the active region in a configuration which precludes any straight-line lateral conductive path from the channel region to the source/drain region. The dielectric features may be spaced-apart islands in some configurations. The dielectric features may be multi-branched interlocking structures in some configurations.




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Driver circuit and semiconductor device

The silicon nitride layer 910 formed by plasma CVD using a gas containing a hydrogen compound such as silane (SiH4) and ammonia (NH3) is provided on and in direct contact with the oxide semiconductor layer 905 used for the resistor 354, and the silicon nitride layer 910 is provided over the oxide semiconductor layer 906 used for the thin film transistor 355 with the silicon oxide layer 909 serving as a barrier layer interposed therebetween. Therefore, a higher concentration of hydrogen is introduced into the oxide semiconductor layer 905 than into the oxide semiconductor layer 906. As a result, the resistance of the oxide semiconductor layer 905 used for the resistor 354 is made lower than that of the oxide semiconductor layer 906 used for the thin film transistor 355.




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Reverse circulation apparatus and methods of using same

In one aspect, an apparatus for drilling a wellbore into an earth formation is disclosed, which apparatus, according to one embodiment, may include a drill string configured to be conveyed into a wellbore, wherein an annulus is formed between the drill string and a wellbore wall, a first flow device configured to circulate a first fluid from an annulus to a bore of the drill string, and a second flow device positioned downhole of the first flow device, the second flow device configured to circulate a second fluid from the bore of the drill string to the annulus.