In a driving circuit, one output circuit has a scanning signal line, a first transistor which controls electrical connection between the scanning signal line and a clock signal line which has a gate connected to a first node, the first node which is at an active potential in a first time period including a time period during which the active potential is output to the scanning signal line, a second transistor which electrically connects the first node and an inactive signal line which has a potential to open the transistor in a second time period other than the first time period, and the second transistor has a gate connected to a second node, wherein the second node has two kinds of timings to be charged for retaining the active potential.

A display panel drive circuit includes a shift register constructed of unit circuits connected in stages. The unit circuits generate signal line selection signals, respectively, which signal line selection signals are made active for a respective certain period of time to form a respective pulse, and the pulses are outputted successively from respective unit circuits in order of ordinal number starting from a first stage until an end stage. In at least one embodiment, each of the unit circuits receive (i) clock signals generated based on a sync signal received from outside of the display panel drive circuit, (ii) a start pulse signal generated based on the sync signal, or a signal line selection signal generated in a stage different from its own stage, and (iii) a clear signal. The clear signal is made active in a case where anomalousness is included in the sync signal, and no pulse is outputted from the shift register until a subsequent vertical scanning period starts. This configuration achieves a display panel drive circuit which prevents display disorder or holds down increase in load given to a power source, each of which occurs in a case where anomalousness is included in the sync signal.

A scan driving apparatus includes a plurality of sequentially arranged scan driving blocks, each including: a first node configured to receive a first clock signal; a second node configured to receive an input signal according to a second clock signal input; a first transistor having a gate electrode coupled to the first node, a first electrode configured to receive a power source voltage, and a second electrode coupled to an output terminal; and a second transistor having a gate electrode coupled to the second node, a first electrode for receiving a third clock signal, and a second electrode coupled to the output terminal. Each scan driving block is configured to receive the first, second, and third clock signals as a corresponding three clock signals among four clock signals sequentially shifted by a first period, and to output the third clock signal by being synchronized with the input signal.

Methods, systems and devices are provided for displaying monitored activity data in substantial real-time on a screen of a computing device. One example method includes capturing motion data associated with activity of a user via an activity tracking device. The motion data is quantified into a plurality of metrics associated with the activity of the user. The method includes connecting the activity tracking device with a computing device over a wireless data connection, and sending motion data from the activity tracking device to the computing device for display of one or more of the plurality of metrics on a graphical user interface of the computing device. At least one of the plurality of metrics displayed on the graphical user interface is shown to change in substantial real-time based on the motion data.

A shift register includes a plurality of stages of unit circuits each including a flip-flop. Each of the unit circuits generates, by obtaining a sync signal in accordance with an output from the flip-flop, an output signal. The flip-flop includes a first switch and a second switch and a latch circuit for latching a signal supplied thereto and outputting the signal as the output from the flip-flop. A first shift direction signal is supplied to the latch circuit via the first switch, and the second shift direction signal is supplied to the latch circuit via the second switch. In each unit circuit other than those of the first and last stages, an output signal from a previous stage is supplied to a control terminal of the first switch, and an output signal from a subsequent stage is supplied to a control terminal of the second switch.

Methods, devices and system are provided. One method includes capturing activity data associated with activity of a user via a device. The activity data is captured over time, and the activity data is quantifiable by a plurality of metrics. The method includes storing the activity data in storage of the device and, from time to time, connecting the device with a computing device over a wireless communication link. The method defines using a first transfer rate for transferring activity data captured and stored over a period of time. The first transfer rate is used following startup of an activity tracking application on the computing device The method also defines using a second transfer rate for transferring activity data from the device to the computing device for display of the activity data in substantial-real time on the computing device.

The present invention provides a shift register unit, a shift register circuit, an array substrate and a display device, and relates to the area of display manufacturing. The time of the bias working on the de-noising transistor can be reduced without affecting the circuit stability, so that the operational lifespan of the device can be extended. A shift register comprises: a capacitor, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a de-noising control model. The present invention is used for manufacturing displays.

A shift register includes cascade-connected stages, each of which includes a data latch and an output stage. In at least one embodiment, the latch has a single data input which, in use, receives a date signal from a preceding or succeeding stage. The output stage includes a first switch, which passes a clock signal to the stage output when the output stage is activated by the latch. The output stage also comprises a second switch, which passes the lower supply voltage to the stage output when the output stage is inactive.

A display device including various portions, circuits and other arrangements for outputting various pulses and triggers, for controlling forward shift and backward shift operations.

A display device includes a first-stage output circuit adapted to perform output to a first-stage output signal line as an endmost output signal line out of a plurality of output signal lines disposed in parallel to each other, and the first-stage output circuit includes a start signal line to which a start signal for applying a conducting potential sequentially to the plurality of output signal lines is applied, a first clock signal line to which a first clock signal is applied, a second clock signal line to which a second clock signal is applied, a first transistor having a source to which the first-stage output signal line is connected, and a drain to which the first clock signal line is connected, and a second transistor having a gate to which the start signal line is connected.

To suppress malfunctions in a shift register circuit. A shift register having a plurality of flip-flop circuits is provided. The flip-flop circuit includes a transistor 11, a transistor 12, a transistor 13, a transistor 14, and a transistor 15. When the transistor 13 or the transistor 14 is turned on in a non-selection period, the potential of a node A is set, so that the node A is prevented from entering into a floating state.

A stage constituent circuit of a display device drive circuit includes a first-node to a third-node, a thin-film transistor that changes a potential of a scanning signal toward a VDD potential when a potential of the first-node is in a HIGH level, a thin-film transistor that changes a potential of a different stage control signal toward a potential of a clock when a potential of the second-node is in the HIGH level, a capacitor between the first-node and the second-node, and a capacitor between the second-node and the third-node. The potential of the first-node is raised on the basis of a different stage control signal output from the stage constituent circuit in the different stage, and then the potential of the second-node and a potential of the third-node are sequentially raised. Herein, an amplitude of the clock is set to be smaller than an amplitude of the scanning signal.

A semiconductor device that includes transistors having the same polarity consumes less power and can prevent a decrease in amplitude of a potential output. The semiconductor device includes a first wiring having a first potential, a second wiring having a second potential, a third wiring having a third potential, a first transistor and a second transistor having the same polarity, and a plurality of third transistors for selecting supply of the first potential to gates of the first transistor and the second transistor or supply of the third potential to the gates of the first transistor and the second transistor and for selecting whether to supply one potential to drain terminals of the first transistor and the second transistor. A source terminal of the first transistor is connected to the second wiring, and a source terminal of the second transistor is connected to the third wiring.

The present invention relates to a liquid crystal display (LCD) device. More particularly, the present invention relates to an LCD device including a thin film transistor (TFT) compensation circuit in an LCD device which implements a driving circuit by using an oxide TFT, the LCD device capable of compensating for degraded characteristics of a TFT due to threshold voltage shift. As the compensation circuit including a dummy TFT is formed on a non-active area of the LC panel, the degree of threshold voltage shift of the DT due to a DC voltage can be sensed. Based on the sensed result, a threshold voltage of a second TFT can be compensated. This can reduce lowering of a device characteristic.

A shift register unit comprises: a first transistor, a pulling-up close unit, a pulling-up start unit, a first pulling-up unit, a second pulling-up unit, a trigger unit, and an output unit. A shift register circuit, an array substrate and a display device are also provided. The shift register unit, the shift register circuit, the array substrate and the display device can reduce drift of a gate threshold voltage of a gate line driving transistor and improve operation stability of devices.

A semiconductor device which shifts a low-level signal is provided. In an example, a first transistor including a first terminal electrically connected to a first wiring and a second terminal electrically connected to a second wiring, a second transistor including a first terminal electrically connected to a third wiring and a second terminal electrically connected to the second wiring, a third transistor including a first terminal electrically connected to a fourth wiring and a second terminal electrically connected to a gate of the second transistor, a fourth transistor including a first terminal electrically connected to a fifth wiring, a second terminal electrically connected to a gate of the third transistor, and a gate electrically connected to a sixth wiring, and a first switch including a first terminal electrically connected to the third wiring and a second terminal electrically connected to a gate of the first transistor are included.

To suppress malfunctions in a shift register circuit. A shift register having a plurality of flip-flop circuits is provided. The flip-flop circuit includes a transistor 11, a transistor 12, a transistor 13, a transistor 14, and a transistor 15. When the transistor 13 or the transistor 14 is turned on in a non-selection period, the potential of a node A is set, so that the node A is prevented from entering into a floating state.

A counter configured to perform counting at both edges of an input clock to output an additional value or a subtraction value for a previous count value and a next count value includes a first latch circuit that latches the input clock, a second latch circuit that latches an output from the first latch circuit, a holding section that holds data of the 0th bit of a count value, and a correction section that performs count correction on data of the first and subsequent bits of the count value on the basis of an output of the second latch circuit.

An LCD and a bidirectional shift register device thereof are provided. The bidirectional shift register device of the invention is disposed on the substrate of the panel and includes multi-stages shift registers in series connection. Each stage shift register includes a pre-charging unit, a pull-up unit and a pull-down unit, in which the pre-charging unit receives a first preset clock signal and the output from a (i−1)th stage shift register or a (i+1)th stage shift register so as to thereby output a charging signal. The pull-up unit receives the charging signal and a second preset clock signal so as to thereby output a scan signal. The pull-down unit receives the second preset clock signal, a third preset clock signal and the output from the (i+2)th stage shift register or the (i−2)th stage shift register so as to decide whether or not pulling down the scan signal to a reference level.

A side rail of a floor assembly of a trailer, such as a flatbed trailer, including a channel formed in a top wall of the side rail and an aperture formed in the top wall of the side rail at a location spaced-apart from the channel. The channel extends along a length of the side rail and is configured to receive a first cargo restraint device therein. The aperture is configured to receive a second cargo restraint device therein.

A cargo securing device for use in carrying cargo in pickup trucks and the like. The cargo securing device is formed of a flexible panel having straps on opposed sides which extend across the panel to attachment devices such as rings. The flexible panel may include apertures with removable covers to permit the ends of long devices to extend through and to be held from movement sideways.

A box stop device includes a base member and a raised member attached to the base member. The base member has a top surface and a bottom surface. The top surface may be flat. The bottom surface may be adapted to attach to a desired surface. The raised member may be attached to the base member and may extend approximately vertically from the top surface. The raised member may include a first side and a second side. The first side and the second side may be attached together at an angle of approximately 90 degrees.

A module in the form of a pallet or a closed container includes a grouping together of the electrical devices in an avionics bay, in which the electrical devices are interconnected and attached so as to facilitate the mounting and thus limit the time it takes to mount the electrical devices in the avionics bay.

A seat fixing device for fixing an air passenger seat to a floor of an aircraft includes at least one fastening rail (10) in the form or a hollow profile, which is provided with a longitudinal channel (14) delimiting the free flanks (16) of the profile on the top part thereof (12) oriented to the seat. The channel includes through openings (18) located in a predetermined modular dimension, which enlarge the free input section and are used for inserting at least one snap-locking part (24) of a locking body (26). The looking body (26) is movable to a clamping position with the profile (16) of the hollow profile (14) by the relative displacement of each snap-locking part (24) in a perpendicular direction with respect to the longitudinal axis (28) of the fastening rail (10). The fixing device provides an eccentric drive (30) of the locking body (26) for carrying out relative displacement, which reduces assembly costs.

An anti-disassembling device for an electronic product includes a case, a linear movement device, a circular movement device and an optical encoder. At least one retractable transmission member is connected to the case. The circular movement device is located in the case and has an encoding disk, which has multiple slots defined therethrough and teeth are defined in the periphery thereof. The at least one retractable transmission member is engaged with the teeth to rotate the encoding disk. The optical encoder has a lighting module which emits light beams through the slots of the encoding disk and a photosensitive module receives the light beams and sends a signal to the storage unit of the electronic product. The retractable device rotates when the electronic product is disassembled.

A bridge output circuit includes an output terminal, a high side transistor, a low side transistor, a high side driver for controlling a gate voltage of the high side transistor, a low side driver for controlling a gate voltage of the low side transistor, and a controller for controlling the high side and low side drivers. The low side driver includes a first current source, a second current source, and a first assist circuit. The controller is configured to control the turning-on and turning-off states of the first current source, the second current source and the first assist circuit.

A multi-chip package may include first and second integrated circuit dies that are each partitioned into multiple logic regions. The logic regions of the first and second dies may be coupled via interconnects. Each integrated circuit die may include at least one spare logic region. Multiple logic groups may be formed with each logic group including logic regions from the first and second integrated circuit dies and the interconnects that couple those logic regions. The logic groups may be evaluated to identify defective logic groups. In response to identifying a defective logic group, the defective logic group may be repaired by configuring the first and second integrated circuit dies to stop using the defective logic group and to use a spare logic group. The spare logic group may include spare logic regions of the first and second dies that are coupled by spare logic region interconnects.

A method of configuring a programmable integrated circuit device with a user logic design includes analyzing the user logic design to identify unidirectional logic paths within the user logic design and cyclic logic paths within the user logic design, assigning the cyclic logic paths to logic in a first portion of the programmable integrated circuit device that operates at a first data rate, assigning the unidirectional logic paths to logic in a second portion of the programmable integrated circuit device that operates at a second data rate lower than the first data rate, and pipelining the unidirectional data paths in the second portion of the programmable integrated circuit device to compensate for the lower second data rate. A programmable integrated circuit device adapted to carry out such method may have logic regions operating at different rates, including logic regions with programmably selectable data rates.

An isolator circuit capable of two-way electrical disconnection and a semiconductor device including the isolator circuit are provided. A data holding portion is provided in an isolator circuit without the need for additional provision of a data holding portion outside the isolator circuit, and data which is to be input to a logic circuit that is in an off state at this moment is stored in the data holding portion. The data holding portion may be formed using a transistor with small off-state current and a buffer. The buffer can include an inverter circuit and a clocked inverter circuit.

Disclosed herein is a device that includes first and second buffer circuits connected to a data terminal and a first control circuit controlling the first and second buffer circuits. The first control circuit receives n pairs of first and second internal data signals complementary to each other from 2n input signal lines and outputs a pair of third and fourth internal data signals complementary to each other to first and second output signal lines, where n is a natural number more than one. The first and second buffer circuits are controlled based on the third and fourth internal data signals such that one of the first and second buffer circuits turns on and the other of the first and second buffer circuits turns off.

A semiconductor device includes an internal circuit, a power supply control circuit which controls supply of a power supply to the internal circuit upon receipt of a first control signal, and a control signal generation circuit which outputs the first control signal upon receipt of a second control signal. The control signal generation circuit does not deactivate the first control signal when an inactive period of the second control signal is equal to or less than a first period and deactivates the first control signal when the inactive period of the second control signal is more than the first period.

An embodiment of this invention uses a massive parallel interconnect fabric (MPIF) at the flipped interface of a core die substrate (having the core logic blocks) and a context die (used for in circuit programming/context/customization of the core die substrate), to produce ASIC-like density and FPGA-like flexibility/programmability, while reducing the time and cost for development and going from prototyping to production, reducing cost per die, reducing or eliminating NRE, and increasing performance. Other embodiments of this invention enable debugging complex SoC through large contact points provided through the MPIF, provide for multi-platform functionality, and enable incorporating FGPA core in ASIC platform through the MPIF. Various examples are also given for different implementations.

To provide a circuit used for a shift register or the like. The basic configuration includes first to fourth transistors and four wirings. The power supply potential VDD is supplied to the first wiring and the power supply potential VSS is supplied to the second wiring. A binary digital signal is supplied to each of the third wiring and the fourth wiring. An H level of the digital signal is equal to the power supply potential VDD, and an L level of the digital signal is equal to the power supply potential VSS. There are four combinations of the potentials of the third wiring and the fourth wiring. Each of the first transistor to the fourth transistor can be turned off by any combination of the potentials. That is, since there is no transistor that is constantly on, deterioration of the characteristics of the transistors can be suppressed.

A method in a circuit comprises providing a first clock by a resistor-capacitor (RC) oscillator; demodulating a plurality of input signals to form a plurality of demodulated input signals; discriminating frequency ranges of the plurality of demodulated input signals according to the first clock; determining whether a first predetermined number of consecutive demodulated input signals among the plurality of demodulated input signals fall into a first predetermined frequency range; triggering a crystal oscillator to provide a second clock to calibrate the first clock if the first predetermined number of consecutive input signals fall into the first predetermined frequency range.

A resonator element includes a substrate including a first principal surface and a second principal surface respectively forming an obverse surface and a reverse surface of the substrate, and vibrating in a thickness-shear vibration mode, a first excitation electrode disposed on the first principal surface, and a second excitation electrode disposed on the second principal surface, and being larger than the first excitation electrode in a plan view, the first excitation electrode is disposed so as to fit into an outer edge of the second excitation electrode in the plan view, and the energy trap confficient M fulfills 15.5≦M≦36.7.

A resonator element includes a substrate vibrating in a thickness-shear vibration mode, a first excitation electrode disposed on one principal surface of the substrate, and has a shape obtained by cutting out four corners of a quadrangle, and a second excitation electrode disposed on the other principal surface of the substrate, and a ratio (S2/S1) between the area S1 of the quadrangle and the area S2 of the first excitation electrode fulfills 87.7%≦(S2/S1)

An oscillating device includes a temperature compensated oscillator that compensates a frequency temperature characteristic in a temperature compensation range including apart of a first temperature range, and a temperature control circuit that includes a heater and controls a temperature of a quartz crystal resonator of the temperature compensated oscillator into a second temperature range included in the temperature compensation range. Further, the temperature compensation range of the temperature compensated oscillator may include a part of the first temperature range in which compensation can be performed by first-order approximation.

An atomic oscillator includes: a gas cell which includes two window portions having a light transmissive property and in which metal atoms are sealed; a light emitting portion that emits excitation light to excite the metal atoms in the gas cell; a light detecting portion that detects the excitation light transmitted through the gas cell; a heater that generates heat; and a connection member that thermally connects the heater and each window portion of the gas cell to each other.

An oscillation device is provided. The oscillation device includes: a main circuit portion, a heating unit, first and second crystal units, first and second oscillator circuits, a frequency difference detector, a first addition unit, an integration circuit unit, a circuit unit configured to control an electric power to be supplied to the heating unit, a compensation value obtaining unit, and a second addition unit. The compensation value obtaining unit is configured to obtain a frequency compensation value for compensating an output frequency of the main circuit portion based on an integrated value output from the integration circuit unit, and based on a change in the clock signal due to a difference between the temperature of the atmosphere and the temperature setting value of the heating unit. The second addition unit is configured to add the frequency compensation value to a frequency setting value.

An integrated structure of compound semiconductor devices is disclosed. The integrated structure comprises from bottom to top a substrate, a first epitaxial layer, an etching-stop layer, a second epitaxial layer, a sub-collector layer, a collector layer, a base layer, and an emitter layer, in which the first epitaxial layer is a p-type doped layer, the second epitaxial layer is an n-type graded doping layer with a gradually increased or decreased doping concentration, and the sub-collector layer is an n-type doped layer. The integrated structure can be used to form an HBT, a varactor, or an MESFET.

A current output control device is provided that includes: a current cell array section including plural current cell circuits that are each connected in parallel between a first terminal (power source) and a second terminal (ground) that connect between the first terminal and the second terminal in by operation ON so as to increase control current flowing between the first terminal and the second terminal; and a code conversion section (decoder) that generates signals (row codes, column codes) to ON/OFF control current cells so as to change the number of current cells that connect the first terminal and the second terminal according to change in an externally input code and that inputs the generated signals to the current cell array section.

A seal member for an aseptic coupling device includes a cross-sectional area including a first end portion, a middle portion, and a second end portion opposite the first end portion, the middle portion being thinner in radial dimension than the first and second end portions.

An apparatus includes a light foil device configured to move based on radiation pressure associated with light received by the light foil device. The apparatus includes a mechanism configured to transition between operational states in response to the movement of the light foil device, or includes a valve configured to control a flow of material through a conduit based, at least in part, on the movement of the light foil device.

In a control device for a technical processing plant, a pneumatically driven actuator having an actuator stem is provided together with a valve operated by the actuator, the valve having a valve stem. A valve element is attached to the valve stem. A stem connector connects the two stems to each other for a forced transmission of axial actuating movements and for modifying an axial distance between adjacent ends of the valve stem and the actuator stem to adjust a total axial length of the two stems. The stem connector comprises two half-shells connected to each other, and two positioning devices are provided for a friction-locking coupling of the half-shells to the respective ends. At least one of the positioning devices is designed to modify an axial attachment position of the half-shells along one of the stems.

A valve assembly having a valve-seal on a valve member that moves between an open and a closed position within a valve support housing for controlling fluid flow, particularly for use as a shut-off valve. In many embodiments, advancing the valve member sealingly engages the valve-seal with a valve seating area of the housing to close the valve and shut-off fluid flow through the housing, while retracting the valve member moves the valve-seal away from the seating area to allow fluid flow around the valve-seal and through the valve-seating area. In many embodiments, the valve member includes a proximal handle and angled ramp that engage with a helical ramp of the housing to translate rotation of the handle into axial movement of the member between open and closed positions.

In a processing machine including a processor having a processing blade and a receiver having a reception member and in which a blade edge of the processing blade and a reception portion, of the reception member, engage with each other to process a paper sheet therebetween, the processing blade is one processing blade selected from a blade group and is attached to the processor so as to be changeable to another processing blade of the blade group, reception portions of kinds corresponding to a plurality of kinds of the processing blades of the blade group are formed on the reception member, and the processing blade attached to the processor is positioned so as to be in a position where the blade edge is engageable with the reception portion of the corresponding kind.

A method and device for the production of books, including: moving book blocks successively along a conveying section of a book production line; supplying a stack of book cases to the book production line; identifying a marking on each of the book blocks and the book cases; transmitting an identified marking on at least one book case to a machine control of the book production line; assigning a dataset stored in the machine control for a sequence of book cases to the supplied stack; determining a sequence in the machine control for book blocks positioned on the conveying section; comparing the dataset for the sequence of the book cases to the sequence of the book blocks; and removing and/or supplying at least one book block from or to the conveying section if the sequence of the book blocks deviates from the sequence of the book cases using the machine control.

A sheet handling apparatus includes a sheet folding unit configured to perform folding on a sheet; and a sheet stacking unit configured to stack the folded sheet on a sheet stacking surface having an inclined surface and a horizontal surface in order from upstream to downstream in a sheet conveying direction. A downstream end of the inclined surface is higher than an upstream end of the inclined surface with respect to a horizontal plane. The sheet handling apparatus also includes a discharging unit configured to discharge the folded sheet to the sheet stacking unit; a sheet conveying unit configured to convey the discharged sheet from the inclined surface to the horizontal surface; and a conveying force applying unit configured to apply a conveying force to the sheet in contact with an upper surface of the sheet from above the inclined surface.

The post-processing device includes: a binding unit that forms a cut in a sheet stack and cuts a part of the sheet stack into a predetermined shape to form a tongue portion in the sheet stack, the tongue portion having a part where one end part of the tongue portion is not separated from the sheet stack, and binds the sheet stack by bending the tongue portion and inserting the other end part of the tongue portion into the cut; and a sheet stack transport unit that transports the sheet stack in an orientation such that the one end part of the tongue portion in the sheet stack bound by the binding unit is on a downstream side of the other end part of the tongue portion in the sheet stack transport direction.

A supply device (10) for a machine for transversely cutting two strips (11 and 12) of a flexible material, in particular a strip of paper, moving continuously, to produce separate stacks of documents cut transversely according to predetermined formats. The device comprises lower and upper driving mechanisms (13, 14) associated with the two strips (11, 12) of flexible material respectively, which each include a mechanically rotated first roller (13a, 14a) and a freely rotatable second bearing roller (13b and 14b). The driving mechanism is mounted on a frame (15) supported by a movable platform (16) which is rigidly connected to a linear actuator (17) arranged to be moved transversely with respect to the direction of movement of the strips (11 and 12). Optical reading cells (11a, 11b, 12a, 12b) define the operating modes of the driving servomotors (13b and 14b) and of the linear actuator (17).