A communication apparatus with a multiple-input and multiple-output (MIMO) channel, includes a minimum mean square error (MMSE) detector configured to estimate quadrature amplitude modulation (QAM) symbols based on signals received through the MIMO channel. The apparatus further includes a QAM demodulator configured to demodulate the estimated QAM symbols, and estimate a first posterior probability of each of encoded bits of the estimated QAM symbols, and a first module configured to remove a first prior probability of each of the encoded bits from the first posterior probability to generate soft estimates of the encoded bits. The apparatus further includes a channel decoder configured to decode the encoded bits based on the soft estimates, and generate an improved posterior probability of each of the encoded bits, and a second module configured to generate a second prior probability of each of the encoded bits based on the improved posterior probability.

A digital broadcasting receiving system is provided. A receiving module receives an M number of symbols each carrying an N number of subcarriers of a control signal. A converting module performs FFT on respective kth subcarriers of an ith symbol and an (i+1)th symbol to generate an (i, k)th converted value and an (i+1, k)th converted value. A demodulating module performs differential demodulation on the (i, k)th and (i+1, k)th converted values to generate an (i, k)th demodulation value. A combining module soft-combines the (i, 1)th demodulation value through the (i, N)th demodulation value to generate an ith prediction value corresponding to the ith symbol. A determining module identifies a synchronization segment in the control signal according to the 1st prediction value to the (M−1)th prediction value.

Various embodiments associated with an at least fourth-order cumulant of a signal are described. The at least fourth-order noise-insensitive cumulant of the signal can be taken and compared against an at least fourth-order noise-insensitive cumulant of known signals. A match can be found between the signal and a known signal and from this match, a demodulation scheme of the signal can be determined. The demodulation scheme can be used to demodulate the signal.

A system that incorporates the subject disclosure may include, for example, a process that includes adjusting a filter in electrical communication between an input terminal and a demodulator. The filter is applied to an information bearing signal, e.g., to mitigate interference, received at the input terminal, resulting in a filtered signal. An error signal is received, indicative of errors detected within information obtained by demodulation of a modulated carrier of the filtered signal. A modified filter state is determined in response to the error signal and the filter is adjusted according to the modified filter state, e.g., to improve mitigation of the interference. Other embodiments are disclosed.

In general, the present invention provides methods and apparatuses for exploiting the extra degree of freedom provided by the sensing of the CM signal along with the DM signal at the receiver end of a wireline communication system. According to certain aspects, this extra degree of freedom can be used to cancel alien noises at the receiver in both upstream downstream directions. According to further aspects, a CM channel can be potentially used to exploit the diversity created in the CM channel along with the regular DM channel. This acts as the motivation for employing a diversity receiver scheme at the receiver, especially in downstream communications received at a Customer Premises.

Radio frequency (RF) receivers having whitened digital clocks and related methods are disclosed. Disclosed embodiments generate whitened clocks having random variations that are used to operate digital processing blocks so that interference created by the whitened clocks is seen as white noise within the received RF signal spectrum. RF input signals are received by RF front-ends (RFFEs) that output analog signals associated with channels within the RF input signals. These analog signals are converted to digital information and processed by digital receive path circuitry that outputs digital data associated with the channel. The digital receive path circuitry includes a whitened clock generator that generates a whitened clock having random variations and which a digital processing block that operates based upon the whitened clock. Further, the RFFE and the digital receive path circuitry are located within a single integrated circuit.

A receiving circuit, use, and method for receiving an encoded and modulated radio signal is provided. The circuit comprise a demodulator and a digital filter connected downstream of the demodulator for moving averaging. The filter has at least two FIFO registers and subtractors. Whereby for subtracting an output value of the FIFO register from an input value of the FIFO register a subtractor is connected to each FIFO register. Wherein the filter has a weighting unit, which is connected downstream of each FIFO register, and wherein the filter has an integrator, which is connected downstream of the subtractors for integration.

A wideband multi-channel receiver comprises an antenna configured to receive a radio frequency band. A band-pass filter is in signal communication with the antenna, and a low-noise amplifier is in signal communication with the band-pass filter. A mixer is in signal communication with the low-noise amplifier and is configured to translate a radio frequency band to an intermediate frequency (IF) band. A tunable local oscillator is in signal communication with the mixer. At least one fixed-frequency notch filter is in signal communication with the mixer, with the notch filter configured to reject at least one interference signal in the IF band while passing remaining signals in the IF band. An analog-to-digital converter is in signal communication with the notch filter and is configured to convert the remaining signals in the IF band to digital signals.

In a data recovery circuit, a sampling circuit is configured to sample data using a plurality of sampling clock signals having different phases relative to one another and to output a plurality of sampled data. A recovery data generation circuit is configured to perform a logic operation on the plurality of sampled data and to generate a plurality of intermediate recovery data according to a result of the logic operation. A recovery circuit is configured to check the plurality of intermediate recovery data for existence of an error and to output intermediate recovery data that is error-free, among the plurality of intermediate recovery data, as recovery data.

A method and system provides for execution of calibration cycles from time to time during normal operation of the communication channel. A calibration cycle includes de-coupling the normal data source from the transmitter and supplying a calibration pattern in its place. The calibration pattern is received from the communication link using the receiver on the second component. A calibrated value of a parameter of the communication channel is determined in response to the received calibration pattern. The steps involved in calibration cycles can be reordered to account for utilization patterns of the communication channel. For bidirectional links, calibration cycles are executed which include the step of storing received calibration patterns on the second component, and retransmitting such calibration patterns back to the first component for use in adjusting parameters of the channel at first component.

A data transmission apparatus disposed within two network layers operative at different data rates is provided. The data transmission apparatus is coupled to a clock generator which provides a reference clock for a lower network layer and is coupled to a frequency synthesizer with an integer division factor that generates a divided clock for an upper network layer according to the reference clock and the integer division factor. The data transmission apparatus includes a first processing circuit and a second processing circuit. The first processing circuit corresponding to the upper network layer receives and transmits data by using the divided clock as its operation frequency. The second processing circuit corresponding to the lower network layer receives and transmits data from the first processing circuit by using the reference clock as an operation frequency for encoding data. The divided clock is generated from the frequency synthesizer with the integer division factor.

Systems and methods for discrete signal synchronization based on a known bit pattern are described. In one aspect of the present subject matter, a discrete signal synchronization system is configured to synchronize a preprocessed discrete signal with a modified discrete signal. The system comprises a processor and a synchronization module coupled to the processor. The synchronization module comprises an extraction module and comparison module. The extraction module determines a bit pattern from the modified discrete signal using Discrete Wavelet Transformation (DWT) and Singular Value Decomposition (SVD). The comparison module compares the determined bit pattern with a known bit pattern of the preprocessed discrete signal and records a time point at which the determined bit pattern matches with the known bit pattern of the preprocessed discrete signal as a synchronization point.

A method and apparatus prioritizing video information during coding and decoding. Video information is received and an element of the video information, such as a visual object, video object layer, video object plane or keyregion, is identified. A priority is assigned to the identified element and the video information is encoded into a bitstream, such as a visual bitstream encoded using the MPEG-4 standard, including an indication of the priority of the element. The priority information can then be used when decoding the bitstream to reconstruct the video information.

A direction of regularity, which minimizes a directional energy computed from pixel values of consecutive first and second frames of an input video sequence, is respectively associated with each pixel of the first frame and with each pixel of the second frame. Another direction of regularity (vz), which minimizes a directional energy computed from pixel values of the first and second frames, is also associated with an output pixel (z) of a frame of an output video sequence, located in time between the first and second frames. For processing such output pixel, the respective minimized directional energies for the output pixel, at least one pixel (z') of the first frame and at least one pixel (z″) of the second frame are compared to control an interpolation performed to determine a value of the output pixel. The interpolation uses pixel values from at least one of the first and second frames of the input video sequence depending on the comparison of the minimized directional energies.

In a wireless network, plural downlink signals from plural base stations are transmitted to a terminal. The plural downlink signals all carry the same information to the terminal. The terminal provides feedback on the downlink channels. The feedback provides information on the taps of the channels. The amount of information fed back is constrained. Based on the feedback, transmission parameters of the downlink signals are adjusted. The process of transmitting, providing feedback, and adjusting the parameters continue so that the energy of the downlink signal is enhanced at the terminal location and suppressed elsewhere. Beam forming can be used to further suppress the energy signature at locations other than the terminal location.

Techniques for extracting the characteristic response of a non-linear channel are presented. In various implementations of the invention, a channel's characteristic response may be determined by identifying a first input sequence, determining the ones compliment of the first input sequence and then determining the response of the channel to these two input sequences. Subsequently, two input matrices and two response matrices may be generated based upon the two input sequences and their corresponding responses. Given these four matrices, a symmetrical response component may be determined by iteratively solving a system of equations formed from the columns of each matrix. Subsequently, given the symmetric component and these four matrices, an asymmetrical response component may be determined by again iteratively solving the system of equations for the columns of each matrix.

Transmission quality is improved in an environment in which direct waves dominate in a transmission method for transmitting a plurality of modulated signals from a plurality of antennas at the same time. All data symbols used in data transmission of a modulated signal are precoded by hopping between precoding matrices so that the precoding matrix used to precode each data symbol and the precoding matrices used to precode data symbols that are adjacent to the data symbol in the frequency domain and the time domain all differ. A modulated signal with such data symbols arranged therein is transmitted.

In this VSWR measurement circuit, a power measurement unit measures the power level of a reflected signal which is included in a feedback signal which has been extracted at a second CPL which has been deployed at a position connecting to an antenna end via a cable. To this end, the VSWR measurement circuit is provided with a main signal component removal circuit, wherein the main signal which has been extracted from the prestage of a digital pre-distortion circuit, and a signal in which the feedback signal that had been extracted at the second CPL has been converted to a digital signal at an A/D CONV, are provided as inputs, the main signal component included in the feedback signal is removed, and only the reflected signal is extracted so as to be output to the power measurement unit.

A decoder receives a bitstream containing quantized coefficients representative of blocks of video representative of a plurality of pixels and decodes the bitstream using context adaptive binary arithmetic coding that includes at least two decoding modes, the first mode decoding the bitstream based upon a probability estimate which is based upon at least one of spatially and temporally adjacent syntax element values to a current syntax element being decoded, the second mode decoding the bitstream not based upon a probability estimate based upon other syntax elements to the current syntax element being decoded. The coding decodes the current syntax element using the first mode if the current syntax element is intra-coded and selecting between sets probable modes with different probabilities. The coding decodes the current syntax element using the second mode if the current syntax element is intra-coded and if selecting among one of the second set of probable modes.

A transport stream (TS) generating apparatus, a transmitting apparatus, a receiving apparatus, a digital broadcast system having the above, and a method thereof are provided. The digital broadcast system includes a transport stream (TS) generating apparatus which generates a multi transport stream (TS) by multiplexing a normal stream and a turbo stream having a variable coding rate, a transmitting apparatus which re-constructs the multi TS by processing the turbo stream, and transmits the re-constructed multi TS, and a receiving apparatus which receives the re-constructed multi TS, and decodes the normal stream and the turbo stream respectively, to recover normal data and turbo data. Accordingly, a multi TS, which includes normal stream and a turbo stream of various coding rates, can be transmitted and received efficiently.

The adjustable headset is an all in one device that includes an adjustable support band, a display system, a first and second ear cover, a computer system, a communications system, and a power source. The adjustable support band connects to each ear cover, with the ear covers being adjacent to a user's ears. The display system uses binary screens to create the experience of looking at large screens by taking up most of a user's field of view. The display system is attached to the ear covers by adjustable screen bars, which allow a user to change the general orientation of the display system. The computer system is capable of storing and running software programs and interfacing with connected devices by means of a set of connection ports or the communications system. The virtual goggles can adjust to meet individual comfort needs and interface with a variety of technologies.

Methods, apparatuses, and computer program products for improving memory training results corresponding to a plurality of memory modules are provided. Embodiments include detecting a hardware configuration change upon initiating a boot sequence of a system that includes the plurality of memory modules; generating for a plurality of training iterations, reference training values corresponding to aligning of a data strobe (DQS) signal with a data valid window of data (DQ) lines of the plurality of memory modules; identifying for each training iteration, any outer values within the reference training values generated for that training iteration; eliminating the identified outer values from the reference training values; generating a final reference training value based on an average of the remaining reference training values; and using the final reference training value as the DQ-DQS timing value for the boot sequence of the system.

Gesture based interaction with traffic data is disclosed. A virtual broadcast presentation may be generated based on dynamic information such as traffic information, weather information, or other information that may be featured on a virtual broadcast presentation. A gesture made by a user is detected and processed to determine an input command associated with the detected gesture. The virtual broadcast presentation may be manipulated based on the input command.

Sequential write operations to a unit of compressed memory, known as a compression tile, are examined to see if the same compression tile is being written. If the same compression tile is being written, the sequential write operations are coalesced into a single write operation and the entire compression tile is overwritten with the new data. Coalescing multiple write operations into a single write operation improves performance, because it avoids the read-modify-write operations that would otherwise be needed.

Charge corresponding to a potential difference between electrodes of an electroluminescence element is accumulated in a period in which the electroluminescence element emits light; the potential difference is detected without decrease in the luminance at the time of light emission of the electroluminescence element; and a reference potential of one electrode of the electroluminescence element is changed based on the detected potential difference, so that reduction in luminance of the electroluminescence element due to deterioration of the electroluminescence element is compensated.

An organic light emitting display device includes: a scan driver; a data driver; a display unit including pixels located at crossing regions of scan lines and data lines; first power lines coupled between a first power supply and the pixels; at least one second power line located outside the display unit and coupled to a second power supply having a voltage different from a voltage of the first power supply; at least one third power line coupled to a third power supply having a voltage different from the voltage of the first power supply; and fourth power lines coupled to the pixels, wherein the pixels are charged with voltages corresponding to the data signals and the third power supply and are configured to control the amount of current flowing from the first power supply in response to the voltages charges in the pixels.

A 5-wire touch screen system includes a touch screen (10) including a wiper (11) and a resistive layer (16) aligned with the wiper and first (UL), second (UR), third (LR), and fourth (LL) resistive layer contacts, wherein a touch on the screen presses a small portion of the wiper against the resistive layer, producing a touch resistance (RZ) between them at a touch point on the resistive layer. The wiper and various contacts are selectively coupled to first (VDD) and second (GND) reference voltages, respectively, to generate an analog touch voltage (VZ) at the touch point. The wiper and various contacts are selectively coupled to an analog input (56) and a reference voltage input of an ADC (48) for converting the touch voltage (VZ) to a digital representation. Analog voltages (VX) and (VY) at the touch point are converted to corresponding digital representations by the ADC.

In a pulse output circuit in a shift register, a power source line which is connected to a transistor in an output portion connected to a pulse output circuit at the next stage is set to a low-potential drive voltage, and a power source line which is connected to a transistor in an output portion connected to a scan signal line is set to a variable potential drive voltage. The variable potential drive voltage is the low-potential drive voltage in a normal mode, and can be either a high-potential drive voltage or the low-potential drive voltage in a bath mode. In the batch mode, display scan signals can be output to a plurality of scan signal lines at the same timing in a batch.

A pixel circuit able to prevent a spread of the terminal voltages of drive transistors inside a panel and in turn able to reliably prevent deterioration of uniformity, wherein a source of a TFT serving as a drive transistor is connected to an anode of a light emitting element, a drain is connected to a power source potential, a capacitor is connected between a gate and source of the TFT, and a source potential of the TFT is connected to a fixed potential through a TFT serving as a switch transistor and wherein pixel circuit lines are connected by an upper line and bottom line and are arranged in parallel with pixel circuit power source voltage lines so as not to have intersecting parts.

Generating a corrected electronic record of a locate and/or marking operation. The operation comprises locating and/or identifying, using a physical locate mark, presence or absence of an underground facility within a dig area. At least a portion of the dig area may be excavated or disturbed. First information relating to a location of the facility and/or the mark is received. Based at least in part on the first information, the location of the facility and/or the mark is represented to generate an electronic visual representation of the operation. Second information relating to a corrected location of the facility and/or the mark is received. Based at least in part on the second information, the corrected location is represented to generate a corrected electronic visual representation of the operation. Third information relating to the corrected representation of the operation is transmitted and/or stored to generate the corrected electronic record of the operation.

A method is disclosed for assessing an aspect relating to a locate and/or marking operation performed by a locate technician based on an electronic representation of the operation. The operation includes locating and/or identifying, using a physical locate mark, a presence or an absence of an underground facility within a dig area. A portion of the dig area may be excavated or disturbed during excavation activities. The method includes digitally representing, on a display device, the facility and/or the physical locate mark to generate an electronic visual representation of the operation. The method further includes determining a length associated with a portion of the digitally represented facility and/or physical locate mark in the electronic visual representation of the operation. The method further includes, based on the determined length, automatically assessing the aspect relating to the operation.

Generating a digital-media-enhanced electronic record of a locate and/or marking operation performed by a locate technician. The locate and/or marking operation comprises locating and/or identifying, using at least one physical locate mark, a presence or an absence of at least one underground facility within a dig area, wherein at least a portion of the dig area may be excavated or disturbed during excavation activities. A location of the at least one underground facility and/or the at least one physical locate mark is electronically rendered on a display device so as to generate an electronic visual representation of the locate and/or marking operation. At least one digital media file representation of a corresponding digital media file relating to at least one aspect of the locate and/or marking operation or an environment of the dig area is also electronically rendered on the display device, so as to generate a digital-media-annotated representation of the locate and/or marking operation. Information relating to the digital-media-annotated representation of the locate and/or marking operation is electronically transmitted and/or stored so as to generate the digital-media-enhanced electronic record of the locate and/or marking operation.

Embodiments of the present disclosure are directed towards a circuit board having integrated passive devices such as inductors, capacitors, resistors and associated techniques and configurations. In one embodiment, an apparatus includes a circuit board having a first surface and a second surface opposite to the first surface and a passive device integral to the circuit board, the passive device having an input terminal configured to couple with electrical power of a die, an output terminal electrically coupled with the input terminal, and electrical routing features disposed between the first surface and the second surface of the circuit board and coupled with the input terminal and the output terminal to route the electrical power between the input terminal and the output terminal, wherein the input terminal includes a surface configured to receive a solder ball connection of a package assembly including the die. Other embodiments may be described and/or claimed.

A circuit card is provided that includes ground traces that extend from a resistor to a commoning bar, where a resultant electrical length between the resistor and the commoning bar and is configured to reduce energy carried on the ground terminals that could otherwise result in cross-talk. In an embodiment, the ground trace may be configured in a meandering manner. In another embodiment, the ground trace may be split and joined by an inductor.

A transmission line is provided in which a first portion of the transmission line is configured to be connected to a source, and a second portion of the transmission line is configured to be connected to a load. A capacitive element is coupled to the transmission line and is configured to compensate for an impedance difference between the load and at least one of the source or the transmission line, at a frequency within a frequency bandwidth of the load. A difference between an internal capacitance of the first portion of the transmission line and the second portion of the transmission line substantially matches the capacitance of the capacitive element.

There is provided a high frequency switch having a reduced circuit scale while maintaining satisfactory harmonic characteristics in a transfer path of a high frequency signal. The high frequency switch includes: at least one transmission port; at least one reception port; a common port; transmission side series switches each including a body contact type FET; transmission side shunt switches each including a body contact type FET; reception side series switches each including a body contact type FET; and reception side shunt switches each including at least one floating body type FET.

A SAW filter circuit having improved ESD resistance is specified, in which a series interconnection composed of SAW resonators is interconnected between a first signal port and a dual-mode SAW filter port. The static capacitance of the series interconnection is at most four times the static capacitance of the dual-mode SAW filter transducers interconnected therewith.

A right circular cylindrical body of an isotropic dielectric such as a cross-linked styrene copolymer, has respective pluralities of mutually parallel grooves formed in its axial end faces, spaced apart by an intermediate portion whose dimension c is a half wavelength. The axial lengths a, b of the grooves are such that when a wave passes through the body, a quarter wavelength phase difference is produced between a component of a wave having its E-vector parallel to the grooves and a component of the wave having its E-vector orthogonal to the grooves. Alternatively the plate may consist of two or more discrete bodies whose grooves are dimensioned to produce a total differential phase shift of one quarter wavelength.

An attenuation reduction control structure for high-frequency signal transmission lines of a flexible circuit board includes an impedance control layer formed on a surface of a substrate. The impedance control layer includes an attenuation reduction pattern that is arranged in an extension direction of the high-frequency signal transmission lines of the substrate and corresponds to bottom angle structures of the high-frequency signal transmission lines in order to improve attenuation of a high-frequency signal transmitted through the high-frequency signal transmission lines. An opposite surface of the substrate includes a conductive shielding layer formed thereon. The conductive shielding layer is formed with an attenuation reduction pattern corresponding to top angle structures of the high-frequency signal transmission lines.

Embodiments of resonator circuits and modulating resonators and are described generally herein. One or more acoustic wave resonators may be coupled in series or parallel to generate tunable filters. One or more acoustic wave resonances may be modulated by one or more capacitors or tunable capacitors. One or more acoustic wave modules may also be switchable in a filter. Other embodiments may be described and claimed.

A de-noise circuit and a de-noise method for differential signals and a chip for receiving differential signals are provided. The de-noise circuit includes a filter and a register. Both the filter and the register are disposed in the chip. The chip receives a differential signal through a first input terminal and a second input terminal. The filter is coupled between the first input terminal and the second input terminal of the chip. The filter filters out noises in the differential signal. The filter includes at least one filter unit. Each filter unit has at least one resistance value or at least one capacitance value. The register is coupled to the filter. The register receives and stores a control value. The register controls the resistance value or the capacitance value of at least one of the filter units based on the control value.

To provide a capacitive device capable of accurately securing a capacitance value, a variable capacitive device capable of sufficiently securing a capacity variability rate, and a resonance circuit that uses the capacitive devices. A capacitive device includes a capacitive device body constituted of a dielectric layer and at least a pair of capacitive device electrodes that sandwich the dielectric layer and cause a desired electric field in the dielectric layer; and stress adjustment portions to adjust a stress caused in the dielectric layer of the capacitive device body.

A coupling structure for a multi-layered chip filter includes a resonator layer including a resonator pattern with spaced areas and a coupling layer including at least two separated overlap portion patterns overlapped with the spaced areas of the resonator pattern respectively and a connecting portion pattern having multiple linear portions connecting the separated overlap portion patterns in an area not-overlapped with the resonator pattern.

A cavity filter includes a slider, a driving device, and an adapter. The slider is used to slide relative to and couple with a plurality of resonators located in the cavity filter to adjust a resonating frequency of the cavity filter. The driving device is used to drive the slider slide relative to the plurality of resonators and includes a shaft having a free end. The adapter is installed between the slider and the driving device and rotateably connected to the free end of the shaft with a gap configured between the free end and the adapter.

Implementations for exciting two or more modes via modal decomposition of a pulse by a wave launcher are generally disclosed.

Embodiments of the present invention provide a filter, a receiver, a transmitter, and a transceiver. The filter includes a resonant cavity component, a microstrip filtering component, and two connecting pieces, where the resonant cavity component includes at least two resonant cavities connected in parallel, each resonant cavity is provided with a resonator and a tuning screw, the microstrip filtering component includes a dielectric substrate and a microstrip positioned on the dielectric substrate, one of the connecting pieces matches and connects one end of the microstrip to the resonator on one resonant cavity, the other connecting piece matches and connects the other end of the microstrip to the resonator on another resonant cavity, and impedance of the resonant cavity component is less than impedance of the microstrip filtering component.

An unbalanced-balanced conversion circuit element includes an inductor connected in series between an unbalanced terminal and a first balanced terminal. The first balanced terminal side of the inductor is grounded via a capacitor. A capacitor is connected in series between the unbalanced terminal and a second balanced terminal. An inductor is connected between the first balanced terminal side of the inductor and the second balanced terminal side of the capacitor. In a laminate defining the unbalanced-balanced conversion circuit element, the capacitor is spaced far from a mounting surface of the laminate in comparison with other circuit elements.

A woven fabric for a low profile implantable medical device includes a plurality of textile strands of a composite yarn aligned in a first direction interlaced with a plurality of textile strands of the composite yarn aligned in a second direction. The composite yarn includes a combination of a first material and a second material. The textile strands have a size between about 10 denier to about 20 denier. The first material has at least one characteristic different from the second material and the second material reacts favorably with blood when placed within an artery.

Fabric strap having at least two different segments. The first segment is wider and less elastic, providing a comfortable contacting area to the skin and the other segment is narrower and more elastic which is aesthetically more pleasing and easier for applying sewing process in the garment production. Preferably, the first segment is a sealed tubular structure and contains internally free-floating yarns, making it exert less stress to the skin and thus more comfortable to the wearer. In addition, the different segments of the strap are made in a single integral weaving process and thus is conducive to industry automation.

A textile sleeve for routing and protecting elongate members and method of construction thereof is provided. The sleeve includes an elongate wall having opposite edges extending parallel to a central axis. The wall is woven with warp yarns extending parallel to the axis and hybrid fill yarns extending transversely to the warp yarns. The hybrid fill yarns are provided having a yarn filament core and non-metallic first and second yarn filaments overlying the yarn filament core. The first yarn filament is twisted about the yarn filament core in a first helical direction and the second multifilament yarn is twisted over the first yarn filament and about the yarn filament core in a second helical direction. The first helical direction and the second helical direction being opposite one another to provide a resultant zero torque on the yarn filament core.