A self-feedback random generator comprises a digital-to-analog converter, a digital oscillator, a frequency-modulating unit and a first D-type flip-flop. The digital-to-analog converter receives a digital random-code signal and the digital random-code signal is converted to corresponding analog random signal. The frequency-modulating unit modulates frequency of first digital oscillating signal so as to increase random of frequency of first digital oscillating signal according to voltage value of the analog random signal, and accordingly outputs a second digital oscillating signal. The first D-type flip-flop receives the second digital oscillating signal and a clock signal, and reads the second digital oscillating signal through utilizing the clock signal so as to outputs the digital random-code signal, wherein frequency of the clock signal is smaller than frequency of the first digital oscillating signal, and random of frequency of the second digital oscillating signal corresponds to random of the digital random-code signal.

There are provided an accumulator-type fractional N-PLL synthesizer for suppressing the fractional spurious caused by periodically switching a frequency division number of a fractional frequency divider, and a control method thereof. In an accumulator-type fractional N-PLL synthesizer (100), a pulse signal proportional to a fractional phase error occurring between a reference signal and an output signal of a fractional divider (112) for feeding back an output of a VCO (115) of an output stage to a preceding stage is generated using an error signal from an accumulator (120). Through the use of the pulse signal, pulse widths of a UP signal and a DN signal output from a phase detector (140) are controlled so as to reduce a fractional phase error occurring between the UP signal and the DN signal. Thus, the fractional spurious caused by periodically switching the frequency division number of the fractional divider (112) is suppressed.

The present invention discloses an Oven Controlled Crystal Oscillator and a manufacturing method thereof. The Oven Controlled Crystal Oscillator comprises a thermostatic bath, a heating device, a PCB and a signal generating element, where the signal generating element is used for generating a signal of a certain frequency, the heating device, the PCB and the signal generating element are mounted in the thermostatic bath, the signal generating element is mounted in a groove formed on one side of the PCB, while the heating device is mounted against the other side of the PCB that is opposite to the groove. The signal generating element may be a passive crystal resonator or an active crystal oscillator. The Oven Controlled Crystal Oscillator according to the invention is advantageous for a small volume and a high temperature control precision.

Disclosed are a phase locked loop (PLL) of a digital scheme and a method thereof. More specifically, disclosed are a digital phase locked loop having a time-to-digital converter (TDC), a digital loop filter (DLF), and a digitally controlled oscillator (DCO), and that is designed to have a constant jitter characteristic at all times even though an operating condition of a circuit varies according to a process, voltage, temperature (PVT) change, and a method thereof.

A solenoid actuator comprising an armature member that engages a spool including a spool cap on an end of the spool that is axially movable relative to the spool. A bore in the spool allows fluid to flow from a control port to the spool cap, such that pressure is established in the spool cap. The pressure established in the spool cap acts on the spool with a force directly proportional to the control pressure and the fluid-contacting area inside the spool cap.

A most recent electrostatic capacitance value for a backup capacitor is measured periodically. Each time the most recent electrostatic capacitance value is measured, a charging voltage (a required charging voltage) that is required in order to cause a return operation of a valve from the setting opening at that time to an emergency opening/closing position (for example, the fully closed position) is calculated based on the electrostatic capacitance value that has been measured, and the terminal voltage of the backup capacitor is adjusted so as to become equal to the calculated required charging voltage.

Power-efficient actuator apparatus and methods. In one exemplary embodiment, the actuator assembly utilizes a shape memory alloy (SMA) filament driven by an electronic power source to induce movement in the underlying assembly to actuate a load (e.g., water valve). In addition, a circuit board is included which allows the actuator assembly to be readily incorporated or retrofit into a wide range of systems such that the signal characteristics of the supply line can, among other applications, be conditioned in order to protect the SMA filament. Furthermore, the circuit board can also readily be adapted for use with “green” power sources such as photovoltaic systems and the like. Methods for manufacturing and utilizing the aforementioned actuator assembly are also disclosed.

A direct acting solenoid actuator includes an armature and associated push pin that are suspended from certain fixed solenoid components, such as a pole piece and/or flux sleeve, by a fully floating cage of rolling elements. The fixed solenoid component may comprise a pole piece and/or a flux sleeve. The pole piece may include stops to limit movement of the cage of rolling elements in the axial direction.

An actuator includes a first piston and a second piston. The first piston has a piston ring that separates a first chamber from a second chamber of the actuator. The first piston has an interior chamber that communicates with the first chamber. The second piston is disposed within the interior chamber of the first piston so as to be movable with respect thereto. The second piston has a surface that interfaces with the second chamber.

The invention relates to a valve actuator (2), comprising a magnetic core (6) with an interspace (8) and at least one bifurcating branch (7), at least one variable magnetic field generating device (16), at least one permanent magnetic field generating device (13) and at least one movable magnetic component (12), wherein the bifurcating branch (7) defines a first region (4) and a second region (5) of said magnetic core (6). Said movable magnetic component (12) is movably arranged within said interspace (8) of said magnetic core (6) in such a way that a first gap (19) is formed between a first surface (23) of said movable magnetic component (12) and a first surface (22) of said interspace (8) of said magnetic core (6), a second gap (20) is formed between a second surface (24) of said movable magnetic component (12) and a second surface (25) of said interspace (8) of said magnetic core (6), and a third gap (21) is formed between a third surface (27) of said movable magnetic component (12) and a third surface (26) of said bifurcating branch (7) of said magnetic core (6). At least one of said variable magnetic field generating devices (48, 49) is associated with said first region (4) of said magnetic core (6) and at least one of said permanent magnetic field generating devices (13) is associated with said second region (5) of said magnetic core (6). Said valve actuator (2) is designed and arranged in a way that a magnetic flux, generated by at least one at least one of said variable magnetic field generating devices (16) is able to exert a force on said at least one movable magnetic component (12) and is able to cancel the magnetic flux (48, 49), generated by at least one of said permanent magnetic field generating devices (13). At least one magnetic flux limiting means (7, 12) is provided, whose magnetic flux limit can be reached or exceeded.

A drain plug assembly that has particular application for sealing a drain hole in a high voltage battery compartment on a vehicle. The plug assembly includes a plug that inserted into the drain hole. The plug assembly further includes a return spring coupled to the plug and causing the plug to be biased into the drain hole. The plug assembly also includes at least one shape memory alloy device coupled to the plug and a support structure. The SMA device receives an electrical current that causes the device to contract and move the plug out of the drain hole against the bias of the return spring.

A valve, in particular a vacuum valve, in which, in order to close a passage opening, in particular of the valve, at least one closure member can be moved by a valve drive, starting from a maximum open position, in which the closure member opens the passage opening at least partially, first on a first partial path into an intermediate position, and the closure member can be moved, starting from the intermediate position, on at least one second partial path which is angled away from the first partial path into a closed position, in which the closure member closes the passage opening, the valve drive having at least two cylinder spaces which are loadable in each case with a pressure medium, at least one piston being mounted displaceably in each of the cylinder spaces, and the pistons being supported on one another by way of at least one prestressing element.

In a processing machine including a processor having a processing blade and a receiver having a reception member and in which a blade edge of the processing blade and a reception portion, of the reception member, engage with each other to process a paper sheet therebetween, the processing blade is one processing blade selected from a blade group and is attached to the processor so as to be changeable to another processing blade of the blade group, reception portions of kinds corresponding to a plurality of kinds of the processing blades of the blade group are formed on the reception member, and the processing blade attached to the processor is positioned so as to be in a position where the blade edge is engageable with the reception portion of the corresponding kind.

A method for operating a processing system, in which product units of different formats are processed. The processing system contains a plurality of processing devices that are arranged one after the other in a processing line. In the event of a format changeover, certain component arrangements arranged in the processing system must be adapted to the new product format. In the event of an upcoming format change, a gap in the conveyed goods is generated while the conveying operation is maintained, wherein the gap in the conveyed goods runs through the processing system along the processing devices. As soon as the gap in the conveyed goods runs through a component arrangement to be adapted to the new format, the format is changed over at the component arrangement while the gap in the conveyed goods runs through the component arrangement.

An apparatus and method are provided, for alternatively producing either small or bulk packs of napkins from a stack of folded napkins produced by one folding machine, through use of a pack dispatching arrangement having an inlet, a small pack transfer station and a bulk pack transfer station, and configured for operation in a small pack mode for dispatching a stream of spaced apart small packs of folded sheets separated from the stack of folded sheets, and received at an inlet of the pack dispatching arrangement, to the small pack transfer station, and alternatively operable in a bulk pack mode for dispatching a stream of spaced apart bulk packs of folded sheets separated from the stack of folded sheets, and received at an inlet of the pack dispatching arrangement, to the bulk pack transfer station.

A sheet handling apparatus includes a sheet folding unit configured to perform folding on a sheet; and a sheet stacking unit configured to stack the folded sheet on a sheet stacking surface having an inclined surface and a horizontal surface in order from upstream to downstream in a sheet conveying direction. A downstream end of the inclined surface is higher than an upstream end of the inclined surface with respect to a horizontal plane. The sheet handling apparatus also includes a discharging unit configured to discharge the folded sheet to the sheet stacking unit; a sheet conveying unit configured to convey the discharged sheet from the inclined surface to the horizontal surface; and a conveying force applying unit configured to apply a conveying force to the sheet in contact with an upper surface of the sheet from above the inclined surface.

A supply device (10) for a machine for transversely cutting two strips (11 and 12) of a flexible material, in particular a strip of paper, moving continuously, to produce separate stacks of documents cut transversely according to predetermined formats. The device comprises lower and upper driving mechanisms (13, 14) associated with the two strips (11, 12) of flexible material respectively, which each include a mechanically rotated first roller (13a, 14a) and a freely rotatable second bearing roller (13b and 14b). The driving mechanism is mounted on a frame (15) supported by a movable platform (16) which is rigidly connected to a linear actuator (17) arranged to be moved transversely with respect to the direction of movement of the strips (11 and 12). Optical reading cells (11a, 11b, 12a, 12b) define the operating modes of the driving servomotors (13b and 14b) and of the linear actuator (17).

A method for operating a thread stitching machine for processing printed sheets to form book blocks includes providing at least one sewing station with an active connection to at least one stitching saddle and providing the at least one stitching saddle with an active connection to at least one transporting system. The printed sheets are supplied to the at least one stitching saddle, using the at least one transporting system, in at least one of a substantially vertical and a substantially horizontal plane relative to the at least one stitching saddle. At least the printed sheets in the substantially vertical plane are supplied directly onto the at least one stitching saddle or to a region of the at least one stitching saddle. The printed sheets are supplied to the at least one sewing station resting astride the at least one stitching saddle.

A web product folding and stacking machine includes two folding line making rolls, two folding fingers, a first carrier unit, a stoppage unit and a holder. The folding line making rolls and the folding fingers are operated to fold up web products on the first carrier unit to form a stack of interfolded web products. Further, there is at least one suction device arranged on the top surface of the first carrier unit to suck the web products nearing the top surface of the first carrier unit and facilitate accurate stacking of the interfolded web products.

When information about weight of a sheet indicates weight less than a predetermined weight, a sheet stacking apparatus configured to align sheets to be stacked on a stacking tray discharges the sheet onto the stacking tray while overlapping the sheet with another sheet by an overlapping unit, and, when the information about the weight of the sheet indicates weight not less than the predetermined weight, the sheet stacking apparatus discharges the sheet onto the stacking tray without overlapping the sheet with another sheet by the overlapping unit.

A puncher cylinder includes a puncher knife, the cylinder being arranged for cooperation with a paper web such that the cylinder when in use can be rolled longitudinally along and in contact with the paper web, punching holes in the paper web by way of the puncher knife. The holes are punched a longitudinal distance from each other essentially corresponding to the circumference of the cylinder. A system is further disclosed including the punching cylinder, as is a method utilizing the punching cylinder, and a newspaper partly produced by way of the punching cylinder.

A multi-function binding machine is proposed. The multi-function binding machine (700) comprises a binding station (135) for binding blocks of signatures (105), and a feeding station (115) for receiving signatures in succession, opening the signatures, and feeding the signatures to the binding station; in the solution according to an embodiment of the invention, the multi-function binding machine further comprises a further feeding station (715) for receiving pre-signatures in successions, folding groups of at least one pre-signature into further signatures (729), and feeding the further signatures to the binding station.

The stack package includes a first semiconductor package and a second semiconductor package. The first semiconductor package includes a first substrate having a first modulus and at least one semiconductor chip mounted on the first substrate. The second semiconductor package stacked on the first semiconductor package and includes a second substrate having a second modulus and at least one semiconductor chip mounted on the second substrate. The second modulus is less than the first modulus. Even in the event that the first semiconductor package is under severe warpage due to a temperature change, the flexible second substrate, which includes e.g., polyimide or poly ethylene terephthalate, of the second semiconductor package may be less sensitive to the temperature change, thereby improving reliability of the stack package.

A land grid array (LGA) package including a substrate having a plurality of lands formed on a first surface of the substrate, a semiconductor chip mounted on a second surface of the substrate, a connection portion connecting the semiconductor chip and the substrate, and a support layer formed on part of a surface of a first land.

An apparatus including a die including a dielectric material on a device side, an insulating layer surrounding a die area and embedding a thickness dimension of the die; and a carrier including a plurality of layers of conductive material disposed on the device side of the die, a first one of the layers of conductive materials being formed on the insulating layer and patterned into traces at least a portion of which are connected to respective contact points on the die. A method including disposing a die on a sacrificial substrate with a device side of the die opposite the sacrificial substrate; disposing a mold on the sacrificial substrate around; introducing an insulating material into a chase of the mold; removing the mold; forming a carrier on the insulating material adjacent a device side of a die; and separating the die and the carrier from the sacrificial substrate.

A through silicon via with sidewall roughness and methods of manufacturing the same are disclosed. The method includes forming a via in a substrate and roughening a sidewall of the via by depositing material within the via. The method further includes removing a backside of the substrate to form a through via with a roughened sidewall structure.

Disclosed herein is a single mask package apparatus on a device comprising a first substrate having a land disposed on a first surface, a stud disposed on the land and a protective layer disposed over the first surface of the first substrate and around the stud. The protective layer may optionally have a thickness of at least 3 μm. A PPI may be disposed over the protective layer and in electrical contact with the stud, with a first portion of the PPI extending laterally from the stud. An interconnect may be disposed on and in electrical contact with the first portion of the PPI, and a second substrate mounted on the interconnect. A molding compound may be disposed over the PPI and around the interconnect. The stud may be a substantially solid material having a cylindrical cross section and may optionally be wirebonded to the land.

A multi-chip package is provided. The multi-chip package includes a plurality of chips including at least one bad chip and at least one good chip that are stacked and a plurality of through electrodes each penetrating the chips. A logic circuit included in the at least one bad chip is isolated from each of the plurality of through electrodes.

A bump-on-trace (BOT) structure is described. The BOT structure includes a first work piece with a metal trace on a surface of the first work piece, wherein the metal trace has a first axis. The BOT structure further includes a second work piece with an elongated metal bump, wherein the elongated metal bump has a second axis, wherein the second axis is at a non-zero angle from the first axis. The BOT structure further includes a metal bump, wherein the metal bump electrically connects the metal trace and the elongated metal bump. A package having a BOT structure and a method of forming the BOT structure are also described.

In various embodiments, a chip arrangement is provided. The chip arrangement may include a chip carrier and a chip mounted on the chip carrier. The chip may include at least two chip contacts and an insulating adhesive between the chip and the chip carrier to adhere the chip to the chip carrier. The at least two chip contacts may be electrically coupled to the chip carrier.

Systems, manufactures, methods and/or techniques for a merged fiducial for chip packages are described. According to some embodiments, an integrated circuit package may include a package substrate having a first side and a second side, a plurality of conductive traces coupled to the first side and a plurality of balls disposed on the second side. The balls may be adapted to electrically connect the laminate package to a circuit board. The integrated circuit package may include a plurality of ball pads disposed on the second side, the ball pads being adapted to electrically connect the plurality of balls to the plurality of conductive traces. One or more of the ball pads may be uniquely shaped when compared to the rest of the plurality of ball pads, optionally, to serve as a fiducial to designate an A1 pin or ball of the laminate package.

In manufacturing an LSI, or semiconductor integrated circuit device, the step of assembling device (such as resin sealing step) is normally followed by a voltage-application test in an environment of high temperature (e.g., from 85 to 130° C.) and high humidity (e.g., about 80% RH). It has been found that separation of a titanium nitride anti-reflection film from an upper film and generation of cracks in the titanium nitride film at an upper surface edge part of the aluminum-based bonding pad applied with a positive voltage in the test is caused by an electrochemical reaction due to moisture incoming through the sealing resin and the like to generate oxidation and bulging of the titanium nitride film. These problems are addressed by removing the titanium nitride film over the pad in a ring or slit shape at peripheral area of the aluminum-based bonding pad.

A larger substrate can be used, and a transistor having a desirably high field-effect mobility can be manufactured through formation of an oxide semiconductor layer having a high degree of crystallinity, whereby a large-sized display device, a high-performance semiconductor device, or the like can be put into practical use. A first multi-component oxide semiconductor layer is formed over a substrate and a single-component oxide semiconductor layer is formed thereover; then, crystal growth is carried out from a surface to an inside by performing heat treatment at 500° C. to 1000° C. inclusive, preferably 550° C. to 750° C. inclusive so that a first multi-component oxide semiconductor layer including single crystal regions and a single-component oxide semiconductor layer including single crystal regions are formed; and a second multi-component oxide semiconductor layer including single crystal regions is stacked over the single-component oxide semiconductor layer including single crystal regions.

A method for manufacturing a light-emitting device includes a step of forming an etching resistant protection layer on a substrate provided with an organic planarizing layer, a step of forming a plurality of electrodes on the etching resistant protection layer, a step of forming an organic compound layer on the substrate provided with the plurality of electrodes, a step of forming a resist layer on the organic compound layer formed on parts of electrodes among the plurality of electrodes using a photolithographic method, and a step of removing the organic compound layer in a region not covered with the resist layer by dry etching, wherein an entire surface of the organic planarizing layer on the substrate on which steps up to the step of forming the plurality of electrodes have been performed is covered with at least one of the etching resistant protection layer and the electrode.

An object of an embodiment of the present invention to be disclosed is to prevent oxygen from being taken in a single crystal semiconductor layer in laser irradiation even when crystallinity of the single crystal semiconductor layer is repaired by irradiation with a laser beam; and to make substantially equal or reduce an oxygen concentration in the semiconductor layer after the laser irradiation comparing before the laser irradiation. A single crystal semiconductor layer which is provided over a base substrate by bonding is irradiated with a laser beam, whereby the crystallinity of the single crystal semiconductor layer is repaired. The laser irradiation is performed under a reducing atmosphere or an inert atmosphere.

A first impurity region is formed by ion implantation through a first opening formed in a mask layer. By depositing a spacer layer on an etching stop layer on which the mask layer has been provided, a mask portion having the mask layer and the spacer layer is formed. By anisotropically etching the spacer layer, a second opening surrounded by a second sidewall is formed in the mask portion. A second impurity region is formed by ion implantation through the second opening. An angle of the second sidewall with respect to a surface is 90°±10° across a height as great as a second depth. Thus, accuracy in extension of an impurity region can be enhanced.

A method of making a microelectronic package includes forming a dielectric encapsulation layer on an in-process unit having a substrate having a first surface and a second surface remote therefrom. A microelectronic element is mounted to the first surface of the substrate, and a plurality of conductive elements exposed at the first surface, at least some of which are electrically connected to the microelectronic element. Wire bonds have bases joined to the conductive elements and end surfaces remote from the bases and define an edge surface extending away between the base and the end surface. The encapsulation layer is formed to at least partially cover the first surface and portions of the wire bonds with unencapsulated portions of the wire bonds being defined by at least one of the end surface or a portion of the edge surface that is uncovered thereby.

Embodiments of a method for fabricating stacked microelectronic packages are provided, as are embodiments of a stacked microelectronic package. In one embodiment, the method includes arranging microelectronic device panels in a panel stack. Each microelectronic device panel includes a plurality of microelectronic devices and a plurality of package edge conductors extending therefrom. Trenches are formed in the panel stack exposing the plurality of package edge conductors. An electrically-conductive material is deposited into the trenches and contacts the plurality of package edge conductors exposed therethrough. The panel stack is then separated into partially-completed stacked microelectronic packages. For at least one of the partially-completed stacked microelectronic packages, selected portions of the electrically-conductive material are removed to define a plurality of patterned sidewall conductors interconnecting the microelectronic devices included within the stacked microelectronic package.

It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.

Methods for fabricating integrated circuits include fabricating a logic device on a substrate, forming an intermediate semiconductor substrate on a surface of the logic device, and fabricating a capacitor-less memory cell on the intermediate semiconductor substrate. Integrated circuits with capacitor-less memory cells formed on a surface of a logic device are also disclosed, as are multi-core microprocessors including such integrated circuits.

Disclosed is a semiconductor device including an oxide semiconductor film. A first oxide semiconductor film with a thickness of greater than or equal to 2 nm and less than or equal to 15 nm is formed over a gate insulating layer. First heat treatment is performed so that crystal growth from a surface of the first oxide semiconductor film to the inside thereof is caused, whereby a first crystal layer is formed. A second oxide semiconductor film with a thickness greater than that of the first oxide semiconductor film is formed over the first crystal layer. Second heat treatment is performed so that crystal growth from the first crystal layer to a surface of the second oxide semiconductor film is caused, whereby a second crystal layer is formed. Further, oxygen doping treatment is performed on the second crystal layer.

To provide a method by which a semiconductor device including a thin film transistor with excellent electric characteristics and high reliability is manufactured with a small number of steps. After a channel protective layer is formed over an oxide semiconductor film containing In, Ga, and Zn, a film having n-type conductivity and a conductive film are formed, and a resist mask is formed over the conductive film. The conductive film, the film having n-type conductivity, and the oxide semiconductor film containing In, Ga, and Zn are etched using the channel protective layer and gate insulating films as etching stoppers with the resist mask, so that source and drain electrode layers, a buffer layer, and a semiconductor layer are formed.

An object is to provide a thin film transistor and a method for manufacturing the thin film transistor including an oxide semiconductor with a controlled threshold voltage, high operation speed, a relatively easy manufacturing process, and sufficient reliability. An impurity having influence on carrier concentration in the oxide semiconductor layer, such as a hydrogen atom or a compound containing a hydrogen atom such as H2O, may be eliminated. An oxide insulating layer containing a large number of defects such as dangling bonds may be formed in contact with the oxide semiconductor layer, such that the impurity diffuses into the oxide insulating layer and the impurity concentration in the oxide semiconductor layer is reduced. The oxide semiconductor layer or the oxide insulating layer in contact with the oxide semiconductor layer may be formed in a deposition chamber which is evacuated with use of a cryopump whereby the impurity concentration is reduced.

A semiconductor device having favorable electric characteristics and a manufacturing method thereof are provided. A transistor includes an oxide semiconductor layer formed over an insulating layer, a source electrode layer and a drain electrode layer which overlap with part of the oxide semiconductor layer, a gate insulating layer in contact with part of the oxide semiconductor layer, and a gate electrode layer over the gate insulating layer. In the transistor, a buffer layer having n-type conductivity is formed between the source electrode layer and the oxide semiconductor layer and between the drain electrode layer and the oxide semiconductor layer. Thus, parasitic resistance is reduced, resulting in improvement of on-state characteristics of the transistor.

A highly reliable semiconductor device is manufactured by giving stable electric characteristics to a transistor in which an oxide semiconductor film is used for a channel. An oxide semiconductor film which can have a first crystal structure by heat treatment and an oxide semiconductor film which can have a second crystal structure by heat treatment are formed so as to be stacked, and then heat treatment is performed; accordingly, crystal growth occurs with the use of an oxide semiconductor film having the second crystal structure as a seed, so that an oxide semiconductor film having the first crystal structure is formed. An oxide semiconductor film formed in this manner is used for an active layer of the transistor.

A method for forming an amorphous semiconductor which contains an impurity element and has low resistivity and a method for manufacturing a semiconductor device with excellent electrical characteristics with high yield are provided. In the method for forming an amorphous semiconductor containing an impurity element, which utilizes a plasma CVD method, pulse-modulated discharge inception voltage is applied to electrodes under the pressure and electrode distance with which the minimum discharge inception voltage according to Paschen's Law can be obtained, whereby the amorphous semiconductor which contains an impurity element and has low resistivity is formed.

A sensor substrate includes a blocking pattern disposed on a base substrate, a first electrode disposed on the base substrate and overlapping the blocking pattern, the first electrode including a plurality of first unit parts arranged in a first direction, each of the first unit parts including a plurality of lines connected to each other in a mesh-type arrangement, a color filter layer disposed on the base substrate, a plurality of contact holes defined in the color filter layer and exposing the first unit parts, and a bridge line between and connected to first unit parts adjacent to each other in the first direction, through the contact holes.

An opposed substrate (9') comprises: a substrate (1); a static electricity protective electrode (2), a bridging electrode (4) and a touch induction electrode (6) comprising a plurality of sub-units sequentially formed on the substrate (1), wherein the distribution of the static electricity protective electrode (2) on the substrate (1) corresponds to dummy regions between sub-units, and the static electricity protective electrode (2), the bridging electrode (4) and the touch induction electrode (6) are insulated from each other. The opposed substrate (9') has a good touching effect. A method for manufacturing the opposed substrate, and a liquid crystal display touch panel are also disclosed.

In a semiconductor device, a first interlayer insulating layer made of an inorganic material and formed on inverse stagger type TFTs, a second interlayer insulating layer made of an organic material and formed on the first interlayer insulating layer, and a pixel electrode formed in contact with the second interlayer insulating layer are disposed on a substrate, and an input terminal portion that is electrically connected to a wiring of another substrate is provided on an end portion of the substrate. The input terminal portion includes a first layer made of the same material as that of the gate electrode and a second layer made of the same material as that of the pixel electrode. With this structure, the number of photomasks used in the photolithography method can be reduced to 5.

Provided is a back plate component having reflective sheet reinforcing structure. The back plate component includes: a frame, a reflective sheet and a plurality of supporting film sheets. The frame includes a plurality of lateral beams and vertical beams, and at least one hollow part is included between the lateral beams and the vertical beams. The reflective sheet is attached to the frame, and includes a reflective surface and a back surface corresponding to the reflective surface. A portion of the back surface covers the whole hollow part. The plurality of supporting film sheets is attached to the back surface at a region corresponding to the hollow part, and includes a material the same as that of the reflective sheet. A liquid crystal display device is further disclosed herein.