A shift register includes cascade-connected stages, each of which includes a data latch and an output stage. In at least one embodiment, the latch has a single data input which, in use, receives a date signal from a preceding or succeeding stage. The output stage includes a first switch, which passes a clock signal to the stage output when the output stage is activated by the latch. The output stage also comprises a second switch, which passes the lower supply voltage to the stage output when the output stage is inactive.

A display device including various portions, circuits and other arrangements for outputting various pulses and triggers, for controlling forward shift and backward shift operations.

A shift register circuit includes a first shift register string and a second shift register string. The first shift register string is configured to receive a first start signal and output a first-stage control signal. The second shift register string, electrically connected to the first shift register string, is configured to receive the first-stage control signal and a second start signal and output the first pulse of a first-stage scan signal according to the first-stage control signal and the second start signal and consequently output the second pulse of the first-stage scan signal according to the second start signal; wherein the first and second pulses are configured to have different pulse widths. A driving method of a shift register circuit is also provided.

To provide a pulse signal output circuit and a shift register which have lower power consumption, are not easily changed over time, and have a longer lifetime. A pulse signal output circuit includes a first input signal generation circuit; a second input signal generation circuit; an output circuit which includes a first transistor and a second transistor and outputs a pulse signal in response to a signal output from the first and second input signal generation circuits; a monitor circuit which obtains the threshold voltages of the first and second transistors; and a power supply output circuit which generates a power supply potential raised by a potential higher than or equal to a potential which is equal to or substantially equal to the threshold voltage and supplies the power supply potential to the first and second input signal generation circuits. A shift register includes the pulse signal output circuit.

Disclosed herein is a shift register circuit that is formed on an insulating substrate with thin film transistors having channels of the same conductivity type and includes shift stages, each of the shift stages including: a first thin film transistor; a second thin film transistor; a 3(1)-th thin film transistor; a 3(2)-th thin film transistor; a 4(1)-th thin film transistor; a 4(2)-th thin film transistor; a fifth thin film transistor; and a sixth thin film transistor.

An active level shift (ALS) driver circuit and a liquid crystal display apparatus including the ALS driver circuit are disclosed. The ALS driver circuit includes an input unit configured to apply a first polarity voltage to a first node and to apply a second polarity voltage to a second node, a level compensation unit configured to adjust the voltages of the first node and the second node, and an output unit configured to alternately output a first power voltage and a second power voltage according to the adjusted voltages of the first and second nodes.

A flip-flop includes: a first, second, third, and fourth transistors; input terminals; and first and second output terminals, the first and second transistors constituting a first CMOS circuit such that gate terminals are connected and drain terminals are connected, the third and fourth transistors constituting a second CMOS circuit such that gate terminals are connected and drain terminals are connected, the first output terminal connected to a gate side of the first CMOS circuit and a drain side of the second CMOS circuit, the second output terminal connected to a gate side of the second CMOS circuit and a drain side of the first CMOS circuit, at least one input transistor included in the group of the first through fourth transistors, a source terminal of the input transistor being connected to one of the input terminals. This can provide a further compact flip-flop.

An output thin film transistor threshold voltage offset compensation circuit, a GOA circuit, and a display. The circuit includes: a first capacitor, comprising a first electrode and a second electrode, the first electrode being connected to the gate of an output thin film transistor and receiving a charge signal, the second electrode being connected to the drain of the output thin film transistor, the first capacitor being used for, under the action of the charge signal, making the first electrode and the second electrode have a same voltage, so that a voltage difference between the drain and the source of the output thin film transistor is equal to a threshold voltage thereof; a first switch unit, connected to the drain and the source of the output thin film transistor, and opening under the action of a first clock signal, so that a voltage difference between the gate and the source of the output thin film transistor is equal to the threshold voltage thereof.

One of the most important RF building blocks today is the frequency synthesizer, or more particularly the programmable frequency divider (divider). Such dividers preferably would support unlimited range with continuous division without incorrect divisions or loss of PLL lock. The inventors present multi-modulus dividers (MMDs) providing extended division range against the prior art and without incorrect divisions as the division ratio is switched back and forth across the boundary between two different ranges. Accordingly, the inventors present MMD frequency dividers without the drawbacks within the prior art.

A shift register unit comprises: a first transistor, a pulling-up close unit, a pulling-up start unit, a first pulling-up unit, a second pulling-up unit, a trigger unit, and an output unit. A shift register circuit, an array substrate and a display device are also provided. The shift register unit, the shift register circuit, the array substrate and the display device can reduce drift of a gate threshold voltage of a gate line driving transistor and improve operation stability of devices.

An LCD and a bidirectional shift register device thereof are provided. The bidirectional shift register device of the invention is disposed on the substrate of the panel and includes multi-stages shift registers in series connection. Each stage shift register includes a pre-charging unit, a pull-up unit and a pull-down unit, in which the pre-charging unit receives a first preset clock signal and the output from a (i−1)th stage shift register or a (i+1)th stage shift register so as to thereby output a charging signal. The pull-up unit receives the charging signal and a second preset clock signal so as to thereby output a scan signal. The pull-down unit receives the second preset clock signal, a third preset clock signal and the output from the (i+2)th stage shift register or the (i−2)th stage shift register so as to decide whether or not pulling down the scan signal to a reference level.

A system for optimizing storage in an enclosed transport trailer (6), having transverse bearing beams (2) for supporting a load such as loaded pallets (12, 13) at a mid height of the trailer such that two storage levels are available. The beams have a wheel (10) at each end that runs in a horizontal track (11) attached to each side wall of the trailer, the track enclosing the wheels to prevent them from disengaging from the track. Adjacent beams can be attached together at variable spacings using a spacer bar (15) to suit a particular pallet or load size. The track has a junction adjacent the open end (20) of the trailer that leads up to another track (18) immediately below the roof line where the beams can be moved to an out of the way storage position (19) when not required.

Solutions for minimizing the impact of servicing a turbo machine are disclosed. In one embodiment, an apparatus for conveying a turbo machine component can include: a motive system for moving the apparatus along a surface; a platform system operably connected to the motive system, the platform system for supporting the component of the turbo machine, the platform system can include: a first portion fixed to the motive system; and a second portion moveably coupled to the first portion, the second portion for modifying a position of the turbo machine component; and a control system operably connected to the platform system, the control system for controlling at least one of a rate of movement or a direction of the second portion of the platform system.

A vehicle restraint system includes a strap assembly configured to be positioned on a portion of a tire of a vehicle to secure the vehicle to a deck of a transport. The strap assembly is also configured to be coupled to the deck of the transport on a first side of the tire of the vehicle. The system also includes a mandrel assembly operable to be coupled to the strap assembly on a second side of the tire of the vehicle, opposite the first side. The system further includes a winch assembly configured to be coupled to the deck of the transport and the mandrel assembly on the second side of the tire of the vehicle, the winch assembly configured to rotate the mandrel assembly to produce a tightening force to tighten the strap assembly around the portion of the tire. The system still further includes a release mechanism disposed between the winch assembly and the mandrel assembly and configured to create a coupling between the winch assembly and the mandrel assembly in a manner that transmits the tightening force from the winch assembly to the mandrel assembly. The release mechanism is configured to release the coupling between the winch assembly and the mandrel assembly when a force greater than or equal to a predetermined force is produced against the release mechanism.

A vehicle restraint system for an auto-rack railroad car which includes an active chock and an anchor chock configured to co-act to secure a vehicle in the auto-rack railroad car. In various embodiments, each chock has a chock body including a substantially diamond shaped elongated tube which includes four integrally connected elongated walls. In various embodiments, for each chock, various components of that chock extend substantially along longitudinal axis that lie in the same or substantially the same vertical plane as the apex and trough of the substantially diamond shaped elongated tube of the chock body. The active and anchor chocks: (a) have a lower height than known commercially available vehicle restraints; (b) have a smaller width than known commercially available vehicle restraints; (c) position the strap and the torque tube closer to the tire of the wheel than any known commercially available vehicle restraints; (d) take up a smaller area of each safe zone adjacent to the wheel than known commercially available vehicle restraints; (e) provide a greater strength to size ratio than known commercially available vehicle restraints; and (f) are easy to operate, install, and remove.

There is provided a transport vehicle for transporting wind power installation rotor blades and/or pylon segments. The transport vehicle has a transport support structure having a main frame, a receiving frame fixedly connected to the main frame at a first angle, and a rotary displacement unit which is fixed with one end to the receiving frame and which at its second end has a blade adaptor for receiving a rotor blade or a pylon segment. The main frame spans a main plane. The rotary displacement unit has at least one first rotary mounting, wherein there is provided a second angle between the second rotary plane of the second rotary mounting.

Some embodiments include a novel laced strapping system that provides a plurality of attachment points by which a tie-down lace can adjust the fit of a cargo mesh webbing to secure loads of items in an open bed of a vehicle. In some embodiments, the vehicle is a pick-up truck with a cargo bed. In some embodiments, the mesh webbing comprises a first truck bed mesh, a second truck bed mesh, and the plurality of attachment points. In some embodiments, tie-down lace interconnects the attachment points to secure together the first mesh and the second mesh.

A vehicle load securing apparatus comprising a frame including opposite side walls and an end wall extending between the side walls, with the frame having open sides positioned in opposition to each other. A spool is rotatably mounted on the frame and includes a rotating shaft, and a length of an elongate member at least partially wrapped about the spool with a hook mounted thereon. A ratcheting structure may control rotation of the spool with engaged position in which the ratcheting structure resists rotation of the spool in an unwind direction and a disengaged position in which the ratcheting structure permits rotation of the spool in the unwind direction. The shaft may have a first end portion extending through one of the side walls of the frame, and a section of the first end portion having a substantially hexagonal cross-sectional shape for engagement by a tool.

A vehicle wheel chock for a vehicle restraint system for an auto-rack railroad car which secures a vehicle in the auto-rack railroad car. The vehicle wheel chock is configured to be positioned on a grating adjacent to a tire of the vehicle.

Techniques for resolving a metastable state in a synchronizer are described herein. In one embodiment, a circuit for resolving a metastable state in a synchronizer comprises a signal delay circuit coupled to a node of the synchronizer, wherein the signal delay circuit is configured to delay a data signal at the node to produce a delayed data signal, and a transmission circuit coupled to the signal delay circuit, wherein the transmission circuit is configured to couple the delayed data signal to the node after a delay from a first edge of a clock signal.

Magnetoelectronic (ME) logic circuits and methods of operating the same are disclosed. Microsystems of different circuits made from different types of ME devices can be constructed and employed in applications such as sensors, smart dust, etc.

A floorplan for a Structured ASIC chip is shown having a core region containing memory and VCLB logic cells surrounded by a plurality of IO connection fabrics that include a first IO connection fabric comprising IO sub-banks connecting the core of the chip to pins for external signals to the core, a first high-speed routing fabric disposed along the east-west vertical top of the core and connects the core to high-speed IO such as SerDes; a network-aware connection fabric connects the core to a microcontroller primarily for testing and repair of the memory in the core; and a second-high speed routing fabric is disposed on the north-south vertical sides of the core and communicates with the IO sub-banks. The VCLB Structured ASIC chip is manufactured on a 28 nm CMOS process lithographic node or smaller, having several metal layers and preferably is programmed on a single via layer.

There is provided a multi power supply type level shifter. The provided multi power supply type level shifter includes a first level shifter and a second level shifter in a two-stage architecture so as to selectively receive first to third power supplies and change a signal level, even when the first to third power supplies are applied in a different sequence from a normal power-on sequence. Output voltages are output without a change in level, and short-circuit currents are not generated in the first and second level shifters.

A multi-chip package may include first and second integrated circuit dies that are each partitioned into multiple logic regions. The logic regions of the first and second dies may be coupled via interconnects. Each integrated circuit die may include at least one spare logic region. Multiple logic groups may be formed with each logic group including logic regions from the first and second integrated circuit dies and the interconnects that couple those logic regions. The logic groups may be evaluated to identify defective logic groups. In response to identifying a defective logic group, the defective logic group may be repaired by configuring the first and second integrated circuit dies to stop using the defective logic group and to use a spare logic group. The spare logic group may include spare logic regions of the first and second dies that are coupled by spare logic region interconnects.

A level shifter, or method, producing a final output from a driver supplied by a high-side source driver providing VDD or common, and a low-side source driver providing common or VSS. A delay is introduced to prevent a source driver output at common from beginning to transition toward a supply rail until a delaying source driver at a rail begins transitioning toward common. The level shifter may be single-ended or differential, and the delaying source driver may be coupled to the same final output driver as is the delayed source driver, or may be coupled to a different final output driver. The level shifter may have a second level shifter front end stage, which may have high-side and low-side intermediate source driver outputs coupled by a capacitor, and/or may couple one of the supplies to all intermediate source drivers via a common impedance or current limit Zs.

There is provided a level shift circuit free from malfunction. The level shift circuit converts a signal of a first power supply voltage of a first supply terminal, which is supplied to an input terminal, into a signal of a second power supply voltage of a second supply terminal and outputs the converted signal to an output terminal. The level shift circuit has a control circuit that detects when the first power supply voltage reduces below a predetermined voltage. The voltage of the output terminal of the level shift circuit is fixed to the second power supply voltage or a ground voltage according to a detection signal of the control circuit.

A system and method are disclosed for level shifting a DDC bus with a low voltage loss. A pull up circuit includes an NMOS transistor, a PMOS transistor and resistor. An NMOS pull up gate is also included in line with the DDC bus. When powered, the level shifter adjusts the voltage of transmitted signals to match the voltage of a receiving device. The resulting adjusted is slightly lower due to a threshold voltage lost across one or more transistors. Additionally, when unpowered, the level shifter releases the signal transmission line. Unadjusted signals can then be transmitted without consumption of power by the level shifter.

A transceiver includes a transmitter and receiver that form a series current path between two power-supply nodes. Powering both the transmitter and receiver with the same supply current saves power. The transmitter functions as a resistive load for the receiver, and thus performs useful work with power that would otherwise be dissipated as waste heat.

The disclosure relates generally to triple-redundant sequential state (TRSS) machines formed as integrated circuits on a semiconductor substrate, such as CMOS, and computerized methods and systems of designing the triple-redundant sequential state machines. Of particular focus in this disclosure are sequential state elements (SSEs) used to sample and hold bit states. The sampling and holding of bits states are synchronized by a clock signal thereby allowing for pipelining in the TRSS machines. In particular, the clock signal may oscillate between a first clock state and a second clock state to synchronize the operation of the SSE according to the timing provided by the clock states. The SSEs has a self-correcting mechanism to protect against radiation induced soft errors. The SSE may be provided in a pipeline circuit of a TRSS machine to receive and store a bit state of bit signal generated by combinational circuits within the pipeline circuit.

Systems and methods for switching impedance are provided. In some aspects, a system includes first and second impedance elements and an impedance switch module, which includes a third impedance element coupled between the first and second impedance elements and a switch parallel to the third impedance element. The switch is coupled between the first and second impedance elements, and is configured to switch between an open configuration and a closed configuration. An electrical path is completed between the first impedance element and the second impedance element via the first switch in the closed configuration. The electrical path is not completed in the open configuration. A total impedance of the first impedance element, the second impedance element, and the impedance switch module is varied based on the switching between the open configuration and the closed configuration.

A method, an apparatus, and a computer program product are provided. The apparatus tunes a frequency provided by a VCO. The apparatus determines a relative capacitance change associated with a first frequency and a desired frequency from a look-up table. The apparatus adjusts a capacitor circuit in the VCO based on the determined relative capacitance change determined from the look-up table in order to tune from the first frequency to the desired frequency. The apparatus determines that the frequency provided by the VCO is a second frequency different than the desired frequency after adjusting the capacitor circuit. The apparatus performs an iterative search to further adjust the capacitor circuit when a difference between the second frequency and the desired frequency is greater than a threshold.

The switching element is provided in a state of being electromagnetically coupled to the cavity resonator of the high frequency oscillator; the bias voltage applying terminal is connected to one electrode of the switching element; another electrode of the switching element is electrically connected to the cavity resonator (the anode shell in FIG. 1); the metal plate having a size enough for reflecting an electric wave to be transmitted before and after the switching element in a high-frequency manner is provided at any one end of the switching element; and by applying a bias voltage to the switching element and varying that, a reactance of the switching element is changed and a resonance frequency of the cavity resonator is varied. By this method, an oscillation frequency can be varied greatly relative to a small change in a bias voltage.

Arrays of resonator sensors include an active wafer array comprising a plurality of active wafers, a first end cap array coupled to a first side of the active wafer array, and a second end cap array coupled to a second side of the active wafer array. Thickness shear mode resonator sensors may include an active wafer coupled to a first end cap and a second end cap. Methods of forming a plurality of resonator sensors include forming a plurality of active wafer locations and separating the active wafer locations to form a plurality of discrete resonator sensors. Thickness shear mode resonator sensors may be produced by such methods.

The invention provides a switching valve having a valve element which is movable in a housing, an actuating apparatus acting on the valve element in a first direction and a spring apparatus charging the valve element in a second direction. According to the invention, the first and second directions are in opposition and the spring apparatus has a progressive spring characteristic.

A butterfly valve including a valve body having a passage, a valve shaft assembly, a valve plate, and a tube that is friction fit inside the passage is provided. The valve shaft assembly includes a first shaft portion and a second shaft portion. The first and second shaft portions are in opposing spaced relation with the valve plate disposed therebetween. The valve plate has a flange such that when the butterfly valve is in the closed position a seal is formed with the tube, which is disposed within the fluid flow passage. The valve plate has lip extending from a portion of the valve plate that is radially outward from the circumference of the tube. The lip acts to reduce flow induced torque experienced while the valve plate is actuated from the closed to the open position.

A drain plug assembly that has particular application for sealing a drain hole in a high voltage battery compartment on a vehicle. The plug assembly includes a plug that inserted into the drain hole. The plug assembly further includes a return spring coupled to the plug and causing the plug to be biased into the drain hole. The plug assembly also includes at least one shape memory alloy device coupled to the plug and a support structure. The SMA device receives an electrical current that causes the device to contract and move the plug out of the drain hole against the bias of the return spring.

A solenoid valve, the magnet armature of which is designed to be movable relative to a first valve-closing element, for which purpose the first valve-closing element is accommodated telescopically in a coupling element attached to the magnet armature, wherein the coupling element is guided along the inner wall of a guide sleeve inserted in the valve housing in order to align the magnet armature precisely with the first valve-closing element in the direction of a second valve-closing element which is likewise accommodated in the guide sleeve.

According to one embodiment, a sheet finishing apparatus includes a finishing section configured to apply finishing to a sheet placed on a processing tray, a sheet discharging section configured to discharge the sheet subjected to the finishing to a stack tray via a discharge port, a roller attached to a shaft provided in parallel to the discharge port and which rotate in a first direction for guiding the sheet in the direction of the finishing section and a second direction for discharging the sheet, and an arm attached to the shaft to extend in the centrifuging direction from the shaft, rotate with the torque of the shaft, and idly rotate when force for regulating the torque acts. The arm flaps down the trailing end of the sheet on the stack tray onto the stack tray.

In a processing machine including a processor having a processing blade and a receiver having a reception member and in which a blade edge of the processing blade and a reception portion, of the reception member, engage with each other to process a paper sheet therebetween, the processing blade is one processing blade selected from a blade group and is attached to the processor so as to be changeable to another processing blade of the blade group, reception portions of kinds corresponding to a plurality of kinds of the processing blades of the blade group are formed on the reception member, and the processing blade attached to the processor is positioned so as to be in a position where the blade edge is engageable with the reception portion of the corresponding kind.

A method for operating a processing system, in which product units of different formats are processed. The processing system contains a plurality of processing devices that are arranged one after the other in a processing line. In the event of a format changeover, certain component arrangements arranged in the processing system must be adapted to the new product format. In the event of an upcoming format change, a gap in the conveyed goods is generated while the conveying operation is maintained, wherein the gap in the conveyed goods runs through the processing system along the processing devices. As soon as the gap in the conveyed goods runs through a component arrangement to be adapted to the new format, the format is changed over at the component arrangement while the gap in the conveyed goods runs through the component arrangement.

A supply device (10) for a machine for transversely cutting two strips (11 and 12) of a flexible material, in particular a strip of paper, moving continuously, to produce separate stacks of documents cut transversely according to predetermined formats. The device comprises lower and upper driving mechanisms (13, 14) associated with the two strips (11, 12) of flexible material respectively, which each include a mechanically rotated first roller (13a, 14a) and a freely rotatable second bearing roller (13b and 14b). The driving mechanism is mounted on a frame (15) supported by a movable platform (16) which is rigidly connected to a linear actuator (17) arranged to be moved transversely with respect to the direction of movement of the strips (11 and 12). Optical reading cells (11a, 11b, 12a, 12b) define the operating modes of the driving servomotors (13b and 14b) and of the linear actuator (17).

A method for operating a thread stitching machine for processing printed sheets to form book blocks includes providing at least one sewing station with an active connection to at least one stitching saddle and providing the at least one stitching saddle with an active connection to at least one transporting system. The printed sheets are supplied to the at least one stitching saddle, using the at least one transporting system, in at least one of a substantially vertical and a substantially horizontal plane relative to the at least one stitching saddle. At least the printed sheets in the substantially vertical plane are supplied directly onto the at least one stitching saddle or to a region of the at least one stitching saddle. The printed sheets are supplied to the at least one sewing station resting astride the at least one stitching saddle.

In the invention, for a first sheet, regardless of the sheet size (width), a lateral registration detector is moved in a direction towards an edge face of the sheet from a home position to detect the edge face of the sheet. With lateral deviation in the sheet position corrected, punching is performed by a puncher. For the second and subsequent sheets, the lateral registration detector is moved in advance to near the edge face of the sheet with reference to the detected position of the sheet edge of the first sheet, and the edge face is detected at a given timing. With lateral deviation in the sheet position corrected, punching is performed by the puncher.

A web product folding and stacking machine includes two folding line making rolls, two folding fingers, a first carrier unit, a stoppage unit and a holder. The folding line making rolls and the folding fingers are operated to fold up web products on the first carrier unit to form a stack of interfolded web products. Further, there is at least one suction device arranged on the top surface of the first carrier unit to suck the web products nearing the top surface of the first carrier unit and facilitate accurate stacking of the interfolded web products.

A puncher cylinder includes a puncher knife, the cylinder being arranged for cooperation with a paper web such that the cylinder when in use can be rolled longitudinally along and in contact with the paper web, punching holes in the paper web by way of the puncher knife. The holes are punched a longitudinal distance from each other essentially corresponding to the circumference of the cylinder. A system is further disclosed including the punching cylinder, as is a method utilizing the punching cylinder, and a newspaper partly produced by way of the punching cylinder.

A multi-function binding machine is proposed. The multi-function binding machine (700) comprises a binding station (135) for binding blocks of signatures (105), and a feeding station (115) for receiving signatures in succession, opening the signatures, and feeding the signatures to the binding station; in the solution according to an embodiment of the invention, the multi-function binding machine further comprises a further feeding station (715) for receiving pre-signatures in successions, folding groups of at least one pre-signature into further signatures (729), and feeding the further signatures to the binding station.

Maskless hybrid laser scribing and plasma etching wafer dicing processes are described. In an example, a method of dicing a semiconductor wafer having a front surface with a plurality of integrated circuits thereon and having a passivation layer disposed between and covering metal pillar/solder bump pairs of the integrated circuits involves laser scribing, without the use of a mask layer, the passivation layer to provide scribe lines exposing the semiconductor wafer. The method also involves plasma etching the semiconductor wafer through the scribe lines to singulate the integrated circuits, wherein the passivation layer protects the integrated circuits during at least a portion of the plasma etching. The method also involves thinning the passivation layer to partially expose the metal pillar/solder bump pairs of the integrated circuits.

A multi-chip package is provided. The multi-chip package includes a plurality of chips including at least one bad chip and at least one good chip that are stacked and a plurality of through electrodes each penetrating the chips. A logic circuit included in the at least one bad chip is isolated from each of the plurality of through electrodes.

In various embodiments, a chip arrangement is provided. The chip arrangement may include a chip carrier and a chip mounted on the chip carrier. The chip may include at least two chip contacts and an insulating adhesive between the chip and the chip carrier to adhere the chip to the chip carrier. The at least two chip contacts may be electrically coupled to the chip carrier.

Systems, manufactures, methods and/or techniques for a merged fiducial for chip packages are described. According to some embodiments, an integrated circuit package may include a package substrate having a first side and a second side, a plurality of conductive traces coupled to the first side and a plurality of balls disposed on the second side. The balls may be adapted to electrically connect the laminate package to a circuit board. The integrated circuit package may include a plurality of ball pads disposed on the second side, the ball pads being adapted to electrically connect the plurality of balls to the plurality of conductive traces. One or more of the ball pads may be uniquely shaped when compared to the rest of the plurality of ball pads, optionally, to serve as a fiducial to designate an A1 pin or ball of the laminate package.