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Epoxy resin composition for encapsulating semiconductor, semiconductor device, and mold releasing agent

Disclosed is an epoxy resin composition used for encapsulation of a semiconductor containing an epoxy resin (A), a curing agent (B), an inorganic filler (C) and a mold releasing agent, in which the mold releasing agent contains a compound (D) having a copolymer of an α-olefin having 28 to 60 carbon atoms and a maleic anhydride esterified with a long chain aliphatic alcohol having 10 to 25 carbon atoms.




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Adhesive composition

An adhesive composition includes a first part comprising about 15 to about 60 wt % of an epoxy compound, about 35 to about 80 wt % of an epoxy novolac, and about 5 to about 25 wt % of an epoxy-based reactive diluent based on the total weight of epoxy compound, epoxy novolac, and reactive diluent; and a second part comprising less than about 20 wt % of a hydroxyaromatic solvent, about 80 to about 99 wt % of a Mannich base, and about 1 to about 20 wt % of a tertiary amine, based on the total weight of hydroxyaromatic solvent, Mannich base, and tertiary amine, the first and second parts being present in a volume ratio of about 0.8:1 to about 1.2:1. Additives to further enhance the properties may be included. A method of forming an adhesive layer includes applying the adhesive composition to a surface.




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Phosphorylcholine-based amphiphilic silicones for medical applications

Amphiphilic biomimetic phosphorylcholine-containing silicone compounds for use in both topical and internal applications as components in biomedical devices. The silicone compounds, which include zwitterionic phosphorylcholine groups, may be polymerizable or non-polymerizable. Specific examples of applications include use as active functional components in ophthalmic lenses, ophthalmic lens care solutions, liquid bandages, wound dressings, and lubricious and anti-thrombogenic coatings.




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Method and device for detecting logic interface incompatibilities of equipment items of on-board systems

The invention in particular has as an object detecting incompatibility between equipment items of a on-board system. A logic interface associated with one equipment item comprises at least one input while a logic interface associated with another equipment item comprises at least one output. The input and the output are connected. After a minimal data definition level associated with the input and a data definition level associated with the output have been obtained (505), the said minimal data definition level associated with the input is compared (515) with the said data definition level associated with the output. Following this comparison, if the said minimal data definition level associated with the input is lower than the said data definition level associated with the output, an alarm indicating an incompatibility of these two equipment items is generated (545).




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Introspection of software program components and conditional generation of memory dump

An approach for introspection of a software component and generation of a conditional memory dump, a computing device executing an introspection program with respect to the software component is provided. An introspection system comprises one or more conditions for generating the conditional memory dump based on operations of the software component. In one aspect, a computing device detects, through an introspection program, whether the one or more conditions are satisfied by the software component based on information in an introspection analyzer of the introspection program. In addition, the computing device indicates, through the introspection program, if the one or more conditions are satisfied by the software component. In another aspect, responsive to the indication, the computing device generates the conditional memory dump through the introspection program.




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Avoiding processing flaws in a computer processor triggered by a predetermined sequence of hardware events

A system, method and computer program product for avoiding a processing flaw in a computer processor triggered by a predetermined sequence of hardware events. The system may include a detecting unit and a power-on reset unit. The detecting unit detects that the predetermined sequence of hardware events is going to occur at the computer processor. The power-on reset unit initializes the computer processor to a state stored in computer memory in response to detecting the sequence of hardware events.




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Securing crash dump files

In a computer storage system, crash dump files are secured without power fencing in a cluster of a plurality of nodes connected to a storage system. Upon an occurrence of a panic of a crashing node and prior to receiving a panic message of the crashing node by a surviving node loading, in the cluster, a capturing node to become active, prior to a totem token being declared lost by the surviving node, for capturing the crash dump files of the crashing node, while manipulating the surviving node to continue to operate under the assumption the power fencing was performed on the crashing node.




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Preventing disturbance induced failure in a computer system

A method to prevent failure on a server computer due to internally and/or externally induced shock and/or vibration. The method includes acquiring, by at least one sensor, analog acceleration data of components in a server computer. The data is then converted to digital format and stored within a motor drive assembly processor memory unit. The processor analyzes the stored data for existence of machine degradation. In response to detecting the existence of machine degradation, the motor drive assembly processor initiates remediation procedures. The remediation procedures include controlling rotating speed of moving devices or performing a complete system shut down.




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Method for transmitting data from an infrastructure of a radio communication network to user devices, and devices for implementing the method

Within a radio communication network infrastructure transmitting data organized into a sequence of symbols to a receiving device over a plurality of radio links, data to be transmitted is encoded according to an error correction coding scheme in order to produce a set of systematic symbols and a set of corresponding redundancy symbols; the systematic symbols and a first subset of the corresponding redundancy symbols are transmitted, over a first radio link among said plurality of radio links, in broadcast mode, and a second subset of the corresponding redundancy symbols, distinct from the first one, is transmitted over a second radio link among said plurality of radio links.




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Techniques for reusing components of a logical operations functional block as an error correction code correction unit

A logical operations functional block for an execution unit of a processor includes a first input data link for a first operand and a second input data link for a second operand. The execution unit includes a register connected to an error correction code detection unit. The logical operations functional block includes a look-up table configured to receive an error correction code syndrome from the error correction code detection unit. The logical operations functional block also includes a multiplexer configured to receive an output signal from the look-up table at a first input and the first operand at a second input, wherein an output of the multiplexer is coupled to the first input data link of a logical functional unit.




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Computer and data saving method

It is provided a computer comprising a nonvolatile memory for storing data, a control processor for controlling the saving of data into the nonvolatile memory, and a battery for supplying power to the computer in case of a failure of an external power supply, wherein the control processor checks a charge amount stored in the battery, calculates an amount of data which can be saved in the nonvolatile memory by the battery in case of a failure of the external power supply based on the checked charge amount, and saves data excluding the amount of data that can be saved, out of data which should be saved into the nonvolatile memory, into the nonvolatile memory in advance.




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Polymeric composition for the neutralization of noxious agents

The present application is directed to a novel composition which acts as a barrier to noxious agents while adding self-detoxifying catalytic treatments to neutralize the noxious and harmful warfare agents when applied for example on a fabric, or other solid support.




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Cationically hardenable dental composition, process of production and use thereof

The invention relates to a hardenable dental composition comprising component (A) comprising a cationically hardenable compound, component (B) comprising an initiator being able to initiate the hardening reaction of the cationically hardenable compound, and component (C) comprising a filler, wherein the filler comprises a filler body and a filler surface, the filler surface comprising side groups with polar moieties. The invention also relates to a process of producing the dental composition, to the use of the dental composition as dental impression material and to a method of taking an impression of dental tissue.




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Method for temporary or permanent disposal of nuclear waste

A method of disposing nuclear waste in underground rock formations is presented. The method includes the steps of selecting a land area having a rock formation positioned there-below of a depth able to prevent radioactive material placed therein from reaching the surface and drilling a vertical wellbore from the surface, to a depth ranging between 5,000 feet and 25,000 feet, into the underground rock formation or repository. A plurality of horizontal laterals or horizontal wellbores, ranging in length from 500 feet to 40,000 feet, are drilled from the vertical wellbore into the underground rock formation or repository. Nuclear waste to be stored within these laterals is encapsulated in a special waste canister and these nuclear waste canisters are positioned within the horizontal laterals wherein they are sealed to prevent loss and leakage. Means are also provided by which these canisters are adapted to allow retrievability of the canisters from the wellbore at a later date and to return the waste to the surface for use after retrieval.




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Method for removing radioactive cesium, hydrophilic resin composition for removing radioactive cesium, method for removing radioactive iodine and radioactive cesium, and hydrophilic resin composition for removing radioactive iodine and radioactive cesium

The present invention intends to provide a method for removing radioactive cesium, or radioactive iodine and radioactive cesium that is simple and low-cost, further does not require an energy source such as electricity, moreover can take in and stably immobilize the removed radioactive substances within a solid, and can reduce the volume of radioactive waste as necessary, and to provide a hydrophilic resin composition using for the method for removing radioactive cesium, or radioactive iodine and radioactive cesium, and the object of the present invention is achieved by using a hydrophilic resin composition containing: at least one hydrophilic resin selected from the group consisting of a hydrophilic polyurethane resin, a hydrophilic polyurea resin, and a hydrophilic polyurethane-polyurea resin each having at least a hydrophilic segment; and a zeolite dispersed therein in a ratio of at least 1 to 200 mass parts relative to 100 mass parts of the hydrophilic resin.




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Method and composition for sequestration of arsenic

A method for sequestrating arsenic oxides, comprising forming an insoluble and stable glass incorporating a fully oxidized form of arsenic generated by oxidation of an initial lower oxide of arsenic and stabilization by calcium salt formation. The glass composition for sequestration of arsenic comprises from 50 to 75% silica; from 0.5 to 3% Al2O3; from 1 to 15% MnO; from 5 to 15% CaO; from 1 to 20% As2O5 and from 8 to 14% Na2O, less than four percent of iron oxides, magnesium oxide and other oxides.




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Treatment system for removing halogenated compounds from contaminated sources

A treatment system and a method for removal of at least one halogenated compound, such as PCBs, found in contaminated systems are provided. The treatment system includes a polymer blanket for receiving at least one non-polar solvent. The halogenated compound permeates into or through a wall of the polymer blanket where it is solubilized with at least one non-polar solvent received by said polymer blanket forming a halogenated solvent mixture. This treatment system and method provides for the in situ removal of halogenated compounds from the contaminated system. In one embodiment, the halogenated solvent mixture is subjected to subsequent processes which destroy and/or degrade the halogenated compound.




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Degradation of phosphate esters by high oxidation state molybdenum complexes

Degradation of phosphate esters, particularly neurotoxins and pesticides, is performed using high oxidative state molybdenum complexes, more particularly molybdenum(VI) complexes. A molybdenum(VI) complex is dissolved in water and then reacted with a phosphate ester. The phosphate esters can include, but are not limited to, VX, VE, VG, VM, GB, GD, GA, GF, parathion, paraoxon, triazophos, oxydemeton-methyl, chlorpyrifos, fenitrothion and pirimiphos-methyl, representing both chemical warfare agents as well as pesticides and insecticides.




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Pesticidal composition

A pesticidal composition comprising 4-phenoxyphenyl 2-(2-pyridyloxy)propyl ether; a hydrophobic organic solvent capable of dissolving 0.1-fold by weight of 4-phenoxyphenyl 2-(2-pyridyloxy)propyl ether at 0° C.; polyvinyl alcohol; a nonionic surfactant selected from the group consisting of alkoxylated castor oil, alkoxylated hydrogenated castor oil and alkoxylated hydrogenated castor oil fatty acid ester; and water, is excellent in storage stability.




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Efficient complex multiplication and fast fourier transform (FFT) implementation on the ManArray architecture

Efficient computation of complex multiplication results and very efficient fast Fourier transforms (FFTs) are provided. A parallel array VLIW digital signal processor is employed along with specialized complex multiplication instructions and communication operations between the processing elements which are overlapped with computation to provide very high performance operation. Successive iterations of a loop of tightly packed VLIWs are used allowing the complex multiplication pipeline hardware to be efficiently used. In addition, efficient techniques for supporting combined multiply accumulate operations are described.




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Efficient computation of driving signals for devices with non-linear response curves

Apparatus comprising an input connected to receive an input signal, a lookup table comprising a plurality of input entries and first and second output entries for each input entry. The look up table receives the input signal and returns a lower input entry, an upper input entry, the second output entry for the lower input entry, and the first output entry for the upper input entry. A first subtractor subtracts the lower input entry from the input signal to produce a first difference. A second subtractor subtracts the input signal from the upper input entry to produce a second difference. First and second multipliers multiply the first and second differences by the first output entry for the upper input entry and the second output entry for the lower input entry, respectively, to produce first and second products. An adder adds the first and second products to produce an output signal.




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Computing device with automated conversion of units

A method for computer-implemented unit-conversion method, the method comprising identifying a first numerical value in a first system of units displayed on a computing device, converting the first numerical value in the first system of units into a second numerical value, and displaying the second numerical value and the second system of units on the computing device.




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Phase-to-amplitude converter for direct digital synthesizer (DDS) with reduced AND and reconstructed ADD logic arrays

A sine wave generator for a Direct Digital Synthesizer (DDS) converts a digital phase input into a digital sine wave output. Sine values and slopes are stored in read-only memory (ROM) for coarse upper phase bits in a first quadrant. A quadrant folder and phase splitter reflects and inverts values from the first quadrant to generate amplitudes for all four quadrants. Each sine value and slope is stored for a range of lower phase bits. A Delta bit separates upper and lower phase bits. Delta conditionally inverts the lower phase bits, the sine value, and the final polarity. A reduced AND logic array multiplies the slope by the conditionally inverted lower phase bits. A reconstructed ADD logic array then adds the conditionally inverted sine value. The conditionally inverted polarity is added to generate the final sine value. Sine generation logic is streamlined with conditional inversion based on the Delta bit.




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Data compression for direct memory access transfers

Memory system operations are extended for a data processor by DMA, cache, or memory controller to include a DMA descriptor, including a set of operations and parameters for the operations, which provides for data compression and decompression during or in conjunction with processes for moving data between memory elements of the memory system. The set of operations can be configured to use the parameters and perform the operations of the DMA, cache, or memory controller. The DMA, cache, or memory controller can support moves between memory having a first access latency, such as memory integrated on the same chip as a processor core, and memory having a second access latency that is longer than the first access latency, such as memory on a different integrated circuit than the processor core.




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Systems and methods for solving computational problems

Solving computational problems may include generating a logic circuit representation of the computational problem, encoding the logic circuit representation as a discrete optimization problem, and solving the discrete optimization problem using a quantum processor. Output(s) of the logic circuit representation may be clamped such that the solving involves effectively executing the logic circuit representation in reverse to determine input(s) that corresponds to the clamped output(s). The representation may be of a multiplication circuit. The discrete optimization problem may be composed of a set of miniature optimization problems, where each miniature optimization problem encodes a respective logic gate from the logic circuit representation. A multiplication circuit may employ binary representations of factors, and these binary representations may be decomposed to reduce the total number of variables required to represent the multiplication circuit.




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Method and apparatus for performing logical compare operations

A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, instruction decode logic decodes instructions for an execution unit to operate on packed data elements including logical comparisons. A register file including 128-bit packed data registers stores packed single-precision floating point (SPFP) and packed integer data elements. The logical comparisons may include comparison of SPFP data elements and comparison of integer data elements and setting at least one bit to indicate the results. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting the at least one bit, which in turn may be utilized by a branching unit in response to a branch instruction. Alternatively, the branch support actions may include branching to an indicated target code location.




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Method and apparatus for performing logical compare operations

A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, instruction decode logic decodes instructions for an execution unit to operate on packed data elements including logical comparisons. A register file including 128-bit packed data registers stores packed single-precision floating point (SPFP) and packed integer data elements. The logical comparisons may include comparison of SPFP data elements and comparison of integer data elements and setting at least one bit to indicate the results. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting the at least one bit, which in turn may be utilized by a branching unit in response to a branch instruction. Alternatively, the branch support actions may include branching to an indicated target code location.




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System and method of operating a computing device to perform memoization including transforming input/output parameters to reduce redundancies and efficiently cache data

A system (200) and a method (100) of operating a computing device to perform memoization are disclosed. The method includes determining whether a result of a function is stored in a cache and, if so, retrieving the result from the cache and, if not, calculating the result and storing it in the cache. The method (100) includes transforming (104) by the computing device at least one selected from the input parameters and the output parameters of the function, the transforming being based on an analysis of the function and its input arguments to establish whether or not there is a possible relationship reflecting redundancy among the input parameters and output parameters of the function. The transforming may include at least one of: use of symmetry, scaling, linear shift, interchanging of variables, inversion, polynomial and/or trigonometric transformations, spectral or logical transformations, fuzzy transformations, and systematic arrangement of parameters.




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Method and apparatus for performing logical compare operation

A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, instruction decode logic decodes instructions for an execution unit to operate on packed data elements including logical comparisons. A register file including 128-bit packed data registers stores packed single-precision floating point (SPFP) and packed integer data elements. The logical comparisons may include comparison of SPFP data elements and comparison of integer data elements and setting at least one bit to indicate the results. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting the at least one bit, which in turn may be utilized by a branching unit in response to a branch instruction. Alternatively, the branch support actions may include branching to an indicated target code location.




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Silicone rubber composition curable by radial ray

There is disclosed a silicone rubber composition curable by a radial ray comprising, at least, (A) an organopolysiloxane shown by the following general formula (1), (B) a phenyl ester derivative having an acryl group, (C) a sensitizer sensitized by a radial ray, and (D) a photosensitive dye, wherein each R1, R2, and R3 independently represents a monovalent hydrocarbon group having 1 to 10 carbon atoms; X represents the same or different monovalent organic group having an acryl group or a methacryl group. As a result, there is provided a silicone rubber composition capable of being cured by irradiation of a radial ray whereby showing excellent adhesion with various substrates, capable of forming a cured film, and capable of easily distinguishing whether it is cured or not by observing appearance when not irradiated with a radial ray.




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Resin precursor composition and resin obtained by photocuring the same

Disclosed is a resin precursor composition including a bifunctional (meth)acrylate containing a fluorine atom, a bifunctional (meth)acrylate having a fluorene structure, and a photopolymerization initiator, the resin precursor composition in which the formation of precipitates during its storage is suppressed; and a resin obtained from the same. Specifically disclosed is a resin precursor composition that contains a bifunctional fluorine-containing (meth)acrylate (component A); a (meth)acrylate having a fluorene structure (component B); and a photopolymerization initiator (component C), wherein the component B includes a bifunctional (meth)acrylate having a fluorene structure (b-1) and a monofunctional (meth)acrylate having a fluorene structure (b-2) at a molar ratio (b-1):(b-2) of 90:10 to 70:30.




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Photosensitive composition

Provided is a photosensitive composition which can be cured with low energy consumption, even when a substance (such as a colorant) that attenuates or shades an illumination light is contained in a high concentration or even when the photosensitive composition is in the form of a thick film. Specifically provided is a photosensitive composition which comprises the following four components: (1) a radical initiator (A); (2) an acid generator (B) or a base generator (C); (3) a polymerizable substance (D); and (4) a colorant (E), a metal oxide powder (F), or a metal powder (G). Further, the photosensitive composition is characterized in that the radical initiator (A), the acid generator (B), and/or the base generator (C) generates an active species (H) through irradiation with an active ray of light; the active species (H) reacts the radical initiator (A), the acid generator (B), or the base generator (C) to form another species (I); and thus the polymerization of the polymerizable substance (D) by means of the active species (I) proceeds, said active species (H) or (I) being an acid or a base.




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Active ray curable composition, active ray curable ink composition for inkjet printing, active ray curable adhesive composition, and method for stabilizing active ray curable composition

An active ray curable composition, including: a photobase generator; a polymerizable compound; and an acid, wherein the photobase generator is a salt of a carboxylic acid and a basic compound, wherein a ratio by mole of a carboxyl group of the carboxylic acid:a basic functional group of the basic compound is 1:1, and wherein the acid is an acid that loses a function thereof as acid by light or heat.




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Hotmelt adhesive comprising radiation-crosslinkable poly(meth)acrylate and oligo(meth)acrylate with nonacrylic C-C double bonds

Described is a radiation-crosslinkable hotmelt adhesive comprising at least one radiation-crosslinkable poly(meth)acrylate formed to an extent of at least 60% by weight of C1 to C10 alkyl(meth)acrylates and at least one oligo(meth)acrylate which comprises nonacrylic C C double bonds and has a K value of less than or equal to 20. The hotmelt adhesive comprises a photoinitiator which may be present in the form of an additive not attached to the poly(meth)acrylate and/or not attached to the oligo(meth)acrylate, may be incorporated by copolymerization into the poly(meth)acrylate, and/or may be attached to the oligo(meth)acrylate. The hotmelt adhesive can be used for producing adhesive tapes.




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Photoresist compositions

The present invention relates to a radically polymerizable composition comprising a hydroxylamine ester used to manufacture color filters. The invention further relates to novel hydroxylamine esters. The invention further relates to the use of hydroxylamine esters in all liquid crystal display components requiring post-baking. The present invention relates to a radically polymerizable composition comprising: (a) at least one alkaline developable resin;(b) at least one acrylate monomer;(c) at least a photoinitiator;(d) at least one hydroxylamine ester compound of formula I




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Radiation curable composition, process of production and use thereof

The invention relates to a radiation curable composition for taking a dental impression comprising (A) a cationically hardenable compound comprising at least one aziridine moiety, and (B) a radiation sensitive starter, the radiation sensitive starter comprising an onium salt, a ferrocenium salt, a combination or mixture thereof.




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Thermally resistant optical siloxane resin composition

The present disclosure relates to a thermally resistant optical siloxane resin composition including siloxane containing photo-cationically polymerizable epoxy group, a photo initiator, and an antioxidant.




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Radiation curable temporary laminating adhesive for use in high temperature applications

A radiation curable temporary laminating adhesive composition for use in temperature applications at 150° C. or greater, and typically at 200° C. or greater, comprises (A) a hydrogenated polybutadiene diacrylate; (B) a radical photoinitiator; and (C) a diluent.




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High temperature melting

The present invention relates to methods for making wear and oxidation resistant polymeric materials by high temperature melting. The invention also provides methods of making medical implants containing cross-linked antioxidant-containing tough and ductile polymers and materials used therewith also are provided.




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Method for producing composite and the composite

The present invention is a method for producing a composite including a matrix and a dispersed material dispersed in the matrix. The method includes introducing a raw material for dispersed material which constitutes a dispersed material into a fluid including a melt of a raw material for matrix which constitutes a matrix or a solution containing a raw material for matrix by a vapor deposition method, to obtain a composite.




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Polymerizable compositions

The invention relates to the use of triazenes of formula (I) wherein Q is a direct bond or a bivalent radical —(CR8R9)—, Z1 is —O—, —NR10—, —CH2—, —(CR11R12)— or —C(═O)— and R1 to R12 are optionally substituted hydrocarbon residues, as precursors for radicals useful in reactions triggered by free radicals, such as polymerization of unsaturated monomers and degradation of polyolefins. Most of the triazenes of formula (I) are novel and claimed, too, as well as the preparation of triazenes of formula (I) and polymerizable compositions comprising them.




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Optical component, electronic board, method for producing the optical component, and method for producing the electronic board

An optical component and an electrical board that have a low coefficient of linear expansion and small mold shrinkage, a method for producing the optical component, and a method for producing the electronic board are provided. An optical component includes a polymer having a repeating structural unit represented by general formula (1) where R1 and R2 each independently represent —H or —CH3; m and n each independently represent an integer in the range of 0 to 3; asterisk denotes a dangling bond that bonds to one of Xa and Xb; and —H bonds to the other one of Xa and Xb.




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Silicone rubber composition, silicone rubber molded article, and production method thereof

A UV curable silicone rubber composition is provided. The composition does not undergo curing failure, foaming, and other undesirable conditions even if a water-containing inorganic filler such as zeolite were added. A UV curable silicone rubber composition comprising (A) 100 parts by weight of an organopolysiloxane having at least 2 alkenyl groups per molecule represented by the average compositional formula (I): R1aSiO(4-a)/2 (I) (wherein R1 is independently a substituted or unsubstituted monovalent hydrocarbon group, and a is a positive number of 1.95 to 2.05); (B) 1 to 300 parts by weight of an inorganic filler having a water content of at least 0.5% by weight; (C) 0.1 to 50 parts by weight of an organohydrogenpolysiloxane having at least 2 silicon-bonded hydrogen atoms per molecule; and (D) a catalytic amount of a photoactive platinum complex curing catalyst.




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Semi-cured product, cured product and method of manufacturing these, optical component, curable resin composition

A heat-resistant cured product is efficiently produced by obtaining a semi-cured product where a curable resin composition containing a (meth)acrylate monomer, a non-conjugated vinylidene group-containing compound and a thermal radical-polymerization initiator is processed by at least one of photoirradiation and heating to give a semi-cured product having a complex viscosity of from 105 to 108 mPa·s at 25° C. and at a frequency of 10 Hz; and putting the semi-cured product in a forming die for pressure formation therein, and heating it therein for thermal polymerization to give a cured product.




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UV-curable coating compositions with self-healing capabilities, coating films, and methods of producing coating films

The present invention is directed to a coating composition including a (meth)acrylate binder resin, a UV initiator, an organic solvent, and silica particles surface-treated with a (meth)acrylate compound, a coating film including a cured product of the coating composition, and a method of producing the coating film. The present invention makes it possible to provide a coating material having high transmittance and a low level of haze, and excellent scratch resistance and self-healing capabilities.




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Portable computing device as control mechanism

A portable or mobile computing device, such as a smart phone or portable media player, can be used to control one or more electronic devices over an appropriate wireless channel. In one example, a user can utilize a smart phone as a mouse for a notebook computer or Internet-capable television. The user can move the portable device on a surface and press appropriate selectable elements on the portable device, as if the user is using a wireless mouse. The portable device can send the commands over the wireless channel to the electronic device, which can provide inputs and/or control signals to the electronic device. In some embodiments, the user can take advantage of the processing capability of the portable device to work directly with elements such as a wireless keyboard and wireless monitor, without the need for a notebook or other such computing element therebetween.




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Multipass programming in buffers implemented in non-volatile data storage systems

The various implementations described herein include systems, methods and/or devices used to enable multipass programming in buffers implemented in non-volatile data storage systems (e.g., using one or more flash memory devices). In one aspect, a portion of memory (e.g., a page in a block of a flash memory device) may be programmed many (e.g., 1000) times before an erase is required. Some embodiments include systems, methods and/or devices to integrate Bloom filter functionality in a non-volatile data storage system, where a portion of memory storing one or more bits of a Bloom filter array may be programmed many (e.g., 1000) times before the contents of the portion of memory need to be moved to an unused location in the memory.




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Technique for communicating interrupts in a computer system

A technique to enable efficient interrupt communication within a computer system. In one embodiment, an advanced programmable interrupt controller (APIC) is interfaced via a set of bits within an APIC interface register using various interface instructions or operations, without using memory-mapped input/output (MMIO).




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PCI express channel implementation in intelligent platform management interface stack

Certain embodiments of the present disclosure are directed to a baseboard management controller (BMC) that includes a PCI express (PCIe) interface controller configured to provide access to a PCIe channel over a PCIe link, and firmware. The firmware includes a PCIe module being configured to access the PCIe channel through the PCIe interface controller and registered as a PCIe function. A software stack of the BMC communicates, through the PCIe module, with a PCIe device over the PCIe channel.




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Bridge between a peripheral component interconnect express interface and a universal serial bus 3.0 device

A bridge includes a Peripheral Component Interconnect Express interface supporting at least two lanes, an Extensible Host Controller Interface, and a Universal Serial Bus 3.0 root hub. The Peripheral Component Interconnect Express interface is used for coupling to a host. Each lane of the at least two lanes provides a highest data transmission speed. The Extensible Host Controller Interface is coupled to the Peripheral Component Interconnect Express interface for storing data transmitted by the Peripheral Component Interconnect Express interface. The Universal Serial Bus 3.0 root hub includes a first controller and a second controller. The first controller and the second controller are used for controlling data transmission of four ports, and a highest data transmission speed provided by each port of the four ports is not more than the highest data transmission speed provided by the lane.