An approach is disclosed for acquiring multi-sector computed tomography scan data. The approach includes activating an X-ray source during heartbeats of a patient to acquire projection data over a limited angular range for each heartbeat. The projection data acquired over the different is combined. An image having good temporal resolution is reconstructed using the combined projection data.

In one aspect, an optical device comprises a monolithic optical module which includes a first total internal reflection (TIR) surface, a second TIR surface adjacent the first TIR surface, and a first optical port aligned with the first internal optical beam dividing interface. An interface between the first TIR surface and the second TIR surface forms a first internal optical beam dividing interface. An exterior surface of the first TIR surface and an exterior surface of the second TIR surface form a generally V-shaped notch on the monolithic optical module. A first optical beam entering the monolithic optical module through the first optical port and incident on the first internal optical beam dividing interface is partially reflected by the first TIR surface to travel in a first direction as a second optical beam and partially reflected by the second TIR surface to travel in a second direction as a third optical beam. The second direction is generally opposite to the first direction.

A slag remover for discharging combustion residues of an incineration plant comprises a trough, which has a trough housing having two side walls, which define the trough width, and having a trough bottom, and which is intended to collect the combustion residues evacuated from a combustion chamber of the incineration plant. The trough further comprises at least two push rams for pushing the combustion residues out of the trough, and a shaft rotatably mounted in two shaft bearings and on which at least one drive lever cooperating with a cylinder-piston unit and at least two output levers connected to respectively one of the push rams are disposed in a rotationally secure manner. The cylinder-piston unit is here designed such that the push rams move back and forth between a retracted position and an extended position. The drive lever is disposed between two output levers.

A carbon fuel combustion process, employing an air gas separation unit, a combustion unit operating either with air or with an oxidizer leaner in nitrogen than air, coming from the air gas separation unit, and a unit for compressing and/or purifying the CO2 coming from the combustion flue gas, wherein the power consumed by the air gas separation unit and/or the flow of oxygen produced by the air gas separation unit and/or the capture of the CO2 coming from the combustion flue gas are variable over time is presented.

An ash basket can act as a sieve or strainer, allowing a user to lift out the charcoal from a kamado grill, clean out the ash, and place the ash basket back into the grill for future use. The ash basket retains larger pieces of charcoal that can be reused, while allowing the ash to pass through to a bottom plate of the grill. The bottom plate has openings to permit the ash to fall to an ash collection chamber. Without the ash basket, pieces of charcoal can block the openings in the bottom plate, making ash collection difficult. Moreover, with the openings blocked, proper air flow through the openings. Finally, the ash basket creates and additional air space that covers the entire surface of the interior walls by separating the ash from the wall, improving air flow, which is critical to the kamado grill design.

A waste disposal plant includes a combustion chamber (2) inside which waste laid on a combustion grate (3) is burnt, which permits the entrance of an adequate quantity of combustion air in the chamber. The combustion grate includes at least a handling group formed by of fire bars or plates (7), which move alternatively one with respect to the other by advancing the waste on the grate. A handling group permits the alternate movement of the fire bars (7) which are divided in movable fire bars (7a) and fixed fire bars (7b), alternately disposed one with respect to the other, on transversal rows resting one upon the other according to a longitudinal placement with alternate steps.

A resin composition, a multi-layered film, a backsheet for photovoltaic modules, a method thereof, and a photovoltaic module are provided. The multi-layered film including a coating layer including a fluorine-based polymer has an excellent durability and weather resistance, and also exhibits high interfacial adhesive strength to a substrate since the multi-layered film is formed by coating a cured product of the resin composition including the fluorine-based polymer, an acrylic polymer including a thermosetting functional group, and a heat-curing agent on the substrate. In addition, drying can be performed at a low temperature during the manufacture of the multi-layered film so that the manufacturing costs can be decreased, productivity can be increased, and the deterioration of the product due to heat modification, heat shock, and the like, can be prevented. The multi-layered film can be effectively used as a backsheet for various photovoltaic modules.

A crack resistant solar cell module includes a protective package mounted on a frame. The protective package includes a polyolefin encapsulant that protectively encapsulates solar cells. The polyolefin has less than five weight percent of oxygen and nitrogen in the backbone or side chain. In other words, the combined weight percent of oxygen and nitrogen in any location in the molecular structure of the polyolefin is less than five. The polyolefin also has a complex viscosity less than 10,000 Pa second at 90° C. as measured by dynamic mechanical analysis (DMA) before any thermal processing of the polyolefin. The protective package includes a top cover, the encapsulant, and a backsheet. The solar cell module allows for shipping, installation, and maintenance with less risk of developing cracks on the surfaces of the solar cells.

A back electrode type solar cell in which a no-electrode-formed region where no electrode is placed is provided in a part of a peripheral portion of a back surface of the back electrode type solar cell such that a line connecting end portions of a plurality of electrodes to one another includes a partially inwardly recessed region and the no-electrode-formed region is located adjacent to each of an electrode for n-type and an electrode for p-type adjacent to each other, a solar cell module, a method of manufacturing a back electrode type solar cell with interconnection sheet, and a method of manufacturing a solar cell module are provided.

A PV panel uses an array of small silicon sphere diodes (10-300 microns in diameter) connected in parallel. The spheres are embedded in an uncured aluminum-containing layer, and the aluminum-containing layer is heated to anneal the aluminum-containing layer as well as p-dope the bottom surface of the spheres. A phosphorus-containing layer is deposited over the spheres to dope the top surface n-type, forming a pn junction. The phosphorus layer is then removed. A conductor is deposited to contact the top surface. Alternatively, the spheres are deposited with a p-type core and an n-type outer shell. After deposition, the top surface is etched to expose the core. A first conductor layer contacts the bottom surface, and a second conductor layer contacts the exposed core. A liquid lens material is deposited over the rounded top surface of the spheres and cured to provide conformal lenses designed to increase the PV panel efficiency.

The solar cell module includes a solar panel that includes a transparent substrate and is configured by aligning solar cells, a reinforcing frame arranged on the back surface of the solar panel, and a shock absorbing unit arranged between the solar panel and the reinforcing frame, where the shock absorbing unit has the first main surface facing the solar panel, which is a flat surface, and a second main surface facing the reinforcing frame, which is a curved surface bowed in the longitudinal direction of the reinforcing frame, having an arc shape in cross section, and convexed toward the reinforcing frame side.

A solar-cell sealant that has excellent properties such as transparency, flexibility, adhesiveness, heat resistance, appearance, cross-linking characteristics, electrical characteristics, and calenderability. A solar-cell sealant that contains an ethylene/α-olefin/unconjugated-polyene copolymer satisfying requirements (a1) through (a3). Requirement (a1) is that constituent units derived from ethylene constitute 80-90 mol %, constituent units derived from C3-20 α-olefin constitute 9.99-19.99 mol %, and constituent units derived from an unconjugated polyene constitute 0.01-5.0 mol % of said copolymer. Requirement (a2) is that the MFR of said copolymer, as measured in accordance with ASTM D1238 at 190° C. under a 2.16 kg load, be at least 2 g/10 min. and less than 10 g/10 min. Requirement (a3) is that the Shore A hardness of said copolymer, as measured in accordance with ASTM D2240, be 60 to 85.

A solar cell module includes a plurality of solar cells each comprising a substrate, an emitter region placed at the substrate, and an anti-reflection region placed on the emitter region. The anti-reflection region includes a first opening region through which part of the emitter region is exposed and one or more second opening regions through which part of the emitter region is exposed. A first electrode is connected to the exposed emitter region of the first opening region through the anti-reflection region by metal plating and a first bus bar is connected to the exposed emitter region of one or more second opening regions through the anti-reflection region by metal plating.

A tape feeder includes a guide part that guides a carrier tape and is detachably attached to a main body. The guide part includes: a lower member guiding the carrier tape and attached to and detached from the main body; an upper member pressing down the carrier tape from above; a tape introduction part guiding the carrier tape into the upper member at an upstream side thereof in a tape feed direction; a confirmation opening part disposed in the upper member for visually confirming that the carrier tape arrives at a pin engagement range; an open/close mechanism opening and closing the upper member with respect to the lower member; and a positioning mechanism fitting a positioning pin into a feed hole of the carrier tape in the guide part, thereby positioning the carrier tape relative to the guide part in the tape feed direction.

A tape feeder includes a guide part that guides a carrier tape and is detachably attached to a main body. The guide part includes: a lower member guiding the carrier tape and attached to and detached from the main body; an upper member pressing down the carrier tape from above; a tape introduction part guiding the carrier tape into the upper member at an upstream side thereof in a tape feed direction; a confirmation opening part disposed in the upper member for visually confirming that the carrier tape arrives at a pin engagement range; an open/close mechanism opening and closing the upper member with respect to the lower member; and a positioning mechanism fitting a positioning pin into a feed hole of the carrier tape in the guide part, thereby positioning the carrier tape relative to the guide part in the tape feed direction.

In the separation of a cover tape 15e from a carrier tape 15 performed by a cover tape separating mechanism 50, a cover tape 15e, which is separated from a base tape 15a by a separating blade edge 51f, comes into contact with a concave conical surface 52c, so that one side portion of a cover tape 15e is bent toward the other side portion; and the bent cover tape 15e is pressed against a guide surface 32s from below while the carrier tape 15 is guided to a pick-up position. Accordingly, the cover tape 15e is folded on the base tape 15a in a flat shape.

Groups of phase shifted Pulse Width Modulation signals are generated that maintain their duty-cycle and phase relationships as a function of the period of the PWM signal frequency. The multiphase PWM signals are generated in a ratio-metric fashion so as to greatly simplify and reduce the computational workload for a processor used in a PWM system. The groups of phase shifted PWM signals may also be synchronized with and automatically scaled to match external synchronization signals.

In an embodiment, a method of generating a pulse-width modulated signal from an input signal includes calculating a finite number of basis functions of a first pulse-width modulated signal based on the input signal, and forming an electronic output based on the calculated finite number of basis functions.

A phase-locked loop double-point modulator may include a frequency divider having a ratio which can be changed by a first modulation signal, and an oscillator, a frequency of which can be changed by a second modulation signal correlated to the first modulation signal. A calibration circuit may be configured, in a calibration mode, to match the gains of the first and second modulation signals based on frequency measurements of the oscillator for two different calibration values of the second modulation signal. The phase-locked double-point modulator may also include an attenuator having a constant ratio greater than 1 and placed in the path of the second modulation signal, and a selector switch configured to be controlled by the calibration circuit to reduce the ratio of the attenuator in the calibration mode.

An amplifier receives an amplitude signal of a polar modulated signal at a base terminal of a transistor and receives a phase modulated carrier signal of the polar modulated signal at the base terminal of the transistor. The amplifier combines the amplitude signal and the phase modulated signal to produce a full complex waveform at a collector terminal of the transistor.

A modulator generates a baseband digital signal from an information-bearing digital signal. The baseband signal has time-varying phase and amplitude defined by a sequence of complex data words, each having an in-phase (I) component and a quadrature (Q) component. A noise-shaping modulator generates a noise-shaped digital signal from the baseband digital signal such that quantization noise in the noise-shaping modulator is attenuated by a spectral null of its noise transfer function. The spectral null is selected by a noise-shaping parameter corresponding to a selected one of a plurality of output frequencies. A signal converter generates an analog signal conveying the information of the information-bearing digital signal on an analog carrier signal having the selected output frequency.

A new coded continuous phase modulation (CPM) scheme is proposed to enhance physical layer performance of the current DVB-RCS standard for a satellite communication system. The proposed CPM scheme uses a phase pulse design and combination of modulation parameters to shape the power spectrum of CPM signal in order to improve resilience to adjacent channel interference (ACI). Additionally, it uses a low complexity binary convolutional codes and S-random bit interleaving. Phase response using the proposed CPM scheme is a weighted average of the conventional rectangular and raised-cosine responses and provides optimum response to minimize frame error rate for a given data rate.

A PWM circuit that can have two refresh rates, including: a first PWM signal generator and a second PWM signal generator; wherein the first PWM signal generator and the second PWM signal generator respectively control refresh rates in two dimensions of an output data generated from a target apparatus. A PWM signal generation method that can have two refresh rates, including: generating a first PWM signal; generating a second PWM signal; and controlling refresh rates in different dimensions of an output data generated from a target apparatus respectively by using the first PWM signal and the second PWM signal.

A digital pulse width modulation controller includes a pulse width modulation controller, a selection unit having at least one selector, a comparison unit having at least one comparator, and a signal conversion unit having at least one digital-to-analog converter. The digital-to-analog converter generates a reference current and/or voltage. The comparator receives the reference current and/or voltage, and performs a comparison operation to generate a comparison signal based on a feedback signal. The selector selects one selection signal to input into the pulse width modulation controller, which receives other parameters set by a user or the system at the same time so as to control characteristics of the digital pulse width modulation signals, thereby improving the electric properties of a loading circuit.

Techniques and mechanisms for configuring logic to implement a signal modulation. In an embodiment, the logic includes a finite impulse response (FIR) module comprising circuitry. The selection circuitry may be operable to concurrently receive signals from latch circuitry of the FIR module and, based on the signals, to select an input group of the selection circuitry and to output a voltage identifier. In another embodiment, configuration logic is operable to set an operational mode which determines a total number of concurrent input signals, received by the FIR module, which the FIR module will use to select an input group for generating an output representing a voltage level.

A circuit includes a switched modulator stage combining an information signal with a square wave carrier to produce a first modulated signal; and a second modulation stage forming additional steps in the first modulated signal to produce a second modulated signal.

A rail-to-rail comparator including a first comparison unit connected to a first terminal and configured to compare differential input signals to differential reference voltages; a second comparison unit connected to a second terminal and configured to compare the differential input signals to the differential reference voltages; and an output unit configured to be driven in response to a clock signal and to generate a complementary output signal according to comparison results of the first and second comparison units.

An example PWM includes a driver and a two-way oscillator. The oscillator includes, a first frequency adjust current source, a second frequency adjust current source, a capacitor, a switching reference and a comparator. The capacitor integrates a frequency adjust current by charging with the first frequency adjust current source. The capacitor subsequently integrates a second frequency adjust current by discharging with the second frequency adjust current source. The switching reference outputs a first reference voltage and a second reference voltage responsive to an oscillator signal. The comparator compares the output of the switching reference with a voltage on the capacitor. The first and second frequency adjust current sources vary the first and second frequency adjust currents to vary the frequency of the PWM signal to spread energy of switching harmonics over a frequency band and to reduce EMI.

A time-varying formant is generated at a formant frequency by generating first and second harmonic phase signals having first and second harmonic numbers, respectively, in relation to a modulation frequency. The first and second harmonic phase signals are generated in proportion to a master phase signal, which varies at the modulation frequency, modulo a factor corresponding to their harmonic numbers. First and second sound signals, based on the first and second harmonic phase signals, are frequency modulated to create an arbitrarily rich harmonic spectrum, depending on an FM index. The time-varying formant is generated by generating a time-varying combination of the first and second harmonic sound signals, weighting the first and second harmonic sound signals in accordance with their spectral proximities to the formant frequency. One or more of the harmonic numbers are updated when the time-varying formant frequency passes the frequency of either sound signal.

A communications transmitter includes a baseband processor configured to generate amplitude, angle, in-phase and quadrature baseband signals and a combination modulator that is configurable to modulate in the polar domain and, alternatively, in the quadrature domain. The combination modulator includes a quadrature modulator and a separate and distinct angle modulator that is configured to serve as a local oscillator for the quadrature modulator. In one embodiment of the invention the combination modulator is configured to modulate in the quadrature domain when the transmitter is operating according to a first communications condition (e.g., first transmit power level or first modulation scheme) and is configured to modulate in the polar domain when the transmitter is operating according to a second communications condition (e.g., second transmit power level or second modulation scheme).

A device for mixing multiple (N) pulse density modulated (PDM) bit streams of a bit rate, the device comprises an input logic, an error accumulation circuit, an error correction circuit and an adder of more than N bits; wherein the device is arranged to output an output PDM bit stream that represents a mixture of the multiple input PDM bit streams; wherein the output PDM bit stream comprises a plurality of output PDM bits, wherein a certain output PDM bit of a plurality of output PDM bits that form the output PDM bit stream is generated during a certain clock cycle; wherein the input logic is arranged to select, during each fraction of the certain clock cycle, a current bit of a selected PDM bit stream, wherein different PDM bit streams are selected during different fragments of the certain clock cycle; wherein the error accumulation circuit is arranged to store intermediate values during a first fraction till a penultimate fraction of the certain clock signal and to store a last value during a last fraction of the certain clock signal.

The present invention relates to a switched-mode power supply apparatus and a corresponding method. For an effective compensation of non-linearities caused by dead-time and voltage drops in the switching power amplifier of the apparatus, an apparatus is proposed comprising a switching power amplifier (14) for amplifying a signal supplied by an external signal source (11) and for supplying a load voltage and/or load current to a load (15), and a control unit (12; 12b) for controlling the switching of said switching power amplifier based on a timing setting, said control unit being adapted for simulating the behavior of the switching power amplifier by predicting the average load voltage and/or load current for at least two, in particular a plurality of, timing settings for a desired load voltage and/or load current based on state information about the present state of the switching power amplifier.

A frequency modulating path for generating a frequency modulated clock includes a direct feed input arranged for directly modulating frequency of an oscillator, and a compensating feed input arranged for compensating effects of frequency modulating on a phase error; wherein the compensating feed input is resampled by a down-divided clock that is an integer edge division of the oscillator. A reference phase generator for generating a reference phase output includes a resampling circuit, an accumulator and a sampler. The resampling circuit is for resampling a modulating frequency command word (FCW) input to produce a plurality of samples. The accumulator is for accumulating the samples to generate an accumulated result. The sampler is for sampling the accumulated result according to a frequency reference clock, and accordingly generating a sampled result, wherein the reference phase output is updated according to at least the sampled result.

A frequency modulator includes a digitally-controlled oscillator (DCO) arranged for producing a frequency deviation in response to a modulation tuning word and a phase-locked loop (PLL) tuning word. In addition, another frequency modulator includes a DCO and a DCO interface circuit. The DCO is arranged for producing a frequency deviation in response to an integer tuning word and a fractional tuning word. The DCO interface circuit is arranged for generating the integer tuning word and the fractional tuning word to the DCO, wherein the fractional tuning word is obtained through asynchronous sampling of a fixed-point tuning word.

Embodiments of digital high-speed bi-phase modulator and method for bi-phase modulation are generally described herein. In some embodiments, the digital high-speed bi-phase modulator comprises a high-speed digital divider, a high-speed digital multiplexer, and matched signal paths provided between the divider and the multiplexer. The high-speed digital divider is configured to receive a carrier signal and generate complementary output signals. The high-speed digital multiplexer is configured to switch between the complementary output signals and generate a bi-phase modulated output at a carrier frequency (fc) modulated with a bi-phase code. The bi-phase code may be provided to control inputs of the multiplexer.

A radio frequency generator includes a power control module, a frequency control module and a pulse generating module. The power control module is configured to generate a power signal indicating power levels for target states of a power amplifier. The frequency control module is configured to generate a frequency signal indicating frequencies for the target states of the power amplifier. The pulse generating module is configured to (i) supply an output signal to the power amplifier, (ii) recall at least one of a latest power level or a latest frequency for one of the target states of the power amplifier, and (iii) adjust a current power level and a current frequency of the output signal from a first state to a second state based on the power signal, the frequency signal, and at least one of the latest power level and the latest frequency of the power amplifier.

Provided is a method of generating a driving signal for driving a dual mode supply modulator for a power amplifier. The method includes obtaining an envelope of a complex baseband signal to be transmitted, comparing the envelope of the complex signal with a preset threshold value, when a current envelope of the complex signal is the preset threshold value or greater or when there is a result having the preset threshold value or greater in previous N comparisons, outputting a digital board output signal configured with a first logic level through a digital-to-analog converter; and when the current envelope of the complex signal is smaller than the preset threshold value and when there is no result having the preset threshold value or greater in the previous N comparisons, outputting a digital board output signal configured with a second logic level through the digital-to-analog converter.

In an embodiment, a method of producing a multi-level RF signal includes producing plurality of pulse-width modulated signals based on an input signal. The method further includes driving a corresponding plurality of parallel amplifiers with the plurality of pulse-width modulated signals by setting a parallel amplifier to have a first output impedance when a corresponding pulse-width modulated signal is in an active state and setting the parallel amplifier to have a second output impedance when the corresponding pulse-width is in an inactive state. The method also includes phase shifting the outputs of the plurality of parallel amplifiers, wherein phase shifting transforms the second output impedance into a third impedance that is higher than the second output impedance, and combining the phase shifted outputs.

According to some embodiments, a method and apparatus are provided to vary a clock signal frequency for a first time period between a lower limit of a range of problematic frequencies and a frequency lower than the lower limit, and vary the clock signal frequency for a second period of time between an upper limit of the range of problematic frequencies and a frequency greater than the upper limit.

A modulation apparatus for a class D switching amplifier is capable of reducing power consumption of an Electro-Migration Interface (EMI) of an output end and a gate driver end in a zero input signal. The modulation apparatus for a class D switching amplifier includes a control unit for detecting and outputting a control signal which is a common signal component of a first modulation signal modulated by using a first input signal and a second modulation signal modulated by using a second input signal; and is characterized by feedback of a first output signal, a second output signal and a common output signal outputted by using the first modulation signal, the second modulation signal and the control signal through an input of the modulation apparatus.

A communications system includes a target receiver having a passband and configured to receive an intended signal within the passband. The communications system also includes a jammer configured to jam the target receiver from receiving the intended signal. The jammer has at least one antenna, a jammer receiver coupled to the at least one antenna, a jammer transmitter coupled to the at least one antenna, and a controller configured to cooperate with the jammer receiver. The controller is configured to detect the intended signal and to generate an interfering signal comprising a continuous phase modulation (CPM) waveform having a constant envelope so that the interfering signal at least partially overlaps the passband of the target receiver.

In various embodiments, systems and methods for generating high-precision pulse-width modulation include a delay-locked loop comprising multiple delay units having time-variable delays, control logic for selecting a subset S of the multiple delay units to thereby generate a time-invariant shift amount having a precision finer than that of a system clock and circuitry for applying the shift amount to rising and falling edges of a pulse-width modulation waveform to thereby generate a high-precision pulse-width modulation waveform.

A modulation method is provided. The modulation method includes the steps of receiving multiple sinusoidal signals, obtaining the maximum value of the sinusoidal signals, obtaining the median value of the sinusoidal signals, and obtaining the minimum value of the sinusoidal signals within a period to generate a difference between the maximum value and the minimum value, generating a difference according to an upper limit and a lower limit of a predetermined comparison value, and comparing the two differences to generate an optimized modulation signal.

An ultra-wide band frequency modulator is disclosed. The frequency modulator includes a direct modulation phase lock loop that receives a small component. The frequency modulator also includes a delay module that produces a plurality of delay lines. The frequency modulator further includes an edge selector that receives a large component and the plurality of delay lines.

The present invention relates to a digital modulation method and a corresponding modulator. The modulator comprises a transcoder (110) followed by a FIFO register (120) and a 2-PSK modulator (130). The transcoder codes a binary word of fixed size into a code word of variable size using a transcoding table. The transcoding table codes at least one first binary word, leading to a first number of phase transitions at the output of the modulator, into a second word of size greater than that of the first word, leading to, at the output of the modulator, a second number of phase transitions less than the first number of phase transitions.

The present invention provides a digitally controlled, current starved, pulse width modulator (PWM). In the PWM of the present invention, the amount of current from the voltage source to the ring oscillator is controlled by the proposed header circuit. By changing the header current, the pulse width of the switching signal generated at the output of the ring oscillator is dynamically controlled, where the duty cycle can vary between 50% and 90%. A duty cycle to voltage converter is used to ensure the accuracy of the system under process, voltage, and temperature (PVT) variations. The proposed pulse width modulator is appropriate for dynamic voltage scaling systems due to the small on-chip area and high accuracy under process, voltage, and temperature variations.

A memristor-based emulator including a memristor circuit for use in digital modulation that includes a first current feedback operational amplifier (CFOA) having multiple terminals in communication with a capacitor Cd and in further communication with a resistor Ri. A second CFOA having multiple terminals is in communication with the first CFOA and is adapted to be in further communication with a voltage vM to provide an input current iM for integration by a capacitor Ci. A nonlinear resistor is in communication with the second CFOA. A third CFOA having multiple terminals is in communication with the nonlinear resistor and is in further communication with the first CFOA and a resistor Rd. The third CFOA and the resistor Rd act as an inverting amplifier associated with the nonlinear resistor to increase a current gain to increase a difference between ON and OFF values of a resistance of a realized memristor.

A method for phase modulation of a carrier signal from a transmitter to a contactless transponder in which data is coded as consecutive symbols, each corresponding to a predefined number of carrier cycles, and in which a symbol time is at least two cycles of the carrier signal includes, at the transmitter, spreading a phase jump of a symbol in relation to a preceding symbol over a first part of the symbol time. The establishment of the phase jump is completed in the first part of the symbol time. The periods of the cycles are constant during a second part of the symbol time.

A modulator which has a first terminal to receive a carrier signal, a second terminal to receive a first control signal to control a frequency band of the carrier signal and a third terminal to receive a second control signal to control a modulation depth of the carrier signal.

A method of manufacturing a power contactor from an existing contactor having a magnetic amplifier that comprises a blowout coil and a ferromagnetic core, and an arc chute for extinguishing an arc generated by opening the existing contactor under a current load is disclosed. The method includes removing a bolt assembly from the existing contactor and at least one side plate from the existing contactor. The method also includes removing the ferromagnetic core from the existing contactor.