The present disclosure relates to nanoresonator oscillators or NEMS (nanoelectromechanical system) oscillators. A circuit for measuring the oscillation frequency of a resonator is provided, comprising a first phase-locked feedback loop locking the frequency of a controlled oscillator at the resonant frequency of the resonator, this first loop comprising a first phase comparator. Furthermore, a second feedback loop is provided which searches for and stores the loop phase shift introduced by the resonator and its amplification circuit when they are locked at resonance by the first loop. The first and the second loops operate during a calibration phase. A third self-oscillation loop is set up during an operation phase. It directly links the output of the controllable phase shifter to the input of the resonator. The phase shifter receives the phase-shift control stored by the second loop.

A resonator element includes a substrate including a first principal surface and a second principal surface respectively forming an obverse surface and a reverse surface of the substrate, and vibrating in a thickness-shear vibration mode, a first excitation electrode disposed on the first principal surface, and a second excitation electrode disposed on the second principal surface, and being larger than the first excitation electrode in a plan view, the first excitation electrode is disposed so as to fit into an outer edge of the second excitation electrode in the plan view, and the energy trap confficient M fulfills 15.5≦M≦36.7.

A resonator element includes a substrate vibrating in a thickness-shear vibration mode, a first excitation electrode disposed on one principal surface of the substrate, and has a shape obtained by cutting out four corners of a quadrangle, and a second excitation electrode disposed on the other principal surface of the substrate, and a ratio (S2/S1) between the area S1 of the quadrangle and the area S2 of the first excitation electrode fulfills 87.7%≦(S2/S1)

An oscillating device includes a temperature compensated oscillator that compensates a frequency temperature characteristic in a temperature compensation range including apart of a first temperature range, and a temperature control circuit that includes a heater and controls a temperature of a quartz crystal resonator of the temperature compensated oscillator into a second temperature range included in the temperature compensation range. Further, the temperature compensation range of the temperature compensated oscillator may include a part of the first temperature range in which compensation can be performed by first-order approximation.

A phase locked loop includes a voltage controlled oscillator and a frequency divider or frequency multiplier. The voltage controlled oscillator and the frequency divider/multiplier are coupled together in a stacked configuration. A drive current is supplied to the voltage controlled oscillator. The drive current passes from the voltage controlled oscillator to the frequency divider/multiplier, thereby driving the frequency divider/multiplier with the same drive current that was supplied to the voltage controlled oscillator.

A self-feedback random generator comprises a digital-to-analog converter, a digital oscillator, a frequency-modulating unit and a first D-type flip-flop. The digital-to-analog converter receives a digital random-code signal and the digital random-code signal is converted to corresponding analog random signal. The frequency-modulating unit modulates frequency of first digital oscillating signal so as to increase random of frequency of first digital oscillating signal according to voltage value of the analog random signal, and accordingly outputs a second digital oscillating signal. The first D-type flip-flop receives the second digital oscillating signal and a clock signal, and reads the second digital oscillating signal through utilizing the clock signal so as to outputs the digital random-code signal, wherein frequency of the clock signal is smaller than frequency of the first digital oscillating signal, and random of frequency of the second digital oscillating signal corresponds to random of the digital random-code signal.

There are provided an accumulator-type fractional N-PLL synthesizer for suppressing the fractional spurious caused by periodically switching a frequency division number of a fractional frequency divider, and a control method thereof. In an accumulator-type fractional N-PLL synthesizer (100), a pulse signal proportional to a fractional phase error occurring between a reference signal and an output signal of a fractional divider (112) for feeding back an output of a VCO (115) of an output stage to a preceding stage is generated using an error signal from an accumulator (120). Through the use of the pulse signal, pulse widths of a UP signal and a DN signal output from a phase detector (140) are controlled so as to reduce a fractional phase error occurring between the UP signal and the DN signal. Thus, the fractional spurious caused by periodically switching the frequency division number of the fractional divider (112) is suppressed.

A digitally controlled oscillator has a high-order ΔΣ modulator configured to be of at least an order higher than a first order and configured to input a digital control signal and output a pseudorandom digital output signal, a first-order ΔΣ modulator configured to input the pseudorandom digital output signal and generate a control pulse signal including a pulse width corresponding to the pseudorandom digital output signal, a low pass filter configured to pass a low frequency component of the control pulse signal, and an oscillator configured to generate a high-frequency output signal whose frequency is controlled based on the control pulse signal outputted by the low pass filter so as to be a frequency corresponding to the digital control signal.

An integrated circuit (10) has an internal RC-oscillator (20) for providing an internal clock signal (CLI) having an adjustable oscillator frequency. The integrated circuit (10) further comprises terminals (101, 102) for connecting an external LC tank (30) having a resonance frequency and a calibration circuit (40) which is configured to adjust the oscillator frequency based on the resonance frequency of the LC tank (30) connected during operation of the integrated circuit (10). An internal auxiliary oscillator (46) is connected to the terminals (101, 102) in a switchable fashion and is configured to generate an auxiliary clock signal (CLA) based on the resonance frequency. The calibration circuit (40) comprises a frequency comparator (47) which is configured to determine a trimming word (TRW) based on a frequency comparison of the internal clock signal (CLI) and the auxiliary clock signal (CLA). The LC tank (30) to be connected is an antenna for receiving a radio signal.

The invention concerns an oscillator generating a wave composed of a frequency of on the order of terahertz from a beat of two optical waves generated by a dual-frequency optical source. The oscillator includes a modulator the transfer function of which is non-linear for generating harmonics with a frequency of less than one terahertz for each of the optical waves generated by the dual-frequency optical source, an optical detector able to detect at least one harmonic for each of the optical waves generated by the dual-frequency optical source and transforming the harmonics detected into an electrical signal, a phase comparator for comparing the electrical signal with a reference electrical signal, and a module for controlling at least one element of the dual-frequency optical source with a signal obtained from the signal resulting from the comparison.

A digitally-controlled oscillator includes a base frequency generator having an odd number of base inverters connected end-to-end to generate an output signal that oscillates at a predetermined frequency and a frequency-adjusting unit connected to the base frequency generator. The frequency-adjusting unit includes a first string of switchable inverters connected in series with each other, the switchable inverters having sizes that decrease from an input end of the first string to the output end of the first string.

Embodiments provide a multi-phase voltage controlled oscillator (VCO) that produces a plurality of output signals having a common frequency and different phases. In one embodiment, the VCO may include a passive conductive structure having a first ring and a plurality of taps spaced around the first ring. The VCO may further include a capacitive load coupled to the passive conductive structure, one or more feedback structures coupled between a pair of opposing taps of the plurality of taps, and one or more current injection devices coupled between a pair of adjacent taps of the plurality of taps.

The present invention discloses an Oven Controlled Crystal Oscillator and a manufacturing method thereof. The Oven Controlled Crystal Oscillator comprises a thermostatic bath, a heating device, a PCB and a signal generating element, where the signal generating element is used for generating a signal of a certain frequency, the heating device, the PCB and the signal generating element are mounted in the thermostatic bath, the signal generating element is mounted in a groove formed on one side of the PCB, while the heating device is mounted against the other side of the PCB that is opposite to the groove. The signal generating element may be a passive crystal resonator or an active crystal oscillator. The Oven Controlled Crystal Oscillator according to the invention is advantageous for a small volume and a high temperature control precision.

An oscillator outputs a control signal to suppress an influence caused by temperature characteristic of f1 based on a differential signal corresponding to difference between an oscillation output f1 of a first oscillator circuit and an oscillation output f2 of a second oscillator circuit treated as a temperature detection value. A switching unit switches between a first state and a second state. The first state is a state where a first connecting end and a second connecting end are connected to a storage unit for access from an external computer to the storage unit. The second state is a state where the first connecting end and the second connecting end are connected to a first signal path and a second signal path such that the respective f1 and f2 are retrieved from the first connecting end and the second connecting end to an external frequency measuring unit.

An atomic oscillator includes: a gas cell which includes two window portions having a light transmissive property and in which metal atoms are sealed; a light emitting portion that emits excitation light to excite the metal atoms in the gas cell; a light detecting portion that detects the excitation light transmitted through the gas cell; a heater that generates heat; and a connection member that thermally connects the heater and each window portion of the gas cell to each other.

An oscillator configured to oscillate an electromagnetic wave, including: a negative resistance device; a microstrip resonator configured to determine an oscillation frequency of an electromagnetic wave excited by the negative resistance device; a resistance device and a capacitance device, which form a low-impedance circuit configured to suppress parasitic oscillation; and a strip conductor configured to connect the capacitance device of the low-impedance circuit and the microstrip resonator to each other, in which an inductance L of the strip conductor and a capacitance C of the microstrip resonator produce a resonance frequency of ½π√LC, and ¼ of an equivalent wavelength of the resonance frequency is larger than a distance between the negative resistance device and the resistance device of the low-impedance circuit via the strip conductor, is provided.

An oscillator module includes a first MOS transistor and a capacitor. The capacitor is coupled between a gate and source of the first MOS transistor. The drain of the first MOS transistor receives a first bias current and generates an oscillating output signal. A switching circuit operates in response to the oscillating output signal to selective charge and discharge the capacitor. A current sourcing circuit is configured to generate the bias current. The current sourcing circuit includes a second MOS transistor which has an identical layout to the first MOS transistor and receives a second bias current. A resistor is coupled between a gate and source of the second MOS transistor. The current sourcing circuit further includes a current mirror having an input configured to receive a reference current passing through the resistor and generate the first and second bias currents.

An oscillation device is provided. The oscillation device includes: a main circuit portion, a heating unit, first and second crystal units, first and second oscillator circuits, a frequency difference detector, a first addition unit, an integration circuit unit, a circuit unit configured to control an electric power to be supplied to the heating unit, a compensation value obtaining unit, and a second addition unit. The compensation value obtaining unit is configured to obtain a frequency compensation value for compensating an output frequency of the main circuit portion based on an integrated value output from the integration circuit unit, and based on a change in the clock signal due to a difference between the temperature of the atmosphere and the temperature setting value of the heating unit. The second addition unit is configured to add the frequency compensation value to a frequency setting value.

An integrated structure of compound semiconductor devices is disclosed. The integrated structure comprises from bottom to top a substrate, a first epitaxial layer, an etching-stop layer, a second epitaxial layer, a sub-collector layer, a collector layer, a base layer, and an emitter layer, in which the first epitaxial layer is a p-type doped layer, the second epitaxial layer is an n-type graded doping layer with a gradually increased or decreased doping concentration, and the sub-collector layer is an n-type doped layer. The integrated structure can be used to form an HBT, a varactor, or an MESFET.

Systems and methods for switching impedance are provided. In some aspects, a system includes first and second impedance elements and an impedance switch module, which includes a third impedance element coupled between the first and second impedance elements and a switch parallel to the third impedance element. The switch is coupled between the first and second impedance elements, and is configured to switch between an open configuration and a closed configuration. An electrical path is completed between the first impedance element and the second impedance element via the first switch in the closed configuration. The electrical path is not completed in the open configuration. A total impedance of the first impedance element, the second impedance element, and the impedance switch module is varied based on the switching between the open configuration and the closed configuration.

The present invention proposes a digital system and method of measuring (estimating) non-energy parameters of the signal (phase, frequency and frequency rate) received in additive mixture with Gaussian noise. The first embodiment of the measuring system consists of a PLL system tracking variable signal frequency, a block of NCO full phase computation (OFPC), a block of signal phase primary estimation (SPPE) and a first type adaptive filter filtering the signal from the output of SPPE. The second embodiment of the invention has no block SPPE, and NCO full phase is fed to the input of a second type adaptive filter. The present invention can be used in receivers of various navigation systems, such as GPS, GLONASS and GALILEO, which provide precise measurements of signal phase at different rates of frequency change, as well as systems using digital PLLs for speed measurements.

A method, an apparatus, and a computer program product are provided. The apparatus tunes a frequency provided by a VCO. The apparatus determines a relative capacitance change associated with a first frequency and a desired frequency from a look-up table. The apparatus adjusts a capacitor circuit in the VCO based on the determined relative capacitance change determined from the look-up table in order to tune from the first frequency to the desired frequency. The apparatus determines that the frequency provided by the VCO is a second frequency different than the desired frequency after adjusting the capacitor circuit. The apparatus performs an iterative search to further adjust the capacitor circuit when a difference between the second frequency and the desired frequency is greater than a threshold.

A crystal-less clock generator (CLCG) and an operation method thereof are provided. The CLCG includes a first oscillation circuit, a second oscillation circuit, and a control circuit. The first oscillation circuit is controlled by a control signal for generating an output clock signal of the CLCG. The second oscillation circuit generates a reference clock signal. The control circuit is coupled to the first oscillation circuit for receiving the output clock signal and coupled to the second oscillation circuit for receiving the reference clock signal. The control circuit is used to generate the control signal for the first oscillation circuit according to the relationship between the output clock signal and the reference clock signal.

A system is disclosed for a voltage controlled oscillator (“VCO”) having a large frequency range and a low gain. Passive or active circuitry is introduced between at least one VCO cell in the voltage controlled oscillator and the voltage source for the VCO cell which reduces a gain value for the VCO to maintain stability of the system.

An oscillator includes: a piezoelectric material to vibrate; a first inverting amplifier; a second inverting amplifier; a first output electrode to apply an output signal of the first inverting amplifier to the piezoelectric material; a second output electrode to apply an output signal of the second inverting amplifier to the piezoelectric material; a first input electrode to receive a voltage signal generated by the piezoelectric material and output the voltage signal to the first inverting amplifier; and a second input electrode to receive the voltage signal and output the voltage signal to the second inverting amplifier, wherein the first and second output electrodes are coupled to the piezoelectric material so that faces of the piezoelectric material move in opposite directions, and the first and second input electrodes are coupled to the piezoelectric material so that the voltage signals are input to the first and second input electrodes.

An injection locking oscillator (ILO) comprising a tank circuit having a digitally controlled capacitor bank, a cross-coupled differential transistor pair coupled to the tank circuit, at least one signal injection node, and at least one output node configured to provide an injection locked output signal; a digitally controlled injection-ratio circuit having an injection output coupled to the at least one signal injection node, configured to accept an input signal and to generate an adjustable injection signal applied to the at least one injection node; and, an ILO controller connected to the capacitor bank and the injection-ratio circuit configured to apply a control signal to the capacitor bank to adjust a resonant frequency of the tank circuit and to apply a control signal to the injection-ratio circuit to adjust a signal injection ratio.

The invention relates to a method for operating control equipment (1) of a resonance circuit (2), wherein the control equipment (1) comprises at least two circuit elements (8, 9) connected in series, in particular each comprising a recovery diode (13, 14) connected in parallel, between which a connection (6) of the resonance circuit (2) is connected. According to the invention, the circuit elements (8, 9) are actuated as a function of the voltage detected at the connection (6). The invention further relates to control equipment (1) of a resonance circuit (2).

Embodiments of the present invention provide a temperature compensation method and a crystal oscillator, where the crystal oscillator includes a crystal oscillation circuit unit, a temperature sensor unit, an oscillation controlling unit, a relative temperature calculating unit, and a temperature compensating unit. The temperature sensor unit measures a measured temperature of the crystal oscillation circuit unit; the relative temperature calculating unit obtains a temperature difference between the measured temperature and a reference temperature; the temperature compensating unit obtains a temperature compensation value corresponding to the temperature difference from a temperature-frequency curve; and the oscillation controlling unit generates a frequency control signal, according to a frequency tracked by a communications AFC device and the temperature compensation value, thereby controlling a frequency of the crystal oscillation circuit unit to work on the tracked frequency.

Various techniques for generating an output clock based on a reference clock. This disclosure relates to generating an output clock signal based on a reference clock signal. In one embodiment, a method includes generating, using information received from a control circuit, an output clock signal using both a first number of edges or an input clock signal and a second, different number of edges of the input clock signal. In this embodiment, the control circuit runs at a frequency that is less than a frequency of the input clock signal. The received information may indicate, for a pulse of the output clock signal, whether the pulse should be generated using the first number of edges or the second number of edges. In some cases, the second number of edges may be the first number of edges plus one. The first and second number of edges may be programmable quantities.

Disclosed are a phase locked loop (PLL) of a digital scheme and a method thereof. More specifically, disclosed are a digital phase locked loop having a time-to-digital converter (TDC), a digital loop filter (DLF), and a digitally controlled oscillator (DCO), and that is designed to have a constant jitter characteristic at all times even though an operating condition of a circuit varies according to a process, voltage, temperature (PVT) change, and a method thereof.

A current output control device is provided that includes: a current cell array section including plural current cell circuits that are each connected in parallel between a first terminal (power source) and a second terminal (ground) that connect between the first terminal and the second terminal in by operation ON so as to increase control current flowing between the first terminal and the second terminal; and a code conversion section (decoder) that generates signals (row codes, column codes) to ON/OFF control current cells so as to change the number of current cells that connect the first terminal and the second terminal according to change in an externally input code and that inputs the generated signals to the current cell array section.

This invention discloses a crystal oscillator, in which by appropriately designing the gain of an amplifier to achieve high trans-conductance and low power consumption. This crystal oscillator includes a first pad, coupled to a first node of a crystal, for receiving a crystal oscillating signal outputted from the crystal; an amplifier, coupled to the first pad, for amplifying the crystal oscillating signal to generate an amplifying signal; an inverter, coupled to the amplifier, for inverting the amplifying signal; and a second pad, coupled to a second node of the crystal, for outputting an oscillating signal to the crystal.

A ring oscillator circuit causing a pulse signal to circulate around a circle to which an even number of inverting circuits are connected in a ring, wherein one of the inverting circuits is a first starting inverting circuit, which drives a first pulse signal according to a control signal, another of the inverting circuits is a second starting inverting circuit, which drives a second pulse signal based on a leading edge of the first pulse signal, still another is a third starting inverting circuit, which drives a third pulse signal based on the leading edge of the first pulse signal after the second pulse signal is driven, and the first to third starting inverting circuits are arranged within the circle of the inverting circuits in order of the third, second, and first pulse signals in traveling directions of the pulse signals.

An integrated oscillator circuit comprises an oscillator configured to be switched between a first frequency and a second frequency. A switching circuit receives an input representing a target frequency and switches the oscillator between the first and second frequencies at intervals determined by the input, so as to cause the average output frequency of the oscillator to approximate the target frequency.

A ring-oscillator-based on-chip sensor (OCS) includes a substrate having a semiconductor surface upon which the OCS is formed. The OCS includes an odd number of digital logic stages formed in and on the semiconductor surface including a first stage and a last stage each including at least one NOR gate including a first gate stack and/or a NAND gate including a second gate stack. A feedback connection is from an output of the last stage to an input of the first stage. At least one discharge path including at least a first p-channel metal-oxide semiconductor (PMOS) device is coupled between the first gate stack and a ground pad, and/or at least one charge path including at least a first n-channel metal-oxide semiconductor (NMOS) device is coupled between the second gate stack a power supply pad.

The switching element is provided in a state of being electromagnetically coupled to the cavity resonator of the high frequency oscillator; the bias voltage applying terminal is connected to one electrode of the switching element; another electrode of the switching element is electrically connected to the cavity resonator (the anode shell in FIG. 1); the metal plate having a size enough for reflecting an electric wave to be transmitted before and after the switching element in a high-frequency manner is provided at any one end of the switching element; and by applying a bias voltage to the switching element and varying that, a reactance of the switching element is changed and a resonance frequency of the cavity resonator is varied. By this method, an oscillation frequency can be varied greatly relative to a small change in a bias voltage.

An enhanced negative resistance voltage controlled oscillator (VCO) circuit is provided, in which a parallel connection of a capacitor and a resistor configured to provide frequency-dependent transconductance is present across source nodes of a first pair of field effect transistors in which gate nodes and drain nodes are cross-coupled. The source nodes of the first pair of field effect transistors are electrically shorted to drain nodes of a second pair of field effect transistors of which the gate nodes are electrically shorted to the gate nodes of the first pair of field effect transistors. The parallel connection of the capacitor and the resistor includes a parallel connection of a capacitor and a resistor such that the net transconductance of the first pair of field effect transistors is less at low frequencies where thermal noise and flicker noise are dominant part of the phase noise than at the operational frequency range.

A vibration element includes a piezoelectric substrate including a vibrating section and a thick section having a thickness larger than that of the vibrating section. The thick section includes a first thick section provided along a first outer edge of the vibrating section, a second thick section provided along a second outer edge, and a third thick section provided along another first outer edge. An inclined outer edge section that intersects with each of an X axis and a Z' axis is provided in a tip section of the piezoelectric substrate.

Arrays of resonator sensors include an active wafer array comprising a plurality of active wafers, a first end cap array coupled to a first side of the active wafer array, and a second end cap array coupled to a second side of the active wafer array. Thickness shear mode resonator sensors may include an active wafer coupled to a first end cap and a second end cap. Methods of forming a plurality of resonator sensors include forming a plurality of active wafer locations and separating the active wafer locations to form a plurality of discrete resonator sensors. Thickness shear mode resonator sensors may be produced by such methods.

A crystal controlled oscillator includes a crystal package and an IC chip board that includes an IC chip integrating an oscillator circuit. The crystal package includes a first container, a crystal resonator, a lid body, and an external terminal at an outer bottom surface of the first bottom wall layer of the first container. The IC chip integrates an oscillator circuit disposed at an outer bottom surface of the first bottom wall layer of the crystal package. The oscillator circuit connects to the lower side excitation electrode of the crystal resonator from the external terminal to an input side with high impedance. The oscillator circuit connects to the upper side excitation electrode to an output side with low impedance. The upper side excitation electrode is a shielding electrode of the crystal resonator.

An apparatus is disclosed that includes a first cross-coupled transistor pair, a second cross-coupled transistor pair, at least one capacitance unit, and an inductive unit. The first cross-coupled transistor pair and second cross-coupled transistor pair are coupled to a pair of first output nodes and a pair of second output nodes, respectively. The at least one capacitance unit is coupled to at least one of the pair of first output nodes and the pair of second output nodes. The inductive unit is coupled to the first cross-coupled transistor pair at the first output nodes and coupled to the second cross-coupled transistor pair at the second output nodes. The inductive unit generates mutual magnetic coupling between one of the first output nodes and one of the second output nodes and between the other of the first output nodes and the other of the second output nodes.

An electronic oscillator circuit has a first oscillator, for supplying a first oscillation signal, a second oscillator, for supplying a second oscillation signal, a first controller for delivering the first control signal as a function of a phase difference between a first controller input and a second controller input of the first controller; a second controller for delivering the second control signal as a function of a phase difference between a first controller input of the second controller and a second controller input of the second controller; a resonator; at least a second resonance frequency, with a first phase shift dependent on the difference between the frequency of a second exciting signal and the second resonance frequency and processing means, for receiving the first oscillator signal and the second oscillator signal, determining their mutual proportion, looking up a frequency compensation factor in a prestored table and outputting a compensated oscillation signal.

A circuit includes first and second transconductance stages that generate first and second currents, respectively, in response to an input signal. A current combiner circuit selectively couples the first current to a first output, selectively couples the second current to the first output, selectively couples the first current to a second output, and selectively couples the second current to the second output. In response to the first current being coupled to both the first and second outputs, the current combiner circuit couples the second current to both the first and second outputs. In response to the first current being decoupled from the second output, the current combiner circuit decouples the second current from both the first and second outputs. In response to the first current being decoupled from the first output, the current combiner circuit decouples the second current from both the first and second outputs.

A solenoid actuator comprising an armature member that engages a spool including a spool cap on an end of the spool that is axially movable relative to the spool. A bore in the spool allows fluid to flow from a control port to the spool cap, such that pressure is established in the spool cap. The pressure established in the spool cap acts on the spool with a force directly proportional to the control pressure and the fluid-contacting area inside the spool cap.

This invention relates to a novel rotary control valve with new joint methods and flow control mechanisms, inline-reparability and fully metal seals more particularly to a triple offset butterfly valve or ball valve with those features used for on-off and flow controlling under multiple extreme conditions or in severe services; such as the integrated gasification combined cycle under high temperature and pressure, Fluid Catalytic Cracking under high temperature over 1200 F with hard diamond like catalytic particles, shale fracking process under extreme high pressure and high velocity fluid with solid particles and corrosive additives and other critical applications for products life lasting 5 to 30 years like deepsea flow control systems and nuclear power plants and for the applications of millions cycles like jet or rocket turbine engine fuel delivery systems with high velocity fuel fluid mixed with highly oxidative gas under temperature 1365 F.

A solenoid valve includes a plunger, an actuating device, and an air tap assembly. The plunger is connected to the actuating device. The air tap assembly is secured to the actuating device and has a cavity. The air tap assembly includes a main body, and first and second tubes. The first tube protrudes from the main body and defines a first through hole. The main body defines a second through hole communicated with the first through hole and the cavity. The second tube defines a third through hole. The main body defines a fourth through hole extended from the third through hole and a fifth through hole extended from the fourth through hole to the cavity. The fifth and second through holes are parallel. The plunger head is used to seal the second and fifth through holes.

An assembly structure of an electronic control unit and a coil assembly of a solenoid valve for an electronic brake system connected to the electronic control unit having a printed circuit board and applying power to the solenoid valve. The coil assembly is penetrated to allow an upper portion of the solenoid valve to be fitted thereinto, and includes a cylindrical bobbin provided with a coil and a coil case. The electronic control unit is provided with a housing having an insertion groove and joined to the hydraulic control unit, the printed circuit board being disposed spaced apart from the coil assembly, and the housing is provided with an elastic member having one end contacting the printed circuit board and the other end contacting the coil case. The elastic member is configured with a coil spring to produce different elastic forces.

A butterfly valve (100) is provided. The butterfly valve (100) includes a valve body (103) including a valve bore (109) passing through the valve body (103), with the valve bore (109) including an upstream valve bore portion (109U) and a downstream valve bore portion (109D), a shaft bore (112), a valve shaft (121) located in the shaft bore (112) and extending substantially across the valve bore (109), and a valve flap (107) affixed to the valve shaft (121) and configured to be rotated by the valve shaft (121). The valve flap (107) is configured to rotate between a closed orientation blocking the valve bore (109) and an open orientation. The valve flap (107) is affixed on an upstream valve bore portion side of the valve shaft (121), wherein incoming fluid presses the valve flap (107) against the valve shaft (121).

The invention provides a hard seal plug valve, comprising a valve body, wherein a tapered plug is arranged in the valve body, a bonnet is arranged at an upper part of the valve body, a drive valve rod penetrates the bonnet, an elastic hold-down mechanism is sheathed on the drive valve rod and arranged on a plug bearing seat, the plug bearing seat is connected with the tapered plug, and the plug bearing seat is held down when the elastic hold-down mechanism extends; and the hard seal plug valve characterized in that a telescopic mechanism is sheathed on the drive valve rod, the plug bearing seat is pushed upward when the telescopic mechanism extends, a valve rod bearing seat is arranged at the bottom of the drive valve rod, ends of the valve rod bearing seat pass through a planetary reduction mechanism, and the tapered plug is connected with the planetary reduction mechanism and rotates with the drive valve rod by the planetary reduction mechanism. In the invention, the tapered plug can reliably float and rotate under any circumstances. The drive torque of the plug valve is at least 7 times less than that of a general plug valve, therefore, when a motor is used, a general valve requires 2 minutes from opening to closing, and the valve of the invention only requires 3.8 seconds.

A ball valve which can suppress the increasing of processing labor time and reliably prevent simultaneous rotation of a ball seat and a ball when the ball is rotated by handle manipulation is provided. The valve body 2 is formed of a hard material such as stainless steel, the ball seat is formed of a relatively soft material such as a fluorine resin, and a protrusion 18 is formed on a ball seat support surface 13 of the valve body 2 made of a hard material so as to bite into the ball seat 4.