Provided is a nut into which a bolt (10) including a male-threaded portion with a male-threaded external diameter d and a male-threaded core diameter d1 is screwed, wherein a bolt insertion side end of a female-threaded portion (21) formed in a nut body (20) is provided with an incompletely threaded female portion (22) that is formed by one to three pitches so that an internal diameter dimension D is larger than (d+d1)/2 and is smaller than the male-threaded external diameter d. Accordingly, even when the bolt is screwed into the nut in the inclination direction, the bolt may be rotated about a contact surface with respect to the incompletely threaded female portion (22), and hence seizing may be prevented.

A vibration-isolating screw is disclosed. The vibration-isolating screw includes a screw head and a screw tail portion. The screw head includes a first screw body, a first magnetic element, a second screw body, a second magnetic element, a third screw body and a third magnetic element. The first magnetic element and the second magnetic element are mounted on the first screw body and the second screw body, respectively. The third screw body is mounted between the first screw body and the second screw body. The third magnetic element comprises a first end and a second end and is mounted on the third screw body. The first end and the first magnetic element are adjacent and mutual repulsion. The second end and the second magnetic element are adjacent and mutual repulsion. The screw tail portion is connected with the second screw body.

A fastener for attaching objects to channeled members wherein the objects have a hole extending therethrough and the channeled members have a longitudinal slot formed between projecting longitudinal walls. The fastener includes a button and a retainer. The button includes an abutment wall, an abutment surface and an axially extending slot. The retainer includes an engagement boss and a head at opposite ends of shaft. The retainer extends through the button slot. For attaching the object, the button extends through the object hole with the abutment wall adjacent the object and the abutment surface adjacent the channeled member. The retainer boss and part of the shaft extend through the longitudinal slot. The retainer is rotated for engaging the longitudinal walls with the boss. The longitudinal walls are sandwiched between the boss and the button abutment surface and the object is sandwiched between the channeled member and the button abutment wall.

A showerhead electrode is provided where backside inserts are positioned in backside recesses formed along the backside of the electrode. The backside inserts comprise a tool engaging portion. The tool engaging portion is formed such that the backside insert further comprises one or more lateral shielding portions between the tool engaging portion and the threaded outside diameter to prevent a tool engaged with the tool engaging portion of the backside insert from extending beyond the threaded outside diameter of the insert. Further, the tool engaging portion of the backside insert comprises a plurality of torque-receiving slots arranged about the axis of rotation of the backside insert. The torque-receiving slots are arranged to avoid on-axis rotation of the backside insert via opposing pairs of torque-receiving slots.

A method and apparatus for an insulating cover for fasteners. In one advantageous embodiment, an apparatus comprises a washer and a cover. The washer is capable of receiving a fastener. The cover is capable of being secured to the insulating washer, wherein an insulating volume is created with the cover secured to the washer.

A protrusion anchor assembly is provided that utilizes a plurality of extendable pins to secure the anchor body within a bore in any hard material, such as concrete. The anchor body is rotated within the bore while the pins are simultaneously and gradually extended, carving out a groove or grooves within which the pins can sit. After installation, the device is secured within the bore by tightening a jamb nut against the surface of the concrete wall and in some embodiments placing a security plug within the anchor body to ensure that the pins are held in place. The pins prevent the anchor from being withdrawn because they act as protuberances that catch against the edges of the groove and cannot be drawn past that point.

A device for joining a plastic part to a second part with an insert adapted to thread into the plastic part. The insert includes a longitudinal body with outer threads, a hole in the longitudinal body with female threads, and an annular flange. Protrusions and recesses on the bottom of the annular flange alternate in a radial pattern. The insert is threaded into an opening in the plastic part. The protrusions and recesses of the insert interact with the plastic part to resist over rotation of the insert. The opening in the plastic part may include a hole and a counter bore portion. The counter bore includes protrusions and recesses. The protrusions and recesses alternate in a radial pattern. When the insert is threaded into the opening, the protrusions and recesses of the insert interact with the protrusions and recesses of the plastic part and resist over rotation.

A nut assembly and a holddown assembly using the nut assembly are described, including methods of manufacture and assembly. The nut assembly may include a body portion having first and second openings with an internal wall extending between them. A rotation-inhibiting wall may be included between the first and second openings. A nut portion configured to move axially within the internal wall of the body portion includes structures for co-acting with a rotation-inhibiting wall to limit or prevent rotation of the body portion and the nut portion relative to each other. A nut portion and a body portion extending around the nut portion have limited axial movement relative to each other due to axial engagement between adjacent surfaces on the nut portion and the body portion.

A system and method for positioning a tool. The system includes a base member configured to contact a first decking member and a second decking member; at least one base guide including a first end and an opposing second end, the first end coupled to the base member, the at least one base guide configured to position the base member relative to the first decking member and the second decking member; and an adjustable section coupled to the base member, the adjustable section configured to allow adjustment of at least one of a position and an angle of the tool relative to the base member. The system further includes a fastener configured to secure the first and/or second decking members to a joist.

An improved retention pin assembly and method of forming a pin assembly that uses a melt in a pocket without a metallurgical joint having been formed. The assembly can be generated by a method of forming a joint which includes providing a metal shaft and a member that is operable to receive the shaft. A pocket is formed within the member which operates to receive a melt pool. Next the shaft is inserted into apertures in the member. A welding or melting operation is then performed to create a melted portion that occupies the pocket. A joint is created using a retention pin.

In a mobile terminal having a security function, both convenience and security protection are realized so as to prevent a user from feeling bothersome. A mobile phone has an operation control unit which sets the operation of various functions of the mobile terminal to be unusable at any timing. When a used state determination unit determines that the mobile phone is not in an abnormal state and not left, the operation control unit controls operation of the various functions to maintain usable states.

An assembly includes a threaded hole, a threaded fastener, and a locking compound. The threaded fastener is positioned in the threaded hole with a portion of fastener threads mated with a corresponding portion of hole threads. The locking compound is between the mated fastener threads and hole threads. The locking compound includes an aluminum pigmented compound suspended in a water-based inorganic binder.

Panel fasteners, panel assemblies, methods of assembly and installation of panel assemblies and panel fasteners, anchor systems, anchor systems with captive fasteners and assemblies are disclosed.

Decorative toilet bolt caps having and elongated tube positioned above an aperture are disclosed. The cap may be formed of a single unit of material. By virtue of having an elongated tube positioned above an aperture, the cap may cover a closet bolt having an unreduced length.

A round rod guide (10) for mounting a stud bolt attached to a container side includes a plastic body, the stud bolt shaft (30) of the stud bolt being insertable onto and attachable to the plastic body. The plastic body has in its interior a channel (35) for receiving the stud bolt shaft (30) and on its free end, a receiving opening (19) for insertion of a round rod. The plastic body is formed as two parts with a first, cup-shaped base part (11) and with a second insertion part (16) insertable into the cup-shaped base part (11) in at least two different insertion positions that are rotated relative to one another at a predetermined angle. The receiving opening (19) for the round rod and the channel (35) for receiving the stud bolt shaft (30) and for attaching the round rod guide (10) are formed on the insertion part (16), whereby the receiving opening (10) formed in the insertion part (16), when the insertion part (16) is inserted in the base part (11) in the first insertion position, has a different spacing to the foot of the stud bolt shaft (30) than when in the second insertion position.

A balanced snap ring and method of making a balanced snap ring is disclosed. The snap ring has a circular shape wherein the circular shape has a circumference. The snap ring has a body section and a protrusion extending axially from the body section. The protrusion is formed partially around the circumference. Additionally, a transmission with a balanced snap ring is disclosed.

A threaded connector for securing a panel member to a structure and for adjusting the position of the panel member relative to the structure. The connector comprises an elongate one-piece stud, a first spacer, a threaded nut, a second spacer and a turning formation. The connector permits the panel member to be mounted on the stud and the stud to be rotated to adjust the position of the panel member relative to the structure.

A connecting arrangement is provided between a plastic component with at least two mutually adjacent and at least approximately parallel walls and another structural element, having at least one force-transmission element which is adhesively bonded to the plastic component via an adhesive bond on the plastic component in frusto-conical or spherical-segment-shaped depressions in the mutually adjacent walls of the plastic component. The force-transmission element has a carrying structure for the other structural element. With the exception of a possibly provided coating, the force-transmission element is composed only of metallic material and has a plate which is adapted to the depression in the outer wall of the plastic component, which outer wall is adjacent to the other structural element. The edge of the plate rests with interposition on the outer wall in the surrounding region of the depression, wherein the plate is connected via a web to an end section of the force-transmission element, which end section is adapted to the depression in the other inner wall of the plastic component. The depression is configured in the outer wall without a bottom to such an extent that the end section of the force-transmission element can be inserted through the outer wall into the recess of the inner wall.

A method and an anchor for supporting items on a substrate such as drywall. The anchor comprises a structure configured to carry the anchoring element in a minimal cross section configuration through an insertion hole and to effect a first expansion. The anchor further comprises an adjustable cap member configured to be moved to fixedly position the anchoring element to the non-accessible side of the substrate. The anchoring element comprises a base channel member, a top channel member, and a connector-pivoting element configured to pivotally connect the top channel member to the base channel member. The top channel member is configured to be nested with the base channel member in the minimal cross section configuration and to be pivotally rotatable via the connector pivoting element in the plane parallel to the non-accessible side of the wall, with the pivotal rotation of the top channel member providing the second expansion.

In a driving circuit, one output circuit has a scanning signal line, a first transistor which controls electrical connection between the scanning signal line and a clock signal line which has a gate connected to a first node, the first node which is at an active potential in a first time period including a time period during which the active potential is output to the scanning signal line, a second transistor which electrically connects the first node and an inactive signal line which has a potential to open the transistor in a second time period other than the first time period, and the second transistor has a gate connected to a second node, wherein the second node has two kinds of timings to be charged for retaining the active potential.

A display panel has an amorphous silicon gate driver. A variable capacitor is formed at one end of a gate line to prevent the deterioration of display quality due to high temperature noise. A predetermined level of capacitance is provided to the variable capacitor to the reduce ripple of gate voltage and eliminate the high temperature noise.

A shift register and driving method thereof, a gate driving apparatus and a display apparatus, the shift register comprises a pulling-up unit(21), a precharging and resetting unit(22), an output signal terminal at present stage(OUTPUT), a pulling-down unit(23), an input terminal connected to an output signal terminal of a shift register at previous stage(OUTF), an input terminal connected to an output signal terminal of a shift register at next stage(OUTL), and a scan control signal input terminal(INPUT), wherein: the precharging and resetting unit(22) precharges a gate of a first thin film transistor(T1) included in the pulling-up unit(21) and resets its potential; the pulling-down unit(23) pulls down a potential at the gate of the first thin film transistor(T1) and the output signal at present stage after the precharging and resetting unit(22) resets the potential at the gate of the first thin film transistor(T1), so that the pulling-up unit(21) is turned off and the output signal at present stage is at a low level. The present shift register realizes a bidirectional gate driving scan from up to down or from down to up by a conversion control for high-low levels of input signals.

Various structures and methods are disclosed related to configurable scrambling circuitry. Embodiments can be configured to support one of a plurality of protocols. Some embodiments relate to a configurable multilane scrambler that can be adapted either to combine scrambling circuits across a plurality of lanes or to provide independent lane-based scramblers. Some embodiments are configurable to select a scrambler type. Some embodiments are configurable to adapt to one of a plurality of protocol-specific scrambling polynomials. Some embodiments relate to selecting between least significant bit (“LSB”) and most significant bit (“MSB”) ordering of data. In some embodiments, scrambler circuits in each lane are adapted to handle data that is more than one bit wide.

A display panel drive circuit includes a shift register constructed of unit circuits connected in stages. The unit circuits generate signal line selection signals, respectively, which signal line selection signals are made active for a respective certain period of time to form a respective pulse, and the pulses are outputted successively from respective unit circuits in order of ordinal number starting from a first stage until an end stage. In at least one embodiment, each of the unit circuits receive (i) clock signals generated based on a sync signal received from outside of the display panel drive circuit, (ii) a start pulse signal generated based on the sync signal, or a signal line selection signal generated in a stage different from its own stage, and (iii) a clear signal. The clear signal is made active in a case where anomalousness is included in the sync signal, and no pulse is outputted from the shift register until a subsequent vertical scanning period starts. This configuration achieves a display panel drive circuit which prevents display disorder or holds down increase in load given to a power source, each of which occurs in a case where anomalousness is included in the sync signal.

A scan driving apparatus includes a plurality of sequentially arranged scan driving blocks, each including: a first node configured to receive a first clock signal; a second node configured to receive an input signal according to a second clock signal input; a first transistor having a gate electrode coupled to the first node, a first electrode configured to receive a power source voltage, and a second electrode coupled to an output terminal; and a second transistor having a gate electrode coupled to the second node, a first electrode for receiving a third clock signal, and a second electrode coupled to the output terminal. Each scan driving block is configured to receive the first, second, and third clock signals as a corresponding three clock signals among four clock signals sequentially shifted by a first period, and to output the third clock signal by being synchronized with the input signal.

A stage circuit and a scan driver using the same that is capable of concurrently (e.g., simultaneously) or progressively supplying a scan signal to a plurality of scan lines. The stage circuit includes a progressive driver and a concurrent driver.

Methods, systems and devices are provided for displaying monitored activity data in substantial real-time on a screen of a computing device. One example method includes capturing motion data associated with activity of a user via an activity tracking device. The motion data is quantified into a plurality of metrics associated with the activity of the user. The method includes connecting the activity tracking device with a computing device over a wireless data connection, and sending motion data from the activity tracking device to the computing device for display of one or more of the plurality of metrics on a graphical user interface of the computing device. At least one of the plurality of metrics displayed on the graphical user interface is shown to change in substantial real-time based on the motion data.

A scanning circuit, comprising first signal lines, second signal lines, third signal lines, a drive unit configured to drive the first signal lines, first buffers configured to drive the second signal lines in accordance with signals of the first signal lines, second buffers configured to drive the third signal lines in accordance with the signals of the first signal lines, and a shift register having a first part to be driven by signals of the second signal lines and a second part to be driven by signals of the third signal lines, wherein the first to third signal lines include two signal lines arranged in parallel to each other and configured to transmit the in-phase signals.

A counter is provided, where, as the number of events that occur increases, the frequency in which the events are counted is scaled.

A shift register, comprising a plurality of shift register sub-units connected in cascade, each of the plurality of shift register sub-units comprising first to third TFTs, an eleventh TFT, a first capacitor and a first reset control module for controlling the second TFT to be turned on or off. Besides the shift register sub-unit at a first stage, for each of the shift register sub-units at other stages, the second TFT gate control terminal thereof is connected to the third TFT gate control terminal of the shift register sub-unit at a previous stage. Accordingly, a gate driving circuit comprising the shift register and a display comprising the gate driving circuit are provided. Compared with the prior art, reliability of the shift register is highly improved and area occupied by the shift register is smaller.

A wearable device has a carrier having an aperture. A device has a USB connection and a protrusion wherein the protrusion is received in the aperture to connect the device to a wristband. The device is a USB type device having athletic functionality. The device may further be configured to receive calibration data such that a measured distance may be converted to a known distance based on athletic activity performed by a user.

A shift register includes a plurality of stages of unit circuits each including a flip-flop. Each of the unit circuits generates, by obtaining a sync signal in accordance with an output from the flip-flop, an output signal. The flip-flop includes a first switch and a second switch and a latch circuit for latching a signal supplied thereto and outputting the signal as the output from the flip-flop. A first shift direction signal is supplied to the latch circuit via the first switch, and the second shift direction signal is supplied to the latch circuit via the second switch. In each unit circuit other than those of the first and last stages, an output signal from a previous stage is supplied to a control terminal of the first switch, and an output signal from a subsequent stage is supplied to a control terminal of the second switch.

A shift register of a gate driving circuit includes a pull-up unit for pulling up a first output signal and a first gate signal to a high voltage level according to a driving voltage and a high-frequency clock signal, a start-up unit for transmitting a second gate signal, an energy-store unit for providing the driving voltage to the pull-up unit according to the second gate signal, a first discharging unit for pulling down the driving voltage to a first voltage level according to a first control signal, a first leakage-preventing unit for turning off the first discharging unit when the first gate signal reaches the high voltage level, a first pull-down unit for respectively pulling down the first output and first gate signals to the first and a second voltage levels according to the first control signal, and a first control unit for generating the first control signal.

Methods, devices and system are provided. One method includes capturing activity data associated with activity of a user via a device. The activity data is captured over time, and the activity data is quantifiable by a plurality of metrics. The method includes storing the activity data in storage of the device and, from time to time, connecting the device with a computing device over a wireless communication link. The method defines using a first transfer rate for transferring activity data captured and stored over a period of time. The first transfer rate is used following startup of an activity tracking application on the computing device The method also defines using a second transfer rate for transferring activity data from the device to the computing device for display of the activity data in substantial-real time on the computing device.

A counter includes a buffer unit and a ripple counter. The buffer unit generates at least one least significant signal of a count by buffering at least one clock signal until a termination time point. The ripple counter generates at least one most significant signal of the count by sequentially toggling in response to at least one of the least significant signal. The counter performs multiple data rate counting with enhance operation speed and reduced power consumption.

The present invention provides a shift register unit, a shift register circuit, an array substrate and a display device, and relates to the area of display manufacturing. The time of the bias working on the de-noising transistor can be reduced without affecting the circuit stability, so that the operational lifespan of the device can be extended. A shift register comprises: a capacitor, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a de-noising control model. The present invention is used for manufacturing displays.

A shift register includes cascade-connected stages, each of which includes a data latch and an output stage. In at least one embodiment, the latch has a single data input which, in use, receives a date signal from a preceding or succeeding stage. The output stage includes a first switch, which passes a clock signal to the stage output when the output stage is activated by the latch. The output stage also comprises a second switch, which passes the lower supply voltage to the stage output when the output stage is inactive.

A display device including various portions, circuits and other arrangements for outputting various pulses and triggers, for controlling forward shift and backward shift operations.

A display device includes a first-stage output circuit adapted to perform output to a first-stage output signal line as an endmost output signal line out of a plurality of output signal lines disposed in parallel to each other, and the first-stage output circuit includes a start signal line to which a start signal for applying a conducting potential sequentially to the plurality of output signal lines is applied, a first clock signal line to which a first clock signal is applied, a second clock signal line to which a second clock signal is applied, a first transistor having a source to which the first-stage output signal line is connected, and a drain to which the first clock signal line is connected, and a second transistor having a gate to which the start signal line is connected.

A shift register circuit includes a first shift register string and a second shift register string. The first shift register string is configured to receive a first start signal and output a first-stage control signal. The second shift register string, electrically connected to the first shift register string, is configured to receive the first-stage control signal and a second start signal and output the first pulse of a first-stage scan signal according to the first-stage control signal and the second start signal and consequently output the second pulse of the first-stage scan signal according to the second start signal; wherein the first and second pulses are configured to have different pulse widths. A driving method of a shift register circuit is also provided.

A reset circuit for Gate Driver on Array, an array substrate and a display is used for increasing reliability and long-term stability of a GOA circuit and thus improving performance of the GOA circuit. The GOA reset circuit includes a first electronic switch circuit (301) connected to an input terminal of a GOA unit of the Gate Driver on Array (INPUT); and a second electronic switch circuit connected to an output terminal of the GOA unit (OUTPUT), wherein the first electronic switch circuit (301) is connected to a low level signal terminal and is switched on to connect the low level signal terminal to a reset terminal of the GOA unit (RESET) when the input terminal of the GOA unit (INPUT) is at a high level; and the second electronic switch circuit (302) is connected to a high level signal terminal and is switched on to connect the high level signal terminal to the reset terminal of the GOA unit (RESET) when the output terminal of the GOA unit (OUTPUT) is at a high level.

To suppress malfunctions in a shift register circuit. A shift register having a plurality of flip-flop circuits is provided. The flip-flop circuit includes a transistor 11, a transistor 12, a transistor 13, a transistor 14, and a transistor 15. When the transistor 13 or the transistor 14 is turned on in a non-selection period, the potential of a node A is set, so that the node A is prevented from entering into a floating state.

An n-bit counter is formed from cascading counter sub-modules. The counter includes combinatorial control logic coupled to a lower order counter sub-module. The control logic is arranged to clock gate at least one higher order counter sub-module dependent on a logical combination of outputs of the lower order counter sub-module and where the control logic uses pipelining to store at least one previous control logic output for use in determining a later control logic output.

A method and system for synchronizing the output signal phase of a plurality of frequency divider circuits in a local-oscillator (LO) or clock signal path is disclosed. The LO path includes a plurality of frequency divider circuits and a LO buffer for receiving a LO signal coupled to the plurality of frequency divider circuits. The method and system comprise adding offset voltage and setting predetermined state to each of the frequency divider circuits; and enabling the frequency divider circuits. The method and system includes enabling the LO buffer to provide the LO signal to the frequency divider circuits after they have been enabled. When the LO signal drives each of the frequency divider circuits, each of the frequency divider circuits starts an operation. Finally the method and system comprise removing the offset voltage from each of the frequency divider circuits to allow them to effectively drive other circuits.

A stage constituent circuit of a display device drive circuit includes a first-node to a third-node, a thin-film transistor that changes a potential of a scanning signal toward a VDD potential when a potential of the first-node is in a HIGH level, a thin-film transistor that changes a potential of a different stage control signal toward a potential of a clock when a potential of the second-node is in the HIGH level, a capacitor between the first-node and the second-node, and a capacitor between the second-node and the third-node. The potential of the first-node is raised on the basis of a different stage control signal output from the stage constituent circuit in the different stage, and then the potential of the second-node and a potential of the third-node are sequentially raised. Herein, an amplitude of the clock is set to be smaller than an amplitude of the scanning signal.

To provide a pulse signal output circuit and a shift register which have lower power consumption, are not easily changed over time, and have a longer lifetime. A pulse signal output circuit includes a first input signal generation circuit; a second input signal generation circuit; an output circuit which includes a first transistor and a second transistor and outputs a pulse signal in response to a signal output from the first and second input signal generation circuits; a monitor circuit which obtains the threshold voltages of the first and second transistors; and a power supply output circuit which generates a power supply potential raised by a potential higher than or equal to a potential which is equal to or substantially equal to the threshold voltage and supplies the power supply potential to the first and second input signal generation circuits. A shift register includes the pulse signal output circuit.

Disclosed herein is a shift register circuit that is formed on an insulating substrate with thin film transistors having channels of the same conductivity type and includes shift stages, each of the shift stages including: a first thin film transistor; a second thin film transistor; a 3(1)-th thin film transistor; a 3(2)-th thin film transistor; a 4(1)-th thin film transistor; a 4(2)-th thin film transistor; a fifth thin film transistor; and a sixth thin film transistor.

An active level shift (ALS) driver circuit and a liquid crystal display apparatus including the ALS driver circuit are disclosed. The ALS driver circuit includes an input unit configured to apply a first polarity voltage to a first node and to apply a second polarity voltage to a second node, a level compensation unit configured to adjust the voltages of the first node and the second node, and an output unit configured to alternately output a first power voltage and a second power voltage according to the adjusted voltages of the first and second nodes.

A counter in a non-volatile memory including at least two sub-counters, each counting with a different modulo, an increment of the counter being transferred on a single one of the sub-counters and the sub-counters being incremented sequentially.

An open loop clock divider circuit includes (a) a first divider configured to receive an incoming clock signal and output a first divided clock signal, (b) a flying-adder synthesizer configured to fractionally divide the first divided clock signal and output a fractionally divided clock signal, and (c) a second divider configured to receive the fractionally divided clock signal and output a second divided clock signal. The open loop clock divider circuit advantageously provides a fractional divider in which there is no feedback loop between the source frequency (fs) and the destination frequency (fd). Methods of generating a divided clock signal involving the open loop clock divider circuit are also disclosed.