A differential circuit with a function to compensate unevenness observed in the differential gain thereof is disclosed. The differential circuit provides a low-pass filter in one of the paired transistors not receiving the input signal in addition to another low-pass filter that provides an average of output signals as a reference level of the differential circuit. The cut-off frequency of the filter is preferably set to be equal to the transition frequency at which the self-heating effect explicitly influences the trans-conductance of the transistor.

An amplifier circuit includes an input terminal and an output terminal. A current sinking transistor includes a first conduction terminal coupled to the output terminal and a second conduction terminal coupled to a reference supply node. A voltage sensing circuit has a first input coupled to the input terminal and a second input coupled to the output terminal. An output of the voltage sensing circuit is coupled to the control terminal of the current sinking transistor. The voltage sensing circuit functions to sense a rise in the voltage at the output terminal which exceeds the voltage at the input terminal, and respond thereto by activating the current sinking transistor.

A system for pre-charging a current minor includes a controller configured to provide a first current and an additional current to a current minor to rapidly charge a capacitance associated with the current minor based on a reference voltage or control signals. A power amplifier module includes at least one current minor and a controller. A capacitor is coupled to the current minor. The controller provides a bias current in an amount proportional to an input to a voltage-to-current converter. The controller receives a control signal that directs the controller to apply one of a pre-charge voltage and a nominal voltage to the voltage-to-current converter.

An amplifying structure includes a main amplifier configured to amplify a first signal; and a peak amplifier configured to amplify a second signal, each of the main amplifier and the peak amplifier including, respectively, a hybrid power device, the hybrid power device including, a first power transistor die configured to amplify signals of a first frequency, and a second power transistor die configured to amplify signals of a second frequency different than the first frequency.

A power converter with positive and negative supply rail outputs for feeding a single ended class D amplifier, the converter comprising a transformer arrangement, a supply pump reduction arrangement connected between the secondary windings and the positive and negative supply rail outputs, and a boost drive mode switching arrangement. A controller is adapted to control the power converter in a negate drive mode and a boost drive mode, wherein the output voltage in the boost mode is increased by means of the transformer and the boost drive mode switching arrangement. The output voltages on the positive and negative rails can be generated at two different output voltage levels without changing the duty cycle or dead time of the control signals.

An input receiver circuit including a single-to-differential amplifier and a semiconductor device including the input receiver circuit are disclosed. The input receiver circuit includes a first stage amplifier unit and a second stage amplifier unit. The first stage amplifier unit amplifies a single input signal in a single-to-differential mode to generate a differential output signal, without using a reference voltage. The second stage amplifier unit amplifies the differential output signal in a differential-to-single mode to generate a single output signal.

A TIA circuit and method are provided that merge the automatic gain control function with the bandwidth adjustment function to allow the TIA circuit to operate over a wide dynamic range at multiple data rates. The TIA circuit has an effective resistance that is adjustable for adjusting the gain and the bandwidth of the TIA circuit. The mechanism of the TIA circuit that is used to adjust the effective resistance, and hence the gain and bandwidth of the TIA circuit, is temperature independent, and as such, the performance of the TIA circuit is not affected by temperature variations.

A power combiner/divider having a waveguide, a plurality of amplifiers disposed on a supporting structure, a plurality of probes, each one having a first end electrically coupled to an output of a corresponding one of the plurality of amplifiers and a second end projecting outwardly from the supporting structure and into the waveguide. The probes are disposed in a common region of the waveguide. The region has a common electric field maximum within the waveguide. A first portion of the probes proximate the sidewalls have lengths different from a second portion of the probes disposed in a region distal from the sidewalls of the waveguide. The waveguide is supported by the support structure. The power combiner is a monolithic microwave integrated circuit structure.

The present invention discloses a transmit-receive (TR) front end. The TR front end includes a low-noise amplifier (LNA); a power amplifier (PA); a transformer, coupled to the PA, for increasing a voltage swing and a power transmission of the PA; and a TR switch, coupled between the transformer and the LNA. The LNA is single ended and there is no transformer between the LNA and the TR switch.

An amplifier includes a first input terminal, a second input terminal, a TIA, and a compensation circuit. The TIA includes a first transistor, a second transistor, a first current source connected to the first input terminal and an emitter of the first transistor, a second current source connected to the second input terminal and an emitter of the second transistor, a first load resistor connected to a collector of the first transistor, and a second load resistor connected to a collector of the second transistor. A bias voltage is supplied to bases of the first and second transistors, the compensation circuit adjusts a first load current and a second load current based on voltage signals, and the TIA outputs the voltage signals based on collector voltages of the first and second transistors.

Split amplifiers with configurable gain and linearization circuitry are disclosed. In an exemplary design, an apparatus includes first and second amplifier circuits and a linearization circuit, which may be part of an amplifier. The first and second amplifier circuits are coupled in parallel and to an amplifier input. The linearization circuit is also coupled to the amplifier input. The first and second amplifier circuits are enabled in a high-gain mode. One of the first and second amplifier circuits is enabled in a low-gain mode. The linearization circuit is enabled in the second mode and disabled in the first mode. The amplifier is split into multiple sections. Each section includes an amplifier circuit and is a fraction of the amplifier. High linearly may be obtained using one amplifier circuit and the linearization circuit in the low-gain mode.

Embodiments include systems and methods for accurately controlling gain of a high-speed variable-gain amplifier (VGA) without adversely impacting bandwidth performance. Embodiments include a VGA with a variable resistor, for which resistance is a function of a control level. A gain calibration system controls the control level by using a gain control feedback subsystem to sample outputs of a duplicate VGA, which includes a duplicate variable resistor. The sampled duplicate outputs are compared to a target gain generated by a reference generator. The control level can be fed back to control the gain of the duplicate VGA until the target gain is reached. The control level can also be fed to the actual VGA to control its gain. By performing gain control on the duplicate VGA without interfering with the output signal path of the actual VGA, the actual VGA's gain can be accurately controlled without impacting its bandwidth.

Exemplary embodiments are directed to operating a multi-stage amplifier with low-voltage supply voltages. A multi-stage amplifier may include a first path of an amplifier output stage configured to convey an output signal if a first supply voltage is greater than a threshold voltage. The multi-stage amplifier may also include a second path of the amplifier output stage configured to convey the output signal if the first supply voltage is less than or equal to the threshold voltage.

A variable gain amplifier (100) includes a transistor (110), an FB impedance section (120), a source impedance section (130), a drain impedance section (140), a gain controller (150), and a frequency characteristic controller (160). The gain controller (150) varies impedance of one of the FB impedance section (140), the source impedance section (130), and the drain impedance section (140), and outputs a gain control signal. The frequency characteristic controller (160) varies the impedance of different impedance section, based on the gain control signal.

This disclosure relates generally to radio frequency (RF) amplification devices and methods of limiting an RF signal current. Embodiments of the RF amplification device include an RF amplification circuit and a feedback circuit. The RF amplification circuit is configured to amplify an RF input signal so as to generate an amplified RF signal that provides an RF signal current with a current magnitude. The feedback circuit is used to limit the RF signal current. In particular, a thermal sense element in the feedback circuit is configured to generate a sense current, and thermal conduction from the RF amplification circuit sets a sense current level of the sense current as being indicative of the current magnitude of the RF signal current. To limit the RF signal current, the feedback circuit decreases the current magnitude of the RF signal current in response to the sense current level reaching a trigger current level.

A microwave semiconductor amplifier includes a semiconductor amplifier element, an input matching circuit and an output matching circuit. The semiconductor amplifying element includes an input electrode and an output electrode and has a capacitive output impedance. The input matching circuit is connected to the input electrode. The output matching circuit includes a bonding wire and a first transmission line. The bonding wire includes first and second end portions. The first end portion is connected to the output electrode. The second end portion is connected to one end portion of the first transmission line. A fundamental impedance and a second harmonic impedance seen toward the external load change toward the one end portion. The second harmonic impedance at the one end portion has an inductive reactance. The output matching circuit matches the capacitive output impedance of the semiconductor amplifying element to the fundamental impedance of the external load.

A tunable wide band driver amplifier is disclosed. In an exemplary embodiment, an apparatus includes a first band selection circuit selectively connected between an output terminal of an amplifier and a circuit ground. The first band selection circuit configured to adjust an amplification band from a first frequency band to a second frequency band. The apparatus also includes a first harmonic reduction circuit selectively connected between the first band selection circuit and the circuit ground and configured to reduce 2nd harmonic frequencies associated with the first frequency band when the amplification band is set to the first frequency band.

High impedance, high frequency nanoscale device electronics configured to interface with low impedance loads include an impedance transforming stage constructed of multiple nanoscale devices, such as carbon nanotube field-effect transistors. In an embodiment of the present invention, an impedance transforming output stage of a multistage amplifier is configured to drive a 50 ohm transmission line with unity voltage gain using multiple carbon nanotube field-effect transistors in parallel. In a further embodiment, a receiver provided for an electronically steered receive array is a monolithic, lumped-element system formed from nanoscale devices and configured to interface with the external electrical systems via a single transmission line.

A light emitting apparatus including: a plurality of light emitting elements; a drive circuit including a transistor and a capacitor having one end connected to a gate of the transistor; and a signal supply circuit for receiving a digital gradation signal and outputting an analog voltage signal to the drive circuit, including a computation circuit configured to correct the input digital gradation signal to generate a corrected digital gradation signal, in which the drive circuit is configured to conduct an auto-zero operation which reduce the gate-source voltage of the transistor to a threshold voltage by flowing the drain current to the capacitor, and the computation circuit is configured to generate the corrected digital gradation signal by multiplying a correction coefficient to the input digital gradation signal subtracted by a particular signal common to the plurality of light emitting elements.

An apparatus is described that includes an audio power amplifier having an input and an output. An alternating-current to direct-current power converter is coupled to the audio power amplifier in a single package to supply power to the audio power amplifier.

Disclosed is a technique for reducing noise superimposed on an output signal while keeping loop gain constant without increasing the circuit scale and without changing the transfer function of the amplifier apparatus (frequency characteristics of gain and phase). According to the technique, there are included a power-supply voltage control unit 7 for detecting the amplitude level S9 of an input audio signal S1 and outputting power with a voltage value indicated by target set voltage value information Vs corresponding to this amplitude level S9, and a PWM modulation unit 2 including a PWM converter 23 for converting the pulse width of the input audio signal S1 and a correction unit for correcting the signal modulated by the PWM converter 23. The PWM modulation unit 2 corrects the pulse width of a PWM signal S5 modulated by the PWM converter 23 so that the correction unit will cancel out a change in amplification gain of a power amplification unit 4 according to the target set voltage value information Vs.

Aspects of the disclosure provide a circuit that includes a first circuit, a second circuit, and an adder. The first circuit is configured to generate a first signal by outputting and holding, at a first timing, a first stream in response to an input stream of data. The second circuit is configured to generate a second signal by outputting and holding, at a second timing, a second stream in response to the input stream of data. The adder is configured to add the first signal with the second signal to generate an up-sampled stream for the input stream of data and reduce a frequency component in the up-sampled stream generated by the up-sampling.

A pop-free single-ended output class-D amplifier includes: an input signal generator for generating an input signal; a power supply for supplying input power; a reference voltage generator for generating a reference voltage; a gain-adjustable stage for generating an amplified signal according to the reference voltage and adjusting a gain of the single-ended output class-D amplifier; a pulse width modulation module for outputting a pulse width modulation signal according to the reference voltage, the amplified signal, and the input power; a low-pass filter for low-pass filtering the pulse width modulation signal to generate an output voltage; and a logic controller for generating at least one control signal to control the reference voltage generator, the gain-adjustable stage, and the pulse width modulation module according to the input power, the reference voltage, and the pulse width modulation signal.

An electronic circuit, including, a power amplifier adapted to amplify an RF signal and provide it as output from the integrated circuit; a power source that is adapted to provide an unregulated voltage to the power amplifier; a regulator adapted to provide a regulated bias voltage; a subtracter that is adapted to accept a voltage proportional to the unregulated voltage and subtract it from the bias voltage to provide a reference voltage to the power amplifier; wherein the power amplifier is adapted to use the reference voltage to adjust the output from the power amplifier so that it will provide a stable power output.

Circuitry for reducing power consumption is described. The circuitry includes a power amplifier. The circuitry also includes a predistorter coupled to the power amplifier. The circuitry further includes a power supply coupled to the power amplifier. The circuitry additionally includes a controller coupled to the power amplifier, to the predistorter and to the power supply. The controller captures a transmit signal and a feedback signal concurrently and determines a minimum bias voltage from a set of voltages and a predistortion that enable the power amplifier to produce an amplified transmit signal in accordance with a requirement.

Differential amplifier circuits for LDMOS-based amplifiers are disclosed. The differential amplifier circuits comprise a high resistivity substrate and separate DC and AC ground connections. Such amplifier circuits may not require thru-substrate vias for ground connection.

Differential power amplifier circuitry includes a differential transistor pair, an input transformer, and biasing circuitry. The base contact of each transistor in the differential transistor pair may be coupled to the input transformer through a coupling capacitor. The coupling capacitors may be designed to resonate with the input transformer about a desired frequency range, thereby passing desirable signals to the differential transistor pair while blocking undesirable signals. The biasing circuitry may include a pair of emitter follower transistors, each coupled at the emitter to the base contact of each one of the transistors in the differential transistor pair and adapted to bias the differential transistor pair to maximize efficiency and stability.

An amplifier circuit amplifies a signal for wireless transmission. A feedback circuit, including a capacitor, is coupled to the amplifier circuit. Components of the feedback circuit are selected based on a feedback factor such that an input impedance to the amplifier circuit has a same impedance characteristic as a feedback circuit impedance of the feedback circuit.

A method of operating a switched-mode power supply (SMPS) for supplying power to a load circuit, which draws a supply current that varies with an input signal to the load circuit is disclosed. The method comprises monitoring the input signal and controlling the amount of accumulated energy transferred for consumption by the load circuit, in use, in accordance with the input signal.

One or more embodiments of the present invention pertain to an all solid-state microwave power module. The module includes a plurality of solid-state amplifiers configured to amplify a signal using a low power stage, a medium power stage, and a high power stage. The module also includes a power conditioner configured to activate a voltage sequencer (e.g., bias controller) when power is received from a power source. The voltage sequencer is configured to sequentially apply voltage to a gate of each amplifier and sequentially apply voltage to a drain of each amplifier.

A semiconductor package device comprises a radio frequency power transistor having an output port operably coupled to a single de-coupling capacitance located within the semiconductor package device. The single de-coupling capacitance is arranged to provide both high frequency decoupling and low frequency decoupling of signals output from the radio frequency power transistor.

A radio frequency system includes a power amplifier that outputs a radio frequency signal to a matching network via a transmission line between the power amplifier and the matching network. A sensor monitors the radio frequency signal and generates first sensor signals based on the radio frequency signal. A distortion module determines a first distortion value according to at least one of (i) a sinusoidal function of the first sensor signals and (ii) a cross-correlation function of the first sensor signals. A first correction circuit (i) generates a first impedance tuning value based on the first distortion value and a first predetermined value, and (ii) provides feedforward control of impedance matching performed within the matching network including outputting the first impedance tuning value to one of the power amplifier and the matching network.

A power amplifier module includes a power amplifier including a GaAs bipolar transistor having a collector, a base abutting the collector, and an emitter, the collector having a doping concentration of at least about 3×1016 cm−3 at a junction with the base, the collector also having at least a first grading in which doping concentration increases away from the base; and an RF transmission line driven by the power amplifier, the RF transmission line including a conductive layer and finish plating on the conductive layer, the finish plating including a gold layer, a palladium layer proximate the gold layer, and a diffusion barrier layer proximate the palladium layer, the diffusion barrier layer including nickel and having a thickness that is less than about the skin depth of nickel at 0.9 GHz. Other embodiments of the module are provided along with related methods and components thereof.

A power amplifier includes: first and second bias terminals to which bias voltages are respectively supplied; a first transistor having a first control terminal connected to the first bias terminal, a first terminal that is grounded, and a second terminal; a second transistor having a second control terminal connected to the second bias terminal, a third terminal connected to the second terminal, and a fourth terminal; a capacitor connected between the second control terminal and a grounding point; and a variable resistor connected in series with the capacitor, between the second control terminal and the grounding point.

Systems and methods are provided for generating an amplitude modulation signal to a switchmode power amplifier. A DC to DC switch is configured to receive a DC input voltage and to provide a DC output voltage. A low dropout regulator is configured to provide the amplitude modulation signal according to a modulation control signal received by the low dropout regulator. A control circuit is configured to establish a nominal operating power level for the power amplifier via the amplitude modulation signal and to maintain a minimum voltage difference between the DC output voltage and the low dropout regulator output. A modulator control circuit is configured to provide the modulation control signal to the low dropout regulator. The modulator control circuit provides the transition from a high amplitude to a low amplitude and a transition from the low amplitude to the high amplitude at configurable first and second slopes, respectively.

An automatic antenna impedance matching method for a radiofrequency transmission circuit. An impedance matching network is inserted between an amplifier and an antenna. The output current and voltage of the amplifier and their phase difference are measured by a variable measurement impedance, and the complex load impedance of the amplifier is deduced from this; the impedance of the antenna is calculated as a function of this complex impedance and as a function of the known current values of the impedances of the matching network. Starting from the value found for the impedance of the antenna, new values of the matching network are calculated that allow the load to be matched to the nominal impedance of the amplifier. The measurement impedance has a value controllable by the calculation processor according to the application and notably as a function of the operating frequency and of the nominal impedance of the amplifier.

Apparatus and methods disclosed herein perform gain, clipping, and phase compensation in the presence of I/Q mismatch in quadrature RF receivers. Gain and phase mismatch are exacerbated by differences in clipping between I & Q signals in low resolution ADCs. Signals in the stronger channel arm are clipped differentially more than weaker signals in the other channel arm. Embodiments herein perform clipping operations during iterations of gain mismatch calculations in order to balance clipping between the I and Q channel arms. Gain compensation coefficients are iteratively converged, clipping levels are established, and data flowing through the network is gain and clipping compensated. A compensation phase angle and phase compensation coefficients are then determined from gain and clipping compensated sample data. The resulting phase compensation coefficients are applied to the gain and clipping corrected receiver data to yield a gain, clipping, and phase compensated data stream.

A transceiver includes: a power amplifying circuit arranged to generate differential output signals during a transmitting mode of the transceiver; a balance-unbalance circuit arranged to convert the differential output signals into a single-ended output signal; a switchable matching circuit arranged to receive the single-ended output signal on a signal port of the transceiver during the transmitting mode, and to convert a single-ended receiving signal on the signal port into a single-ended input signal during a receiving mode of the transceiver; and a low-noise amplifying circuit arranged to convert the single-ended input signal into a low-noise input signal during the receiving mode. The power amplifying circuit, the Balun, the switchable matching circuit, and the low-noise amplifying circuit are configured as a single chip.

Systems and methods are provided for amplifying multiple input signals to generate multiple output signals. An example system includes a first channel, a second channel, and a third channel. The first channel is configured to receive one or more first input signals, process information associated with the one or more first input signals and a first ramp signal, and generate one or more first output signals. The second channel is configured to receive one or more second input signals, process information associated with the one or more second input signals and a second ramp signal, and generate one or more second output signals. The first ramp signal corresponds to a first phase. The second ramp signal corresponds to a second phase. The first phase and the second phase are different.

An amplifier includes a signal processing circuit configured to generate an orthogonal signal orthogonal to an input signal; a first D/A converter configured to convert the orthogonal signal into a first analog signal; a second D/A converter configured to convert the input signal into a second analog signal; and an analog computing circuit configured to generate a constant envelope signal based on the first analog signal from the first D/A converter and the second analog signal from the second D/A converter.

An apparatus for amplifying power is provided. The apparatus includes a supply modulator for generating a supply voltage based on an amplitude component of a transmission signal, and a power amplify module for amplifying power of the transmission signal using the supply voltage, wherein the power amplify module includes a first power amplifier and a second power amplifier, and when an output power of the transmission signal is greater than a reference power, the first power amplifier amplifies the power of the transmission signal using the supply voltage, and when the output power of the transmission signal is equal to or less than the reference power, the second power amplifier amplifies the power of the transmission signal using the supply voltage.

A voltage converter can be switched among two or more modes to produce an output voltage tracking a reference voltage that can be of an intermediate level between discrete levels corresponding to the modes. One or more voltages generated from a power supply voltage, such as a battery voltage, can be compared with the reference voltage to determine whether to adjust the mode. The reference voltage can be independent of the power supply voltage.

An automatic gain control device includes: a variable gain adjusting unit, for adjusting an input signal by a variable gain and outputting an adjustment result; an analog-digital converting unit, for performing analog-digital conversion on the adjustment result to obtain an analog-digital conversion result; and a gain determining unit, for determining a distribution status over a predetermined period of time of a maximum or a minimum of the analog-digital conversion result, comparing the distribution status with a first distribution condition, and if the distribution status meets the first distribution condition, then keeping the variable gain unchanged, otherwise changing the variable gain and determining newly a distribution status until the newly determined distribution status meets a second distribution condition which is at least as strict as the first distribution condition.

A chuck device includes front and rear collets, a driving ring, and a driving sleeve. The driving ring and the driving sleeve can be driven hydraulically to move toward or away from each other. When the driving ring and the driving sleeve are moved hydraulically away from each other, each of the front and rear collets is moved to a release position, when the driving ring and the driving sleeve are moved hydraulically toward each other, each of the front and rear collets is moved to a clamping position.

An electric hammer has a housing having a nozzle portion, a motor and a transmission mechanism arranged in the housing, a striking device, coupled to the motor and transmission mechanism, for moving in a reciprocating manner in the nozzle portion, and a clamping device mounted to the nozzle portion and at least partially extending out of the nozzle portion. The clamping device includes an outer sleeve, an inner sleeve arranged in the outer sleeve, and at least two clamping members arranged on the inner sleeve. The inner sleeve has a first position and a second position with respect to the outer sleeve and the distance between the two clamping members in the first position is less than the distance between the two clamping members in the second position to thereby allow a nail to be released halfway, i.e., when partially struck into a workpiece, in a simple manner.

A jaw for use in a drill chuck having a longitudinal center axis, comprising a chuck body which includes a jaw face formed on an inner surface of the chuck body and a plurality of teeth formed on an outer surface of the chuck body, the jaw face being substantially parallel to the longitudinal center axis. A ridge depends inwardly from the jaw face toward the longitudinal center axis. The ridge includes a tool engaging surface that is substantially parallel to the longitudinal center axis and has a width of between 0.020 to 0.060 inches.

A scan head assembled to a scan arm for an ion implanter and a scan arm using the same are provided, wherein the scan head is capable of micro tilting a work piece and comprises a case, a shaft assembly, an electrostatic chuck, a first driving mechanism and a micro-tilt mechanism. The shaft assembly passes through a first side of the case and has a twist axis. The electrostatic chuck is fastened on a first end of the shaft assembly outside the case for holding the work piece. The first driving mechanism is disposed within the case and capable of driving the shaft assembly and the ESC to rotate about the twist axis. The micro-tilt mechanism is disposed within the case and capable of driving the shaft assembly and the ESC to tilt relative to the case.

The clamping system for clamping a shank, for example a tool shank, into a seat has a spiral-shaped circumferential groove arranged in the wall of the seating hole and a clamping wedge which is provided with corresponding spiral-shaped ribs and is insertable into a recess on the shank.

A damping tool holder, such as a boring head, a chuck, or a milling cutting arbor, integrates a damping device (2), in the form of an elongated body. The damping device (2) is housed in a mounting body (3), connected by one end to the tool-holder body (1) and having at its other end an end fitting (4) for mounting a tool, whereby the mounting body (3) is equipped with at least one lubricant feed pipe (32), emptying at its front end into the end fitting (4) for mounting a tool and connected at its other end to a circular groove (102) for distributing lubricant that is provided on the front surface of the tool holder (1).

A surgical milling cutter includes a milling cutter bracket, a locking device and a bottom electric motor connected successively. The milling cutter bracket includes a fixing seat with a through hole. A finger guide apparatus with an L-type first bracket at the top end thereof is provided on the upper part of the fixing seat. The end of the L-type first bracket's short side is provided with a downward projection. The lowest point of the projection is lower than that of the milling cutter's cylindrical head when the milling cutter is working normally. The surgical milling cutter utilizes the projection to prevent the possibility of an object contacting with the cylindrical head, thus avoiding an object being cut unevenly. Meanwhile, the L-type bracket can be driven by the finger guide apparatus to rotate so as to change the running direction of the milling cutter, thus facilitating surgical procedures.