A transfer control circuit stores data in a FIFO memory, outputs data in the FIFO memory in response to a data request signal, and outputs a state signal in accordance with an amount of stored data in the FIFO memory. An output data generating unit outputs image data having a horizontal image size in accordance with a horizontal count value and a horizontal synchronizing signal, and thereafter, outputs blank data. When the state signal indicates that the FIFO memory is in a “EMPTY” or “MODERATE” storage state, a blank control unit outputs a blank addition signal until the FIFO memory changes to a “FULL” storage state.

A data storage device includes a first memory device configured to store data having a first property, a second memory device configured to store data having a second property, and a controller. The controller selects data stored in the first memory device, and transfers the selected data to the second memory device or stores the selected data in another physical location of the first memory device selectively depending on an update count (UC) of an address at which the selected data is stored.

The various implementations described herein include systems, methods and/or devices used to enable multipass programming in buffers implemented in non-volatile data storage systems (e.g., using one or more flash memory devices). In one aspect, a portion of memory (e.g., a page in a block of a flash memory device) may be programmed many (e.g., 1000) times before an erase is required. Some embodiments include systems, methods and/or devices to integrate Bloom filter functionality in a non-volatile data storage system, where a portion of memory storing one or more bits of a Bloom filter array may be programmed many (e.g., 1000) times before the contents of the portion of memory need to be moved to an unused location in the memory.

Apparatuses and methods of calibrating a memory interface are described. Calibrating a memory interface can include loading and outputting units of a first data pattern into and from at least a portion of a register to generate a first read capture window. Units of a second data pattern can be loaded into and output from at least the portion of the register to generate a second read capture window. One of the first read capture window and the second read capture window can be selected and a data capture point for the memory interface can be calibrated according to the selected read capture window.

A bus interconnect interfaces a host system to a radio frequency (RF) generator that is coupled to a plasma chamber. The bus interconnect includes a first set of host ports, which are used to provide a power component setting and a frequency component setting to the RF generator. The ports of the first set of host ports are used to receive distinct variables that change over time. The bus interconnect further includes a second set of generator ports used to send a power read back value and a frequency read back value to the host system. The bus interconnect includes a sampler circuit integrated with the host system. The sampler circuit is configured to sample signals at the ports of the first set at selected clock edges to capture operating state data of the plasma chamber and the RF generator.

A data transfer control apparatus includes a transferring unit that transfers data from a transfer source memory to a transfer destination memory, according to an instruction from a first processor; and a first processor configured to detect a process execute by the first processor, determine whether transfer of the data is urgent, based on the type of the detected process, and control the transferring unit or the first processor to transfer the data, based on a determination result.

A system and method for detecting, filtering, prioritizing and reporting shared memory hazards are disclosed. The method includes, for a unit of hardware operating on a block of threads, mapping a plurality of shared memory locations assigned to the unit to a tracking table. The tracking table comprises initialization information for each shared memory location. The method also includes, for an instruction of a program within a barrier region, identifying a potential conflict by identifying a second access to a location in shared memory within a block of threads executed by the hardware unit. First information associated with a first access and second information associated with the second access to the location is determined. Filter criteria is applied to the first and second information to determine whether the instruction causes a reportable hazard. The instruction is reported when it causes the reportable hazard.

Embodiments of the invention provide systems and methods for managing an enabler and dependencies of the enabler. According to one embodiment, a method of managing an enabler can comprise requesting a management function via a management interface of the enabler. The management interface can provide an abstraction of one or more management functions for managing the enabler and/or dependencies of the enabler. In some cases, prior to requesting the management function metadata associated with the management interface can be read and a determination can be made as to whether the management function is available or unavailable. Requesting the management function via the management interface of the enabler can be performed in response to determining the management function is available. In response to determining the management function is unavailable, one or more alternative functions can be identified based on the metadata and the one or more alternative functions can be requested.

A method and an apparatus for generating metadata for digital content are described, which allow to review the generated metadata already in course of ongoing generation of metadata. The metadata generation is split into a plurality of processing tasks, which are allocated to two or more processing nodes. The metadata generated by the two or more processing nodes is gathered and visualized on an output unit.

A method of processing an electronic file by identifying portions of content data in the electronic file and determining if each portion of content data is passive content data having a fixed purpose or active content data having an associated function. If a portion is passive content data, then a determination is made as to whether the portion of passive content data is to be re-generated. If a portion is active content data, then the portion is analyzed to determine whether the portion of active content data is to be re-generated. A re-generated electronic file is then created from the portions of content data which are determined to be re-generated.

A data transfer control apparatus includes a transferring unit that transfers data from a transfer source memory to a transfer destination memory, according to an instruction from a first processor; and a first processor configured to detect a process execute by the first processor, determine whether transfer of the data is urgent, based on the type of the detected process, and control the transferring unit or the first processor to transfer the data, based on a determination result.

A data processing apparatus includes multiple processing means that are connected in a ring shape via corresponding communication means respectively. Each communication means includes a reception means for receiving data from a previous communication means, and a transmission means for transmitting data to a next communication means. Connection information is assigned to each of the reception means and the transmission means. The communication means, when receiving a packet that has same connection information as one assigned to its reception means, causes the corresponding processing means to perform data processing on the packet, sets the connection information assigned to its transmission means to the packet, and transmits the packet to the next communication means, and when receiving a packet that has connection information that is not same as one assigned to its reception means, transmits the packet to the next communication means without changing the connection information of the packet.

A vector data access unit includes data access ordering circuitry, for issuing data access requests indicated by elements of earlier and a later vector instructions, one being a write instruction. An element indicating the next data access for each of the instructions is determined. The next data accesses for the earlier and the later instructions may be reordered. The next data access of the earlier instruction is selected if the position of the earlier instruction's next data element is less than or equal to the position of the later instruction's next data element minus a predetermined value. The next data access of the later instruction may be selected if the position of the earlier instruction's next data element is higher than the position of the later instruction's next data element minus a predetermined value. Thus data accesses from earlier and later instructions are partially interleaved.

A statue management section of a control section is provided with a corresponding real number storage section that stores a real number converted from a logical number by a configuration number converting section. When the corresponding real number storage section has stored configuration information with a real number of the next transition state, the state management section directly supplies the real number to the configuration information storage section in the next or later processing cycle.

A data accessing method, and a storage system and a controller using the same are provided. The data accessing method is suitable for a flash memory storage system having a data perturbation module. The data accessing method includes receiving a read command from a host and obtaining a logical block to be read and a page to be read from the read command. The data accessing method also includes determining whether a physical block in a data area corresponding to the logical block to be read is a new block and transmitting a predetermined data to the host when the physical block corresponding to the logical block to be read is a new block. Thereby, the host is prevented from reading garbled code from the flash memory storage system having the data perturbation module.

A data processing device includes processing circuitry 20 for executing a first memory access instruction to a first address of a memory device 40 and a second memory access instruction to a second address of the memory device 40, the first address being different from the second address. The data processing device also includes prefetching circuitry 30 for prefetching data from the memory device 40 based on a stride length 70 and instruction analysis circuitry 50 for determining a difference between the first address and the second address. Stride refining circuitry 60 is also provided to refine the stride length based on factors of the stride length and factors of the difference calculated by the instruction analysis circuitry 50.

Efficient data processing apparatus and methods include hardware components which are pre-programmed by software. Each hardware component triggers the other to complete its tasks. After the final pre-programmed hardware task is complete, the hardware component issues a software interrupt.

A data processing system arranged for receiving over a network, according to a data transfer protocol, data directed to any of a plurality of destination identities, the data processing system comprising: data storage for storing data received over the network; and a first processing arrangement for performing processing in accordance with the data transfer protocol on received data in the data storage, for making the received data available to respective destination identities; and a response former arranged for: receiving a message requesting a response indicating the availability of received data to each of a group of destination identities; and forming such a response; wherein the system is arranged to, in dependence on receiving the said message.

Techniques for automatically partitioning a multi-platform data transform flow graph to one or more target output platforms are provided. The techniques include performing type inference on a transform graph, wherein the transform graph comprises one or more data transforms, automatically partitioning the transform graph to one or more target output platforms based on one or more policies, performing an optimization of the partitioned transform graph, and generating code, from the partitioned transform graph, for each set of the one or more data transforms based on the one or more target output platforms.

The present invention relates to a method for compiling code for a multi-core processor, comprising: detecting and optimizing a loop, partitioning the loop into partitions executable and mappable on physical hardware with optimal instruction level parallelism, optimizing the loop iterations and/or loop counter for ideal mapping on hardware, chaining the loop partitions generating a list representing the execution sequence of the partitions.

Disclosed is a feature for a vehicle that enables taking precautionary actions in response to conditions on the road network around or ahead of the vehicle, in particular, a blind intersection along a section of road. A database that represents the road network is used to determine locations where a blind intersection is located along a section of road. Then, precautionary action data is added to the database to indicate a location at which a precautionary action is to be taken about the blind intersection located along the section of road. A precautionary action system installed in a vehicle uses this database, or a database derived therefrom, in combination with a positioning system to determine when the vehicle is at a location that corresponds to the location of a precautionary action. When the vehicle is at such a location, a precautionary action is taken by a vehicle system as the vehicle is approaching a blind intersection.

There is a provided a method for car navigating using traffic signal data. The method for car navigating is characterized of providing an optimized route for the earliest arrival to destinations by using signal system data of one or more traffic signals existing on a certain route.

The invention relates to compressed data transmission in wireless data communication. Disclosed are methods and apparatuses for transporting residue of vehicle position data via a wireless network. A disclosed method for transporting residue of vehicle position data via a wireless network, includes the steps of: receiving data for updating residue encoding schema from a monitoring server; constructing a residue encoding schema based on the data, thereby producing a constructed residue encoding schema; and storing the constructed residue encoding schema such that the constructed residue encoding schema will become the current residue encoding schema; where: the constructed residue encoding schema is constructed such that each residue of the constructed residue encoding schema corresponds to a code; and the constructed residue encoding schema is constructed such that a residue having a relatively high probability of occurrence corresponds to a code of relatively short length.

A mechanism for generating gate-level activity data for use in clock gating efficiency analysis of an integrated circuit (IC) design is provided. Generating the gate-level activity data includes generating a signal behaviour description for inter-register signals, generating a gate-level netlist for the IC design, generating gate-level stimuli based at least partly on the generated signal behaviour description, and performing gate-level simulation using the generated gate-level stimuli to generate gate-level activity data for the IC design. In one embodiment, generating the signal behaviour description includes performing Register Transfer Level (RTL) simulation of the IC design, and generating the gate-level netlist includes performing RTL synthesis. The RTL simulation and RTL synthesis are performed on RTL data for the IC design.

A datapath extraction tool uses machine-learning models to selectively classify clusters of cells in an integrated circuit design as either datapath logic or non-datapath logic based on cluster features. A support vector machine and a neural network can be used to build compact and run-time efficient models. A cluster is classified as datapath if both the support vector machine and the neural network indicate that it is datapath-like. The cluster features may include automorphism generators for the cell clusters, or physical information based on the cell locations from a previous (e.g., global) placement, such as a ratio of a total cell area for a given cluster to a half-perimeter of a bounding box for the given cluster.

An apparatus for decoding data segments representing a time-domain data stream, a data segment being encoded in the time domain or in the frequency domain, a data segment being encoded in the frequency domain having successive blocks of data representing successive and overlapping blocks of time-domain data samples. The apparatus includes a time-domain decoder for decoding a data segment being encoded in the time domain and a processor for processing the data segment being encoded in the frequency domain and output data of the time-domain decoder to obtain overlapping time-domain data blocks. The apparatus further includes an overlap/add-combiner for combining the overlapping time-domain data blocks to obtain a decoded data segment of the time-domain data stream.

An audio signal decoder has a time warp contour calculator, a time warp contour data rescaler and a warp decoder. The time warp contour calculator is configured to generate time warp contour data repeatedly restarting from a predetermined time warp contour start value, based on time warp contour evolution information describing a temporal evolution of the time warp contour. The time warp contour data rescaler is configured to rescale at least a portion of the time warp contour data such that a discontinuity at a restart is avoided, reduced or eliminated in a rescaled version of the time warp contour. The warp decoder is configured to provide the decoded audio signal representation, based on an encoded audio signal representation and using the rescaled version of the time warp contour.

A visualization can include a set of swim lanes, each swim lane representing information about an event type. An event type can be specified, e.g., as those events having certain keywords and/or having specified value(s) for specified field(s). The swim lane can plot when (within a time range) events of the associated event type occurred. Specifically, each such event can be assigned to a bucket having a bucket time matching the event time. A swim lane can extend along a timeline axis in the visualization, and the buckets can be positioned at a point along the axis that represents the bucket time. Thus, the visualization may indicate whether events were clustered at a point in time. Because the visualization can include a plurality of swim lanes, the visualization can further indicate how timing of events of a first type compare to timing of events of a second type.

To freely establish a peripheral equipment selection operating environment of excellent operability which can remarkably reduce an operation burden which is applied until construction information of selectable peripheral equipment can be confirmed and can easily confirm the construction information of the selectable peripheral equipment by everyone by a simple operating instruction, a CPU obtains construction information of a printer that is being selected and default setting on the basis of a selection instructing state relative to a selectable printer candidate on a network and allows them to be caption-displayed at a position near the position indicated by a cursor on a printer selection picture plane displayed on a CRT.

A system receives a first request for data associated with a data stream received over a first network from a remote source and then determines when the requested data will be available based on analyzing the data stream. The system communicates a second request for the requested data over a second network to the remote source when the requested data will not be available from the data stream within a threshold time and receives the requested data from the remote source over at least one from the list including the first network and the second network.

A method for transmitting blocks of data in data packets from a first device on a network to a second device on the network comprising the steps of, providing a File Transmitter Application in communication with the first device, which File Transmitter Application is adapted to control the transmission of the blocks of data in data packets on the network, including the timing of the commencement of the transmission of the data blocks on the network, providing a File Receiver Application in communication with the second device and in communication with the File Transmitter Application, which File Receiver Application is adapted to transmit Acknowledgment data to the File Transmitter Application relating to the receipt of data blocks received at the second device, commencing the transmission of a first data block from the first device to the second device, by way of the network and commencing the transmission of the second data block from the first device to the second device, by way of the network.

Systems and methodologies are described that facilitate communicating encapsulation information for a related mobility protocol type utilized in communicating over a data flow with reduced specific implementation on the policy server to support different mobility protocol types. In this regard, encapsulation information can be transmitted to the policy server from a network gateway such that the policy server can forward the encapsulation information to a serving gateway along with policy rules related to a data flow type. The serving gateway can utilize the encapsulation information to detect and interpret the encapsulated data flow according to the policy rules. In this regard, the serving gateway can provide support (e.g., quality of service support) for the flow. The encapsulation information can relate to a mobility protocol type, an encapsulation header, an indication that encapsulation is required, parameters regarding locating an encapsulation header in a message, and/or the like.

In a computer-implemented method of generating event notifications, in-home data is received. The in-home data and environment data (e.g., weather, law enforcement, etc.) is generated by, or based on information generated by, a device located at a residence of an individual, and is analyzed to determine whether it is indicative of an event that should be reported to one or more neighboring residences and/or businesses. If the data is indicative of such an event, a notification is generated and transmitted to the relevant residences and/or businesses.

A CPU executes a communication partner search process for searching for a communication partner (another game machine). The CPU confirms received data content. If identification information included in the received data matches, application identification information saved in a wireless communication module is compared with application identification information included in the received data. When the pieces of application identification information match, a notice that another game machine having exchange data corresponding to the matched application identification information is found is given to a main body. Then, giving/receiving of exchange data is executed to/from another game machine.

Systems and methods reconfigure data transmitted on a network, the network using a communication protocol. The systems and methods include a processor that is operable to receive data from a second device on the network; a memory medium; and a data configurator operable to dynamically reconfigure the data from the second device, with the data from the second device being in the form of a network item defined by the second device. The data configurator is operable to pass the reconfigured data to the processor and/or the memory medium in the form of a device item that is native to the device. A data design tool generates a map configuration to define a unique relationship between the network item and the device item. The map configuration includes a network representation portion for data in the network item and a device representation portion for data in the data item.

A system and method for data communication connecting on-line networks with on-line and off-line computers. The present system provides for broadcast of up to the minute notification centric information thereby providing an instant call to action for users who are provided with the ability to instantaneously retrieve further detailed information. The notification centric portions of information is wirelessly broadcast to wireless receiving devices which are attached to computing devices. Upon receipt of the information at the personal computer, the user is notified through different multimedia alerts that there is an incoming message. Wirelessly broadcasted URL's, associated with the data, are embedded in data packets and provide an automated wired or wireless connection back to the information source for obtaining detailed data.

Accessory for a laptop computer with LCD display which is connected to the laptop serial communications port and optically transmits data to a portable information device, such as a wristwatch designed to receive data as sequential pulses of light. The accessory includes a microcomputer with an RC timebase which is calibrated each time it is used by a special internal program, so that the input baud rate to the accessory matches the communications baud rate of the data received from the laptop. The internal program also permits selection of an output baud rate for the optically transmitted data.

An electronic data system for use with sporting impliments for providing a user with an electronic device integrated into sport gloves to perform various functions unique to that particular sport. The electronic data system for use with sporting impliments includes a glove member designed for substantially enveloping a hand of a user. The glove member has a notch portion in a back side of the glove member. The notch portion is for facilitating insertion and removal of the user's hand from the glove member. The glove member has a tab portion positioned adjacent to a first side of the notch portion. A data assembly has a housing. The housing is operationally coupled to the glove member. The data assembly has a display for presenting a visual representation of information to the user.

A Redundant Array of Independent Disks (RAID) controller receives new data that is to be written, wherein the new data is indicated in blocks of a first block size. The RAID controller reads old data, and old parity that corresponds to the old data, stored in blocks of a second block size that is larger in size than the first block size. The RAID controller computes new parity based on the new data, the old data, and the old parity. The RAID controller writes the new data and the new parity aligned to the blocks of the second block size, wherein portions of the old data that are not overwritten by the RAID controller are also written to the blocks of the second block size.

A Redundant Array of Independent Disks (RAID) controller receives new data that is to be written, wherein the new data is indicated in blocks of a first block size. The RAID controller reads old data, and old parity that corresponds to the old data, stored in blocks of a second block size that is larger in size than the first block size. The RAID controller computes new parity based on the new data, the old data, and the old parity. The RAID controller writes the new data and the new parity aligned to the blocks of the second block size, wherein portions of the old data that are not overwritten by the RAID controller are also written to the blocks of the second block size.

Methods and systems for load balancing read/write requests of a virtualized storage system. In one embodiment, a storage system includes a plurality of physical storage devices and a storage module operable within a communication network to present the plurality of physical storage devices as a virtual storage device to a plurality of network computing elements that are coupled to the communication network. The virtual storage device comprises a plurality of virtual storage volumes, wherein each virtual storage volume is communicatively coupled to the physical storage devices via the storage module. The storage module comprises maps that are used to route read/write requests from the network computing elements to the virtual storage volumes. Each map links read/write requests from at least one network computing element to a respective virtual storage volume within the virtual storage device.

A memory storage apparatus, a memory controller and method for transmitting and identifying data streams are provided. The memory controller passes at least a portion of a data stream received from a host system to a smart card chip of the memory storage apparatus. Then, the host system accurately receives a response message from the smart card chip by executing a plurality of read commands. The memory controller is capable of adding a first verification code to a response data stream sent to the host system, and is capable of adding a write token to each of data segments of the response data stream. The host system confirms the accuracy of the response data stream by verifying the first verification code or by verifying the write token of each of the data segments.

Embodiments of the current invention permit a user to allocate cache memory to main memory more efficiently. The processor or a user allocates the cache memory and associates the cache memory to the main memory location, but suppresses or bypassing reading the main memory data into the cache memory. Some embodiments of the present invention permit the user to specify how many cache lines are allocated at a given time. Further, embodiments of the present invention may initialize the cache memory to a specified pattern. The cache memory may be zeroed or set to some desired pattern, such as all ones. Alternatively, a user may determine the initialization pattern through the processor.

A storage device according to an embodiment includes: a host interface connected to a host; a memory including a first buffer that stores a logical address range designated by an invalidation instruction received from the host via the host interface and a second buffer that stores an internal logical address range which is an area combination with the logical address range; a nonvolatile memory; and a controller. The controller includes: an invalidation instruction processor that stores the logical address range designated by the invalidation instruction in the first buffer; an area combination executor that generates the internal logical address range by the area combination with the logical address range and stores the internal logical address range in the second buffer; and an invalidation executor that executes invalidation processing on the nonvolatile memory based on the internal logical address range.

An optical backup apparatus is provided and includes an optical storage device, an interface module to connect with at least one type of external storage medium, and a control unit to back up data from the external storage medium to the optical storage device in response to an external remote control operation.

An abstraction for storage class memory is provided that hides the details of the implementation of storage class memory from a program, and provides a standard channel programming interface for performing certain actions, such as controlling movement of data between main storage and storage class memory or managing storage class memory.

A method and computer-readable storage media are provided for rearranging data in physical memory units. In one embodiment, a method may include monitoring utilization counters. The method may further include, comparing the utilization counters for a match with an instance in a first table containing one or more instances when data may be rearranged in the physical memory units. The table may further include where the data should be relocated by a rearrangement. The method may also include, continuing to monitor the utilization counters if a match is not found with an instance in the first table. The method may further include, rearranging the data in the physical memory units if a match between the utilization counters and an instance in the first table is found.

Various systems and methods are described for configuring a logical data storage container. In one embodiment, an instruction to perform an operation to modify an attribute of the logical data storage container that is an abstraction of a plurality of pertinent storage containers is received. A translated instruction to perform a sub-operation associated with the operation is transmitted to each of a number of the plurality of pertinent storage containers. A level of success of the performing of the operation on the logical data storage container is detected based on a comparison of a threshold value to a level of success of the performing of the sub-operation on each of the number of the plurality of pertinent storage containers. A report of the detected level of success is communicated.

Apparatuses and methods for providing data are disclosed. An example apparatus includes a plurality of memories coupled to a data bus. The memories provide data to the data bus responsive, at least in part, to a first address. The plurality of memories further provide at least a portion of the data corresponding to the first address to the data bus during a sense operation for a second address provided to the plurality of memories after the first address. Each of the plurality of memories provides data to the data bus corresponding to the first address at different times. Moreover, a plurality of memories may provide at least 2N bits of data to the data bus responsive, at least in part, to an address, each of the plurality of memories provide N bits of data to the data bus at different times.

Data caching for use in a computer system including a lower cache memory and a higher cache memory. The higher cache memory receives a fetch request. It is then determined by the higher cache memory the state of the entry to be replaced next. If the state of the entry to be replaced next indicates that the entry is exclusively owned or modified, the state of the entry to be replaced next is changed such that a following cache access is processed at a higher speed compared to an access processed if the state would stay unchanged.