A reductant fill system is provided. A reductant tank is configured to store a reductant. A receiver is configured to receive a supply of the reductant from an off-board reservoir. A first valve is in communication with the reductant tank and is configured to control a reductant flow into the reductant tank. A reductant supply line is in fluid communication with the receiver. The reductant supply line is configured to provide the reductant flow to the first valve. The reductant level sensor is configured to generate a signal based on a level of reductant in the reductant tank. A controller is communicably coupled to the reductant level sensor. The controller is configured to purge a stranded reductant in the reductant supply line, based on the signal generated by the reductant level sensor.

A powder refilling device includes a refill powder chamber to accommodate a powder bag containing powder, an opener to open the powder bag inside the refill powder chamber, and a squeezer to squeeze the opened powder bag to discharge powder therefrom and reduce a volume of the opened powder bag.

The phase margin compensation method according to an exemplary embodiment of the present invention includes: outputting reference voltage (Vout2); outputting a first reference voltage (Vout1) actually supplied to the target circuit; comparing the reference voltage (Vout2) with the first reference voltage (Vout1) by the comparator; counting any section of an output signal (pulse signal) from the comparator by a predetermined frequency by the duty cycle calculator; and controlling a phase margin of a frequency of output voltage supplied to the target circuit by controlling buffer current based on the duty cycle ratios and the output bit information fed back from the duty cycle calculator.

A DC-DC converter includes a first amplifier that amplifies a first difference between a first reference voltage and a feedback voltage corresponding to an output voltage, a second amplifier that amplifies a second difference between the first reference voltage and an integrated value of the feedback voltage, and a controller that controls a switching circuit to change the output voltage when the first difference reaches the second different.

A method of operating a switching power converter may include determining an average value of a measured parameter for substantially each switching cycle, and adjusting a control parameter during substantially each switching cycle in response to a corresponding one of the average values. In one embodiment, the control parameter comprises a switch duty cycle, and the measured parameter comprises an output current. Determining the average value of the measured parameter may include obtaining a first sample of the measured parameter during a switching cycle, and calculating the average value of the measured parameter during the switching cycle in response to the first sample.

A power supply for a load control device generates a DC voltage and provides an asymmetrical output current, while drawing a substantially symmetrical input current. The power supply comprises a controllably conductive switching circuit for controllably charging an energy storage capacitor across which the DC voltage is produced. The energy storage capacitor begins charging at the beginning of a half-cycle and stops charging after a charging time in response to the magnitude of the DC voltage and the amount of time that the energy storage capacitor has been charging during the present half-cycle. The charging time is maintained substantially constant from one half-cycle to the next. The power supply is particularly beneficial for preventing asymmetrical current from flowing in a multiple location load control system having a master load control device supplying power to a plurality of remote load control devices all located on either the line-side or the load-side of the system.

Efficiency of a switch mode power supply (SMPS) is optimized by operating the SMPS in an asynchronous mode when current being supplied therefrom is less than a certain current value and operating the SMPS in a synchronous mode when the current being supplied therefrom is equal to or greater than the certain current value. When the SMPS is operating in the synchronous mode high-side and low-side power transistors alternately turn on and off. When the SMPS is operating in the asynchronous mode only the high-side power transistor turns on and off and the low-side power transistor remains off. When charging a battery with the SMPS discharge of the battery is eliminated when operating in the asynchronous mode at a low current output.

Circuits and processes for detecting a peak value of an input signal are disclosed. In one example, a peak detector circuit may sample a line sense signal, determine the peak value of the line sense signal during a search window, and output a peak detection signal representative of the determined peak value. In a first mode, the peak detector circuit may cause the peak detection signal to be representative of the determined peak value from an immediately preceding search window. In a second mode, the peak detector circuit may cause the peak detection signal to follow the sampled line sense signal. The peak detector circuit may operate in the second mode in response to the sample of the line sense signal being greater than a peak value of the line sense signal from an immediately preceding search window by more than a threshold amount.

A power conversion system has a power converter configured to receive an input voltage signal, convert the input voltage to an output voltage signal, and provide the output voltage signal to a load and a closed loop compensator configured to receive the output voltage signal and a reference voltage signal, the closed loop compensator configured to transmit an error signal indicative of a difference between the output voltage signal and the reference voltage signal. The power conversion system further has a pulse with modulator configured to receive the error signal and modulate a control signal with the error signal to control the output voltage signal, the pulse width modulator configured to transmit the control signal to the power converter and logic configured to receive the error signal and control the closed loop compensator based upon the error signal. A controller observes the error signal characterstics such as peak-to-peak values, frequency and phase and adjust the closed loop controller variables and other power converter system variables in order to improve the dynamic performance and improve stability.

The present disclosure is directed to a voltage-to-current sensing circuit having a bias terminal configured to receive a reference voltage, an offset terminal configured to receive an offset current, and an operational amplifier configured to output a low voltage signal. The device includes a first amplifier having first and second high voltage inputs configured to receive a first voltage difference across a sense component on a high voltage line and to generate a first current, a second amplifier having first and second low voltage inputs configured to receive a second voltage difference between the bias terminal and the offset terminal and to generate a second current, a summing circuit configured to provide an intermediate voltage corresponding to a sum of the first and the second currents, and a low-voltage transistor coupled to an output of the amplifier and controlled by the intermediate voltage to generate the output current.

A controller used in a buck-boost converter includes a clock generator, an error amplifying circuit, a comparing circuit, a proportional sampling circuit, a logic circuit, a pulse width increasing circuit, first and second driving circuits. Based on a clock signal generated by the clock generator, the proportional sampling circuit samples the difference between a current sensing signal and a compensation signal generated by the error amplifying circuit, and generates a proportional sampling signal. The pulse width increasing circuit generates a sum control signal based on the proportional sampling signal and a logic control signal generated by the logic circuit, wherein a modulation value adjusted by the proportional sampling signal is added to the pulse width of the logic control signal to generate the pulse width of the sum control signal. The first and second driving circuits generate driving signals based on the sum control signal and the logic control signal.

A method for controlling voltage crossing a power switch of a switched-mode power converter includes the steps of: controlling a switch frequency of the power switch of the switched-mode power converter to a first frequency as activating the switched-mode power converter; and then changing the switch frequency of the power switch to a second frequency after the switched-mode power converter is activated for a predetermined time; wherein the first frequency is lower than the second frequency.

In some aspects of the invention, overcurrent protection is carried out by suppressing fluctuations in current flowing through a switching element after overcurrent detection. A peak current reaching time detection circuit detects a peak current reaching time needed until current flowing through a switching element reaches a peak value. A difference voltage detection circuit, including a ½ time detection circuit which detects a time of ½ an ON time of the preceding cycle of the switching element, detects difference voltage between reference voltage used when detecting overcurrent flowing to a load and a signal which has detected current flowing through the switching element for the ½ time. A delay time adjustment circuit, based on at least one of the peak current reaching time and difference voltage, carries out adjustment and control of a delay time occurring until the time when the switching element is turned off after detecting the overcurrent.

Methods and systems are described for providing power factor correction for high-power loads using two interleaved power factor correction stages. Each power factor correction stage includes a controllable switch that is operated to control the phasing of each power factor correction stage. The phasing of output current from the second power factor correction stage is shifted 180 degree relative to the output current from the first power factor correction stage.

In accordance with one embodiment of the present disclosure, a multi-phase voltage regulator may comprise a plurality of phases, each phase configured to supply electrical current to one or more information handling resources electrically coupled to the voltage regulator. A controller may be electrically coupled to the plurality of phases. The controller may designate at least one of the plurality of phases as a first state phase, and designate each of the plurality of phases not designated as a first state phase as a second state phase. The controller may alternate the designation of at least two of the plurality of phases between a first state phase and a second state phase. Each first state phase may be configured to supply a first electrical current regardless of electrical current demand. Each second state phase may be configured to supply a second electrical current based on the current demand.

In one implementation, a modular power converter having a reduced switching loss includes a package, a field-effect transistor (FET) including a gate terminal, a drain terminal, and a source terminal, and fabricated on a semiconductor die situated inside the package, and a driver circuit inside the package. The driver circuit is configured to drive the gate terminal of the FET. The driver circuit is further configured to sample a drain-to-source voltage (VDS) of the FET directly from the drain terminal and the source terminal, thereby enabling the reduced switching loss.

A ballast circuit for a Light Emitting Diode (LED) has a regulator element coupled to the LED and to an input voltage source. A control circuit is coupled to the LED and to an input voltage source. A first switching device is coupled in series with the regulator element. A second switching device is coupled to the input voltage and the control circuit.

The invention relates to a system for eliminating current surges that includes a first voltage regulator (7) having a current limit programmable to a value (I(limit)) that depends on the value of the intermittent current surges (IO(surge)) required by the intermittent load (3) and the relationship thereof to the work cycle, a second voltage regulator (9), a condenser (4) connected between the first and second regulators (7, 9), that loads when the current is no longer required and that unloads when there is a need for output current to provide current to the second regulator (9) which absorbs the changes in voltage produced by the loading/unloading of the condenser and provides a constant voltage for any value of the required output current surge, independently of voltage changes in the condenser (4), and a control loop between a sensor for the output current provided to the load and an input limit (15) for the input current (II) in the first regulator (7). Thus, the input current (I(limit)) (1) and the output voltage (VLoad) are constant for any value of the output current surge (IO(surge)).

A “windowless” H-bridge buck-boost switching converter includes a regulation circuit with an error amplifier which produces a ‘comp’ signal, a comparison circuit which compares ‘comp’ with a ‘ramp’ signal, and logic circuitry which receives the comparison circuit output and a mode control signal indicating whether the converter is to operate in buck mode or boost mode and operates the primary or secondary switching elements to produce the desired output voltage in buck or boost mode, respectively. A ‘ramp’ signal generation circuit operates to shift the ‘ramp’ signal up by a voltage Vslp(p−p)+Vhys when transitioning from buck to boost mode, and to shift ‘ramp’ back down by Vslp(p−p)+Vhys when transitioning from boost to buck mode, thereby enabling the converter to operate in buck mode or boost mode only, with no need for an intermediate buck-boost region.

This disclosure relates to radio frequency (RF) power converters and methods of operating the same. In one embodiment, an RF power converter includes an RF switching converter, a low-drop out (LDO) regulation circuit, and an RF filter. The RF filter is coupled to receive a pulsed output voltage from the RF switching converter and a supply voltage from the LDO regulation circuit. The RF filter is operable to alternate between a first RF filter topology and a second RF filter topology. In the first RF filter topology, the RF filter is configured to convert the pulsed output voltage from a switching circuit into the supply voltage. The RF filter in the second RF filter topology is configured to filter the supply voltage from the LDO regulation circuit to reduce a ripple variation in a supply voltage level of the supply voltage. As such, the RF filter provides greater versatility.

A device (200) includes a circuit (202) and a driver stage (204) therefor. The circuit includes two sub-circuits (231 and 232). The driver stage includes switcher logic (206) that produces signals that control switching on and off of the sub-circuits. The switcher logic also produces other signals in advance of the signals that control the switching of the sub-circuits. The driver stage includes delay compensations circuits (221 and 222), coupled to the switcher logic and to the circuit, that produce timing signals for the switcher logic. The timing signals are closely aligned with moments that a changing voltage at a node between the sub-circuits passes through threshold voltages. The timing signals compensate for all delays of signals through the device such that a period that both sub-circuits are off is minimized, while ensuring that both sub-circuits are not on at a same time.

A voltage regulator includes an amplifier having a first input coupled to a first reference voltage and a second input coupled to a voltage feedback signal; a multiplexer having a first input coupled to an output of the amplifier, a second input coupled to a voltage clamp signal, and a control input; and a control circuit having a first input coupled to an over current indicator, a second input coupled to a no over voltage indicator, a third input coupled to a timer signal, and an output coupled to the control input of the multiplexer.

A power supply device includes a first converter which converts an input voltage to a first voltage, a second converter which converts the first voltage from the first converter to a second voltage, a voltage comparison section which compares the first voltage outputted from the first converter with a predetermined reference voltage, a voltage comparison result output section which outputs a first signal until the first voltage is determined to be higher than the predetermined reference voltage by the voltage comparison section and retains a second signal as an output after the first voltage is determined to be higher than the predetermined reference voltage, and a converter control section which controls the second converter to stop when the first signal is outputted from the voltage comparison result output section and controls the second converter to operate when the second signal is outputted from the voltage comparison result output section.

A voltage regulator compensation circuit provides power to a dynamic load and includes a power transistor configured to drive the dynamic load, a reference determining transistor configured to establish a voltage reference proportional to a regulated output voltage of the power transistor, and a control circuit coupled to a gate input of both the power transistor and the reference determining transistor. Also included is a comparison engine configured to compare the regulated output voltage and the voltage reference, and a current consuming transistor operatively coupled to an output of the power transistor and configured to provide a varying secondary load. The comparison engine is configured to control the current consuming transistor to increase current draw or decrease current draw from the power transistor based on the difference between the regulated output voltage and the voltage reference.

A charge pump regulator circuit includes a voltage controlled oscillator and a plurality of charge pumps. The voltage controlled oscillator has a plurality of inverter stages connected in series in a ring. A plurality of oscillating signals is generated from outputs of the inverter stages. Each oscillating signal has a frequency or amplitude or both that are variable dependent on a variable drive voltage. Each oscillating signal is phase shifted from a preceding oscillating signal. Each charge pump is connected to a corresponding one of the inverter stages to receive the oscillating signal produced by that inverter stage. Each charge pump outputs a voltage and current. The output of each charge pump is phase shifted from the outputs of other charge pumps. A combination of the currents thus produced is provided at about a voltage level to the load.

A disclosed switching regulator includes a speed-up circuit for speeding up an operation of an error amplifier circuit during the time starting from when a switching element is turned OFF based on an output of an abnormality detection circuit, or starting from a fixed period of time after the switching element is turned OFF based on the output of the abnormality detection circuit, until the next time the switching element is again turned OFF based on an output of a PWM comparison circuit.

A switching power converter includes a voltage source that provides an input voltage Vin to an unregulated DC/DC converter stage and at least one buck-boost converter stage to produce a desired output voltage Vout. The unregulated DC/DC converter stage is adapted to provide an isolated voltage to the at least one regulated buck-boost converter stage, wherein the unregulated DC/DC converter stage comprises a transformer having a primary winding and at least one secondary winding and at least one switching element coupled to the primary winding. The at least one buck-boost converter stage is arranged to operate in a buck mode, boost mode or buck-boost mode in response to a mode selection signal from a mode selection module. By influencing the pulse width modulation output power controller the at least one buck-boost converter stage is arranged to produce one or multiple output voltages.

A constant on-time switching converter includes a switching circuit, an on-time control circuit, a comparing circuit and a logic circuit. The switching circuit has a first switch and is configured to provide an output voltage to a load. The on-time control circuit generates an on-time control signal to control the on-time of the first switch. The comparing circuit compares the output voltage of the switching circuit with a reference signal and generates a comparison signal. The logic circuit generates a control signal to control the first switch based on the on-time control signal and the comparison signal. When the switching frequency of the switching circuit approaches an audible range, the switching converter enters into a sleep mode, the on-time control signal is reduced to increase the switching frequency of the switching circuit.

A power converting circuit includes an upper gate switch, a transistor, a current source circuit, a comparator circuit, a delay circuit, and a pulse width modulation signal generating circuit. The transistor and the current source circuit provide a reference signal. The comparator circuit generates a comparing signal according to the reference signal and an output signal provided by the upper gate switch. The delay circuit generates a delay signal according to the comparing signal and a clock signal. The pulse width modulation signal generating circuit generates a control signal for the upper gate switch according to the delay signal and the clock signal for configuring the conduction status of the upper gate switch. The power converting circuit adjusts the conduction time of the upper gate switch according to the reference signal and the output signal.

In various embodiments a controller for controlling the operation of a switched mode power supply is provided, the controller comprising: a first signal source configured to provide a first set of signals including a set signal and a clear signal, wherein the first set of signals may correspond to a first mode of operation of the switched mode power supply; a second signal source configured to provide a second set of signals including a set signal and a clear signal, wherein the second set of signals may correspond to a second mode of operation of the switched mode power supply; a selecting circuit coupled to the first signal source and to the second signal source, the selecting circuit being configured to select either the first set of signals or the second set of signals; a switching signal generating circuit coupled to the selecting circuit and configured to provide a switching signal to the switched mode power supply based on the set of signals received from the selecting circuit.

A step-down regulator comprising a pseudo constant on time control circuit is disclosed, comprising an on-time generator configured to receive a switching signal provided by the step-down regulator and a control signal provided by the pseudo constant on time control circuit, and generates an on-time signal; a feedback control circuit configured to receive a feedback signal representative of the output voltage of the step-down regulator and generate an output signal; and a logic control circuit coupled to the on-time generator and the feedback control circuit to receive the on-time signal and the output signal and generating the control signal, and a power stage configured to receive an input voltage and the control signal and generate the switching signal.

Systems and methods that provide control circuits having multiple sub-control inputs that control operation of a power electronics device (e.g., a power converter). Each of the multiple sub-control inputs are output from a separate sub-control circuit that includes a feedback circuit having an input tied to a common control node. The common control node is coupled to an input of a controller (e.g., a PWM controller). Outputs of each of the sub-control circuits are coupled to the common control node by a respective switch (e.g., diode, transistor, etc.) so that each of the sub-control circuits may be selectively coupled to the common control node to provide a control signal to a controller. Since components of each of the feedback compensations circuits are biased at a regulation voltage instead of a higher power supply voltage, the control circuit may switch between control modes with minimal delay.

A reference voltage circuit for generating a reference voltage to be referred when a pixel signal is digitally converted, includes ramp voltage generating means for generating a ramp voltage which drops from a predetermined initial voltage at a certain gradient, a transistor for forming, together with the ramp voltage generating means, a current mirror circuit, and gain change means for changing a current value of a current flowing from a predetermined power supply via the transistor to change the gradient of the ramp voltage generated by the ramp voltage generating means.

A power-supply circuit for a DC appliance includes an input unit including a first terminal and a second terminal so as to receive a DC current, an output unit including a third terminal to output the DC current entered by the input unit and a fourth terminal, a connection unit including a first conductive line and a second conductive line so as to interconnect the input unit and the output unit, a rectifier unit including first to fourth diodes coupled as a bridge diode format so as to rectify the input DC current in a predetermined direction, an inductor unit that is connected in series to the rectifier unit in such a manner that the input DC current is gradually increased from an abrupt change time point of the DC current, and a condenser unit that is connected in series to the inductor unit.

A method for linearizing voltage transmission through a transformer including a magnetic core and, input and output windings. A measurement signal is supplied to the input winding at a first frequency and an output signal is measured at the output winding of the transformer, wherein the voltage of the measurement signal may be so low that the transformer operates in a non-linear region. The method includes, for a conditioning signal, selecting a second frequency different from the first frequency, defining an amplitude value of the conditioning signal and supplying the conditioning signal to the input winding at the second frequency with the defined amplitude value so that the transformer operates in its linear region.

An electronic apparatus includes a switching element which has a control terminal and is driven by controlling voltage of the control terminal, a driving power supply circuit which supplies voltage required for driving the switching element, an on-driving circuit which is connected to the driving power supply circuit and the control terminal of the switching element and is supplied with voltage from the driving power supply circuit, and which applies a constant current to the control terminal of the switching element to charge the control terminal, thereby turning on the switching element, and at least one diode which is connected between the on-driving circuit and the control terminal of the switching element. The on-driving circuit applies a constant current to the control terminal of the switching element through the diode.

Polyphase converter, comprising a plurality of electrical phases (11 to 16), which can each be driven by switching means (21 to 26), wherein at least one coupling means (31 to 39) is provided, which magnetically couples at least one first phase (11) to at least one further phase (12, 14, 16), wherein at least two phases (11, 12) to be coupled are surrounded at least partially by the coupling means (31), wherein at least one insulating body (72) is provided, which on the upper or lower side thereof accommodates the phases (11 to 16) to be coupled and on which at least one fastening means (74, 76, 90) is provided, which interacts with at least one of the phases (11 to 16) for fastening purposes.

An integrated power quality control system includes a transformer with a primary winding, a secondary winding and a compensation winding wound on a magnetic core. A power electronic converter in the system provides a reference voltage to the compensation winding for injecting a series voltage in the secondary winding of the transformer. A controller is utilized to generate a reference control voltage for the power electronic converter based on a power quality control requirement.

A bridge-less step-up switching power supply device includes (i) a first and a second reactor having: a first and a second main winding connected to a first and a second input terminal, respectively; and a first and a second auxiliary winding magnetically coupled to the first main winding and connected to the first and second main windings, the first and second auxiliary windings having a first and a second leakage inductance, respectively; (ii) a first and a second diode connected between the first and second auxiliary windings and a first output terminal, respectively; (iii) a first capacitor connected between the first output terminal and a second output terminal; (iv) a second capacitor connected between a connection point of a third switch and a fourth switch, and the first output terminal; and (v) a controller for controlling turning on/off of first to fourth switches.

A system that manages a supplemental energy source connected to a power grid uses a two stage control strategy to manage power transfers in and out of the power grid as well as in and out of an energy storage system, such as a battery bank. One stage uses a non-linear transfer function to control an output frequency of a DC-to-AC inverter to limit undesired effects of power transients that occur on the grid. A second stage uses control strategy for transferring energy between the energy storage system and an internal DC link based on a relationship between a voltage on a DC link connecting the first and second stages and a DC link reference voltage, the voltage on the DC link, and a voltage at the energy storage system. The control strategy includes rapid charging, over-charging protection, and grid transient stabilization.

A switched mode power supply provides a reduction of switching losses and increased efficiency. The switched mode power supply includes a first switch coupled to an input terminal configured to receive an input voltage, a second switch, an inductor and an output capacitor. The first switch and the second switch are coupled together at a node, the inductor is coupled between the node and an output terminal, and the output capacitor is coupled to the output terminal. The switched mode power supply further includes a transformer coupled between a control input of the first switch and the node and a pulse generator connected to a control input of the second switch. Further, the transformer includes at most two windings, in particular a primary winding and a secondary winding which are not directly connected to each other.

There is provided a DC-DC converter which converts an input voltage into an output voltage for supply to a load, in which an input terminal receives the input voltage, an output terminal outputs the output voltage, power stages each includes: a high side switch, a low side switch and an inductor, the control unit executes a first mode and a second mode wherein the first mode controls the high side switch and the low side switch in each of the power stages so that a ratio of an output current in each of the power stages to a load current flowing through the load becomes a set value and the second mode controls the high side switch and the low side switch in each of the power stages so that duty ratios of the high side switch and the low side switch are equalized among the power stages.

A low-dropout voltage regulator includes a power transistor configured to receive an input voltage and to provide a regulated output voltage at an output voltage node. The power transistor includes a control electrode configured to receive a driver signal. A reference circuit is configured to generate a reference voltage. A feedback network is coupled to the power transistor and is configured to provide a first feedback signal and a second feedback signal. The first feedback signal represents the output voltage and the second feedback signal represents an output voltage gradient. An error amplifier is configured to receive the reference voltage and the first feedback signal representing the output voltage. The error amplifier is configured to generate the driver signal dependent on the reference voltage and the first feedback signal. The error amplifier includes an output stage that is biased with a bias current responsive to the second feedback signal.

A power control circuit for a power supply system including a control unit, a driving circuit and a power supply unit is disclosed. The power control circuit includes a current detection unit, a voltage detection unit and a power detection unit. The current detection unit is used for detecting a current signal. The voltage detection unit is used for detecting a voltage signal. The power detection unit is connected with the current detection unit, the voltage detection unit and the control unit for acquiring a power signal according to the current signal and voltage signal. By comparing an adjustable power reference signal with the power signal, the control unit issues a control signal to the driving circuit. In response to the control signal, the power supply unit is driven by the driving circuit to output an adjusted power to the load according to the adjustable power reference signal.

A mode controller shifts, along with increase in an electric power in first and second of chopper circuits and, operation modes of the first and the second of the chopper circuits from a first mode to a third mode via a second mode. An operation controller causes, in the first mode, the first of chopper circuit to perform an chopping operation, and the second of chopper circuit to suspend the chopping operation, in the second mode, causes the first and the second of chopper circuits to alternatively perform the chopping operations, and in the third mode causes both of the first and the second of chopper circuits to perform the chopping operations.

A counterbalance mechanism for counterbalancing weight of a bottom-hinged door (such as a clamshell-type airstair door of an aircraft) includes an operator handle, a hoist rod pivotally connected at one end to the operator handle and at an opposite end thereof to the door near a bottom region thereof. A force accumulator assembly is provided which includes a force biasing member which accumulates and dissipates a bias force when opening and closing the door, respectively, to provide mechanical counterbalance to the weight of the door. A bellcrank assembly operatively connects the operator handle to the force accumulator. In such a manner, weight counterbalancing of the door is achieved.

A device for accommodating objects, in particular for use in an airplane, comprises at least one panel. The panel has at least one outer edge which is provided with a rim in order to form a shock-absorbing edge. The rim comprises plastic that is integrally molded onto the outer edge of the panel. The device can be an airplane trolley, folding trolley, container or galley.

Baggage compartment 1 for an aircraft, wherein the baggage compartment 1 comprises a housing 2 and a baggage holder 3, wherein the baggage holder 3 is swivel-mounted about a swivel axis A in the housing 2, wherein, the swivel axis A intersects, in its longitudinal extent, a holder side wall 32 of the baggage holder 3 and/or a housing side wall 21 of the housing 2, wherein the baggage holder 3 can be moved from a closed position G into an open position Ö with a first swivel movement S1 and the baggage compartment 1 is opened and wherein the baggage holder 3 can be moved from the open position Ö into the closed position G with a second swivel movement S2 and the baggage compartment 1 is closed, wherein the baggage compartment 1 comprises a drive device 6 having at least one drive motor 9, wherein the drive device 6 is designed to drive the baggage holder 3 during the first and/or second swivel movement S1; S2 and to open or close the baggage compartment 1, wherein the drive device 6 is connected to the holder side wall 32 on one side and to the housing side wall 21 on the other side.

A radio controlled UAV is disclosed. The UAV includes a parachute, with a cylindrical power and control module suspended vertically below the parachute. In one embodiment, a propulsion source is mounted on top of the power and control module with control lines connected to the module below the propulsion source, and in another embodiment the power and control module is suspended from a point above a propulsion source. The UAV is controlled by radio controls from a hand held controller, with actuators retracting and letting out control lines attached to the parachute in order to control direction of the parachute. The UAV may be launched from a tube using a pressurized tank with a nozzle expelling gas from the tank, the tank and nozzle towing a canister from which the UAV is deployed.

In a method for reducing the impact of a force upon a person seated in a safety seat of a motor vehicle at least a seat unit of the safety seat is restrained at least in part by at least one support strap. The support strap is formed with an extension piece configured to lengthen when exposed to a load as a result of an accident or explosion. A winding unit holds the support strap to shorten an effective length of the support strap and to build up a force to maintain the support strap under tension after the support strap underwent a lengthening in an area of the extension piece as a result of a load caused by a force resulting from an accident or explosion so as to reestablish an effective length of the support strap for lengthening during a subsequent force impact.