tor

DIFFUSING REFLECTOR FOR LINEAR ARRAYS OF FINITE POINT LIGHT SOURCES

The present invention is a reflector with a cylindrical shape which diffuses the finite point light sources in a linear array to present a substantially smooth bar of light to the viewer of the reflector.




tor

A METHOD OF STORING/RECONSTRUCTING A MULTITUDE OF SEQUENCES IN/FROM A DATA STORAGE STRUCTURE

The invention relates to a computer implemented method of storing/recovering in/from a storage data structure a multitude of sequences that have been aligned with a reference data structure. The information of the sequences is stored in different sections. Each section comprises data streams comprising specific data of the sequences having a reference position in the reference position range associated with the data stream. In a first section, the length of the sequences is stored. In a second section, the mutations of a sequence with respect to the reference sequence are stored. In a third section, consensus based quality values are linked with positions in the reference sequence. In a fourth section, the sequence identifiers are stored. The storage data structure has a format which is optimized for viewer, re-alignment, variant calling and other post-processing tools.




tor

SELF-MONITORING TIME SERIES DATABASE SYSTEM THAT ENFORCES USAGE POLICIES

A self-monitoring time series database system which enforces usage policies is described. A time series database system receives an alert trigger condition for a system user, wherein the system user is associated with multiple time series data points corresponding to multiple subsystems of the time series database system. The time series database system aggregates the multiple time series data points in an internal time series data point, which is internal to the time series database system, associated with the system user. The time series database system evaluates whether the internal time series data point associated with the system user meets the alert trigger condition. The time series database system reduces a level of access by the system user to the time series database system in response to an evaluation that the internal time series data point associated with the system user meets the alert trigger condition.




tor

VIRTUAL IMPACTOR FILTER ASSEMBLY AND METHOD

A filter system and method use a filter housing that defines an interior chamber and that includes an inlet opening extending into the interior chamber. The outer air flow housing has an outlet conduit through which a flow of air having particles is directed toward the inlet opening of the filter housing along a flow direction toward the interior chamber of the filter housing. The outer air flow housing engages the filter housing such that the filter housing is separated from the outer air flow housing along the flow direction to permit at least some of the air to pass around an exterior of the filter housing and exit the outer air flow housing while the particles in the at least some of the air pass into the interior chamber of the filter housing through the inlet opening.




tor

DOWNDRAFT TABLE WITH SPARK ARRESTOR

Implementations disclosed herein provide a compact downdraft table comprising a spark arrestor oriented below a work surface, a vertically oriented cylindrical filter cartridge located below the work surface, a fan assembly that draws air through the work surface, the spark arrestor, and the filter cartridge and exhausts filtered air out of the downdraft table, a purge assembly that discharges purged air to an interior of the filter cartridge to purge particulates collected on an exterior of the filter cartridge, wherein the spark arrestor, filter cartridge, fan assembly, and purge assembly are all contained within a main housing for the downdraft table.




tor

ELECTROMECHANICAL WATER SEPARATOR

A water separator comprises an axially extending airflow passage, an airflow mixer, a plurality of electric plates of alternating charge, and a mechanical separator. The airflow mixer, the plurality of electric plates, and the mechanical separator are disposed within the airflow passage. The airflow mixer imparts a non-axial flow component on airflow through the airflow passage. The electric plates are situated downstream of the mixer, and create an electric field region within the airflow passage. The mechanical separator is situated at or downstream of the electric field region, and is disposed to separate water droplets from air.




tor

CENTRIFUGAL AIR SEPARATORS

Centrifugal air separators, systems including the same, and methods of separating gas are disclosed. Centrifugal air separators include a separation section configured to separate an input air stream into a clean air stream emitted from an exit port of the separation section and a waste stream emitted from a waste port of the separation section. The separation section includes a coiled duct and is configured to transmit through a duct entrance port a duct input air stream that is at least a portion of the input air stream and to at least partially separate the duct input air stream according to a molecular weight of gaseous components of the duct input air stream into a duct clean air stream that is at least a portion of the clean air stream and a duct waste stream that is at least a portion of the waste stream.




tor

SYSTEM AND METHOD FOR CONDENSING MOISTURE IN A BIOREACTOR GAS STREAM

Disclosed herein is a system and method for condensing moisture in a gas stream entering or leaving a bioreactor, the system comprising: a contact condenser container fluidically coupled to the bioreactor through an exhaust line; a condensate accumulator fluidically coupled to the contact condenser container through at least a first condensate line and a second condensate line; the condensate accumulator further fluidically coupled to the bioreactor through a condensate overflow line; a first condensate control device disposed on the first condensate line and configured to control a flow of condensate leaving the contact condenser container and entering the condensate accumulator; and a second condensate control device disposed on the second condensate line and configured to control a flow of condensate leaving the condensate accumulator to be mixed with the gas stream.




tor

DUCTLESS FUME HOOD GAS MONITORING AND DETECTION SYSTEM

A ductless fume hood suitable for the removal of various chemical materials including toxic and non-toxic gases, vapors, particles, dust and unpleasant odors from a fluid stream. The ductless fume hood uses electronic devices and software to enable real time monitoring of gas levels in parts per million.




tor

Manhole odor eliminator

A sewer gas odor absorption apparatus for a manhole having a perforate manhole cover disposed in the manhole which includes an imperforate housing having a seal dimensioned and configured for sealing engagement with the manhole, the housing has a first extremity and a second extremity and a passageway in fluid communication with ambient air above the manhole cover at the first extremity and in fluid communication with sewer gases at the second extremity thereof. A sub-assembly including a porous absorption media and a variable volume device disposed in mutual fluid communication in a subassembly having first and second axial extremities, the first and second extremities of the subassembly being disposed in fluid communication respectively with the first and second extremities of the imperforate housing.




tor

Lavatory pan device and non-water lavatory flushing system with the device

A lavatory pan device for separating stool and urine includes a stool and urine tray, a supporting device, and a moment force producing device. The stool and urine tray consists of a flat plate and the rib inclining upward and extending outward from the whole or partial edge of the flat plate. The lavatory pan has an opening or an entry way at the longitudinal side and is connected on the supporting device. Through the moment force produced by the prescribed moment force producing device, the stool and urine tray can roll over on the supporting device. The described moment force producing device is set on the stool and urine tray and it is between tow supports of the above supporting device and the opening or entry way.




tor

Toilet overfill regulator

A kit for calibrating an amount of water required by a toilet with an amount of water to be supplied to the toilet has a first recorder for determining an amount of water in a toilet bowl, a second recorder for determining an amount of water in a toilet tank if the water in the toilet bowl reaches a determined level, and a valve for setting an amount of water delivered to the tank if the water reaches a determined level in the tank.




tor

Integrally formed water and space saving lavatory-toilet fixture

This integrally formed water and space saving lavatory-toilet fixture enables hand washing with potable water from an existing toilet, recycles effluent completely, and provides sanitary, seamless, one-piece, full perimeter tank closure. A flexible hose re-directs supply away from the overflow through an interior fixture cavity and top cast opening toward a basin, that drains back into the reservoir as effluent; supplementing the required volume of water to complete one flush cycle. A cast sidewall basin opening is formed allowing potential drainage to flow through an internal hollow cavity directly into the tank reservoir below. The integrally formed fixture also includes a sloped front wall allowing additional hand washing space, vertically aligned space saving side and rear walls, and, an integrally formed perimeter rim conforming to the shape of the toilet tank edging below, providing hygienic, continuous tank containment and secure, detachable mounting.




tor

Initiating tractor stop and bale wrap function

A combination tractor and baler is provided to automate tractor stopping and baler wrapping while incorporating operator interaction to improve the efficiency of the tractor and baler combination in operation. Automated control systems and manual operator devices are utilized to improve the timing of the tractor stop and baler wrapping time sequences. Various methods to improve efficiency, including methods to synchronize tractor stop with wrapping activation are provided.




tor

Dual-pivoted quick bale ejector for round baler

The present invention relates to a baler ejection system that may be used with an agricultural harvester, such as a round baler, waste baler, combine, or cotton harvester. More particularly, the bale ejection system uses the motion of two pairs of parallel arms that extend transversely from the sidewalls of a bale chamber at two sets of distinct pivot points. When activated by the operator of the bale ejection system, the two pairs of parallel arms raise simultaneously to expose an outlet through which the bale may be ejected. The bale ejection system is designed to allow a larger outlet for the bale evacuation as compared to existing bale ejection systems that employ circular motion to expose the bale outlet. A formed bale may become ejected by one or more conveyer belts that exert a rearward force on the bale within the bale chamber.




tor

Biomass storage system

An apparatus for forming a water storage material from a biomass input material using supercritical or subcritical fluid processing, the water storage material capable of absorbing a liquid and releasing the liquid. The apparatus utilizes supercritical fluid processing, subcritical fluid processing, charring, or a combination thereof. The apparatus includes a controller configured to control the apparatus. The apparatus further including a processing station configured to hold the biomass input material, and to use the biomass input material for processing into the water storage material.




tor

Pneumatic fruit decelerator body

A decelerator apparatus for mounting at the end of a pneumatic or gravity-fed fruit harvesting or delivery tube. The decelerator comprises a housing with a moving decelerator body aligned with a fruit-receiving inlet connected to the delivery tube. The decelerator body, for example a padded rotating wheel, moves at a speed slower than the speed at which the fruit is delivered into the housing, includes multiple depressions or indentations for receiving and separating fruit, and further defines a compressive deceleration path that moves the fruit in a compressive but protective fit toward a housing exit, releasing the fruit after the fruit has been decelerated to the speed of the moving body.




tor

Rake positioned between a flail rotor and an auger

A flail rotor head attachment for use with any type harvesting machine having crop residue processing elements and including an input opening for receiving crop residue. The attachment includes a frame structure for operatively coupling the attachment to the harvesting machine, a flail rotor and an auger each mounted on the frame structure and a drive mechanism for rotating the flail rotor and the auger. The flail rotor includes a plurality of cutting elements for picking up and chopping crop residue from a field. The auger includes at least two flightings positioned in opposite directions for funneling crop residue towards the opening of the harvesting machine. Another embodiment includes a rake positioned between the flail rotor and the auger, the rake and the flail rotor rotating in the same direction and the auger rotating in an opposite direction.




tor

Nut tree pickup and debris separator

A nut tree pickup and debris separator comprising three separate but serially interconnected stages, each including optimized structural and functional features for nut harvesting. The first stage includes a rotary pickup brush and an endless conveyor. The conveyor is constructed from a plurality of parallel bars with flights therebetween, the rods being arranged in spaced relation to retain nuts and pass debris. The second stage comprises an inclined rotating drum whose sidewall includes a plurality of elongated apertures passing therethrough, sized to retain nuts and pass debris. An inner side of the sidewall has a helical flight, sized, configured, and arranged to convey and tumble nuts and debris through the drum, with debris falling through the apertures. The third stage includes vertically offset, tandem conveyors and a cleaning fan to remove any remaining debris from the nuts as the stream falls from the end of one conveyor onto the other.




tor

Semiconductor Device and Method of Forming Ultra High Density Embedded Semiconductor Die Package

A semiconductor device has a plurality of semiconductor die. A first prefabricated insulating film is disposed over the semiconductor die. A conductive layer is formed over the first prefabricated insulating film. An interconnect structure is formed over the semiconductor die and first prefabricated insulating film. The first prefabricated insulating film is laminated over the semiconductor die. The first prefabricated insulating film includes glass cloth, glass fiber, or glass fillers. The semiconductor die is embedded within the first prefabricated insulating film with the first prefabricated insulating film covering first and side surfaces of the semiconductor die. The interconnect structure is formed over a second surface of the semiconductor die opposite the first surface. A portion of the first prefabricated insulating film is removed after disposing the first prefabricated insulating film over the semiconductor die. A second prefabricated insulating film is disposed over the first prefabricated insulating film.




tor

METHOD OF MARKING A SEMICONDUCTOR PACKAGE

A method of making a semiconductor device can include providing a wafer comprising a plurality of semiconductor die, wherein each semiconductor die comprises an active surface and a backside opposite the active surface. A photosensitive layer can be formed over the wafer and on a backside of each of the plurality of semiconductor die within the wafer with a coating machine. An identifying mark can be formed within the photosensitive layer for each of the plurality of semiconductor die with a digital exposure machine and a developer, wherein a thickness of the identifying mark is less than or equal to 50 percent of a thickness of the photosensitive layer. The photosensitive layer can be cured. The wafer can be singulated into a plurality of semiconductor devices.




tor

FABRICATION METHOD OF SEMICONDUCTOR PACKAGE

A semiconductor package is provided, including: an insulating base body having a first surface with an opening and a second surface opposite to the first surface; an insulating extending body extending outward from an edge of the first surface of the insulating base body, wherein the insulating extending body is less in thickness than the insulating base body; an electronic element having opposite active and inactive surfaces and disposed in the opening with its inactive surface facing the insulating base body; a dielectric layer formed in the opening of the insulating base body and on the first surface of the insulating base body, the insulating extending body and the active surface of the electronic element; and a circuit layer formed on the dielectric layer and electrically connected to the electronic element. The configuration of the insulating layer of the invention facilitates to enhance the overall structural rigidity of the package.




tor

METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE HAVING MOISTURE-RESISTANT RINGS BEING FORMED IN A PERIPHERAL REGION

A semiconductor device includes a first moisture-resistant ring disposed in a peripheral region surrounding a circuit region on a semiconductor substrate in such a way as to surround the circuit region and a second moisture-resistant ring disposed in the peripheral region in such a way as to surround the first moisture-resistant ring.




tor

SEMICONDUCTOR MOUNTING APPARATUS, HEAD THEREOF, AND METHOD FOR MANUFACTURING LAMINATED CHIP

A semiconductor mounting apparatus includes a storing unit that stores a liquid or a gas, a contact unit that comes into contact with a semiconductor chip when the storing unit is filled with the liquid or the gas, and a sucking unit that sucks up the semiconductor chip to bring the semiconductor chip into close contact with the contact unit.




tor

SYSTEMS AND PROCESSES FOR MEASURING THICKNESS VALUES OF SEMICONDUCTOR SUBSTRATES

A system for determining thickness variation values of a semiconductor substrate comprises a substrate vacuumed to a pedestal that defines a reference plane for measuring the substrate. A measurement probe assembly determines substrate CTV and BTV values, and defines a substrate slope angle. A thermal bonding assembly attaches a die to the substrate at a bonding angle congruent with the substrate slope angle. A plurality of substrates are measured using the same reference plane on the pedestal. Associated methods and processes are disclosed.




tor

SYSTEMS AND METHODS FOR BONDING SEMICONDUCTOR ELEMENTS

A method of ultrasonically bonding semiconductor elements includes the steps of: (a) aligning surfaces of a plurality of first conductive structures of a first semiconductor element to respective surfaces of a plurality of second conductive structures of a second semiconductor element; (b) ultrasonically forming tack bonds between ones of the first conductive structures and respective ones of the second conductive structures; and (c) forming completed bonds between the first conductive structures and the second conductive structures.




tor

PACKAGING OPTOELECTRONIC COMPONENTS AND CMOS CIRCUITRY USING SILICON-ON-INSULATOR SUBSTRATES FOR PHOTONICS APPLICATIONS

Package structures and methods are provided to integrate optoelectronic and CMOS devices using SOI semiconductor substrates for photonics applications. For example, a package structure includes an integrated circuit (IC) chip, and an optoelectronics device and interposer mounted to the IC chip. The IC chip includes a SOI substrate having a buried oxide layer, an active silicon layer disposed adjacent to the buried oxide layer, and a BEOL structure formed over the active silicon layer. An optical waveguide structure is patterned from the active silicon layer of the IC chip. The optoelectronics device is mounted on the buried oxide layer in alignment with a portion of the optical waveguide structure to enable direct or adiabatic coupling between the optoelectronics device and the optical waveguide structure. The interposer is bonded to the BEOL structure, and includes at least one substrate having conductive vias and wiring to provide electrical connections to the BEOL structure.




tor

SEMICONDUCTOR DEVICE HAVING BURIED GATE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME, MEMORY CELL HAVING THE SAME AND ELECTRONIC DEVICE HAVING THE SAME

A semiconductor device includes a substrate comprising a trench; a gate dielectric layer formed over a surface of the trench; a gate electrode positioned at a level lower than a top surface of the substrate, and comprising a lower buried portion embedded in a lower portion of the trench over the gate dielectric layer and an upper buried portion positioned over the lower buried portion; and a dielectric work function adjusting liner positioned between the lower buried portion and the gate dielectric layer; and a dipole formed between the dielectric work function adjusting liner and the gate dielectric layer.




tor

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

Embodiments of the inventive concepts provide a method for manufacturing a semiconductor device. The method includes forming a stack structure including insulating layers and sacrificial layers which are alternately and repeatedly stacked on a substrate. A first photoresist pattern is formed on the stack structure. A first part of the stack structure is etched to form a stepwise structure using the first photoresist pattern as an etch mask. The first photoresist pattern includes a copolymer including a plurality of units represented by at least one of the following chemical formulas 1 to 3, wherein “R1”, “R2”, “R3”, “p”, “q” and “r” are the same as defined in the description.




tor

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

A performance of a semiconductor device is improved. A film, which is made of silicon, is formed in a resistance element formation region on a semiconductor substrate, and an impurity, which is at least one type of elements selected from a group including a group 14 element and a group 18 element, is ion-implanted into the film, and a film portion which is formed of the film of a portion into which the impurity is ion-implanted is formed. Next, an insulating film with a charge storage portion therein is formed in a memory formation region on the semiconductor substrate, and a conductive film is formed on the insulating film.




tor

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

A method of manufacturing a semiconductor device according to one embodiment includes forming a first film including a first metal above a processing target member. The method includes forming a second film including two or more types of element out of a second metal, carbon, and boron above the first film. The method includes forming a third film including the first metal above the second film. The method includes forming a mask film by providing an opening part to a stacked film including the first film, the second film and the third film. The method includes processing the processing target member by performing etching using the mask film as a mask.




tor

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

Embodiments of the inventive concept provide a method for manufacturing a semiconductor device. The method includes forming a stack structure by alternately and repeatedly stacking insulating layers and sacrificial layers on a substrate, sequentially forming a first lower layer and a first photoresist pattern on the stack structure, etching the first lower layer using the first photoresist pattern as an etch mask to form a first lower pattern. A first part of the stack structure is etched to form a stepwise structure using the first lower pattern as an etch mask. The first lower layer includes a novolac-based organic polymer, and the first photoresist pattern includes a polymer including silicon.




tor

METHODS OF MANUFACTURING THIN FILM TRANSISTOR AND ARRAY SUBSTRATE

A method of manufacturing a thin film transistor is disclosed. The method of manufacturing the thin film transistor includes: manufacturing a substrate; forming an oxide semiconductor layer on the substrate; forming a pattern including an active layer through a patterning process; forming a source and drain metal layer on the active layer; and forming a pattern including a source electrode and a drain electrode through a patterning process, an opening being formed between the source electrode and the drain electrode at a position corresponding to a region of the active layer used as a channel, wherein the step of forming the pattern including the source electrode and the drain electrode through a patterning process includes: removing a portion of the source and drain metal layer corresponding to the position of the opening through dry etching. The method may also be used to manufacturing a thin film transistor.




tor

METHOD OF USING A SURFACTANT-CONTAINING SHRINKAGE MATERIAL TO PREVENT PHOTORESIST PATTERN COLLAPSE CAUSED BY CAPILLARY FORCES

A first photoresist pattern and a second photoresist pattern are formed over a substrate. The first photoresist pattern is separated from the second photoresist pattern by a gap. A chemical mixture is coated on the first and second photoresist patterns. The chemical mixture contains a chemical material and surfactant particles mixed into the chemical material. The chemical mixture fills the gap. A baking process is performed on the first and second photoresist patterns, the baking process causing the gap to shrink. At least some surfactant particles are disposed at sidewall boundaries of the gap. A developing process is performed on the first and second photoresist patterns. The developing process removes the chemical mixture in the gap and over the photoresist patterns. The surfactant particles disposed at sidewall boundaries of the gap reduce a capillary effect during the developing process.




tor

TFT AND MANUFACTURING METHOD THEREOF, ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, X-RAY DETECTOR AND DISPLAY DEVICE

A TFT and manufacturing method thereof, an array substrate and manufacturing method thereof, an X-ray detector and a display device are disclosed. The manufacturing method includes: forming a gate-insulating-layer thin film (3'), a semiconductor-layer thin film (4') and a passivation-shielding-layer thin film (5') successively; forming a pattern (5') that includes a passivation shielding layer through one patterning process, so that a portion, sheltered by the passivation shielding layer, of the semiconductor-layer thin film forms a pattern of an active layer (4a'); and performing an ion doping process to a portion, not sheltered by the passivation shielding layer, of the semiconductor-layer thin film to form a pattern comprising a source electrode (4c') and a drain electrode (4b'). The source electrode (4c') and the drain electrode (4b') are disposed on two sides of the active layer (4a') respectively and in a same layer as the active layer (4a'). The manufacturing method can reduce the number of patterning processes and improve the performance of the thin film transistor in the array substrate.




tor

METHOD OF FORMING A SEMICONDUCTOR DEVICE

A method of forming a semiconductor device is provided such that a trench is formed in a semiconductor body at a first surface of the semiconductor body. Dopants are introduced into a first region at a bottom side of the trench by ion implantation. A filling material is formed in the trench. Dopants are introduced into a second region at a top side of the filling material. Thermal processing of the semiconductor body is carried out and is configured to intermix dopants from the first and the second regions by a diffusion process along a vertical direction perpendicular to the first surface.




tor

SEMICONDUCTOR DEVICE INCLUDING NANOWIRE TRANSISTORS WITH HYBRID CHANNELS

A semiconductor device is provided that includes an n-type field effect transistor including a plurality of vertically stacked silicon-containing nanowires located in one region of a semiconductor substrate, and a p-type field effect transistor including a plurality of vertically stacked silicon germanium alloy nanowires located in another region of a semiconductor substrate. Each vertically stacked silicon-containing nanowire of the n-type field effect transistor has a different shape than the shape of each vertically stacked silicon germanium alloy nanowire of the p-type field effect transistor.




tor

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

To provide a semiconductor device having improved reliability. After formation of an n+ type semiconductor region for source/drain, a first insulating film is formed on a semiconductor substrate so as to cover a gate electrode and a sidewall spacer. After heat treatment, a second insulating film is formed on the first insulating film and a resist pattern is formed on the second insulating film. Then, these insulating films are etched with the resist pattern as an etching mask. The resist pattern is removed, followed by wet washing treatment. A metal silicide layer is then formed by the salicide process.




tor

METHOD OF FORMING GATE STRUCTURE OF A SEMICONDUCTOR DEVICE

A method of fabricating a semiconductor device includes forming a gate strip including a dummy electrode and a TiN layer. The method includes removing a first portion of the dummy electrode to form a first opening over a P-active region and an isolation region. The method includes performing an oxygen-containing plasma treatment on a first portion of the TiN layer; and filling the first opening with a first metal material. The method includes removing a second portion of the dummy electrode to form a second opening over an N-active region and the isolation region. The method includes performing a nitrogen-containing plasma treatment on a second portion of the TiN layer; and filling the second opening with a second metal material. The second portion of the TiN layer connects to the first portion of the TiN layer over the isolation region.




tor

EXTREMELY THIN SILICON-ON-INSULATOR SILICON GERMANIUM DEVICE WITHOUT EDGE STRAIN RELAXATION

A method for forming a semiconductor structure includes forming a strained silicon germanium layer on top of a substrate. At least one patterned hard mask layer is formed on and in contact with at least a first portion of the strained silicon germanium layer. At least a first exposed portion and a second exposed portion of the strained silicon germanium layer are oxidized. The oxidizing process forms a first oxide region and a second oxide region within the first and second exposed portions, respectively, of the strained silicon germanium.




tor

GATE STRUCTURE OF FIELD EFFECT TRANSISTOR WITH FOOTING

In some embodiments, a field effect transistor structure includes a first semiconductor structure and a gate structure. The first semiconductor structure includes a channel region, and a source region and a drain region. The source region and the drain region are formed on opposite ends of the channel region, respectively. The gate structure includes a central region and footing regions. The central region is formed over the first semiconductor structure. The footing regions are formed on opposite sides of the central region and along where the central region is adjacent to the first semiconductor structure.




tor

SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME

The on-state characteristics of a transistor are improved and thus, a semiconductor device capable of high-speed response and high-speed operation is provided. A highly reliable semiconductor device showing stable electric characteristics is made. The semiconductor device includes a transistor including a first oxide layer; an oxide semiconductor layer over the first oxide layer; a source electrode layer and a drain electrode layer in contact with the oxide semiconductor layer; a second oxide layer over the oxide semiconductor layer; a gate insulating layer over the second oxide layer; and a gate electrode layer over the gate insulating layer. An end portion of the second oxide layer and an end portion of the gate insulating layer overlap with the source electrode layer and the drain electrode layer.




tor

Method of Forming a Semiconductor Structure Having Integrated Snubber Resistance

A semiconductor structure is disclosed. The semiconductor structure includes a source trench in a drift region, the source trench having a source trench dielectric liner and a source trench conductive filler surrounded by the source trench dielectric liner, a source region in a body region over the drift region. The semiconductor structure also includes a patterned source trench dielectric cap forming an insulated portion and an exposed portion of the source trench conductive filler, and a source contact layer coupling the source region to the exposed portion of the source trench conductive filler, the insulated portion of the source trench conductive filler increasing resistance between the source contact layer and the source trench conductive filler under the patterned source trench dielectric cap. The source trench is a serpentine source trench having a plurality of parallel portions connected by a plurality of curved portions.




tor

Method of Producing an Integrated Power Transistor Circuit Having a Current-Measuring Cell

A method for producing an integrated power transistor circuit includes forming at least one transistor cell in a cell array, each transistor cell having a doped region formed in a semiconductor substrate and adjoining a first surface of the semiconductor substrate on a first side of the semiconductor substrate, depositing a contact layer on the first side, structuring the contact layer to form a contact structure from the contact layer, the contact structure having, in a projection of the cell array orthogonal to the first surface, a first section and, outside the cell array, a second section which connects the first section to an interface structure, and forming an electrode structure on and in direct contact with the first section in the orthogonal projection of the cell array, the electrode structure being absent outside the cell array.




tor

SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME

A semiconductor device includes a substrate comprising a channel region and a recess, wherein the recess is located at both side of the channel region; a gate structure formed over the channel region; a first SiP layer covering bottom corners of the gate structure and the recess; and a second SiP layer formed over the first SiP layer and in the recess, wherein the second SiP layer has a phosphorus concentration higher than that of the first SiP layer.




tor

METHOD OF PRODUCTION OF SEMICONDUCTOR DEVICE

A method of production of a semiconductor device comprising a semiconductor layer forming step of forming a semiconductor layer including an inorganic oxide semiconductor on a board, a passivation film forming step of forming a passivation film comprising an organic material so as to cover the semiconductor layer, a baking step of baking the passivation film, and a cooling step of cooling the passivation film after baking, herein, in the cooling step, a cooling speed from a baking temperature at the time of baking in the baking step to a temperature 50° C. lower than the baking temperature is substantially controlled to 0.5 to 5° C./min in range is provided.




tor

METHODS OF GROWING HETEROEPITAXIAL SINGLE CRYSTAL OR LARGE GRAINED SEMICONDUCTOR FILMS AND DEVICES THEREON

A method is provided for making smooth crystalline semiconductor thin-films and hole and electron transport films for solar cells and other electronic devices. Such semiconductor films have an average roughness of 3.4 nm thus allowing for effective deposition of additional semiconductor film layers such as perovskites for tandem solar cell structures which require extremely smooth surfaces for high quality device fabrication.




tor

Magnetoresistive Random Access Memory Structure and Method of Forming the Same

A magnetoresistive random access memory (MRAM) structure includes a bottom electrode structure. A magnetic tunnel junction (MTJ) element is over the bottom electrode structure. The MTJ element includes an anti-ferromagnetic material layer. A ferromagnetic pinned layer is over the anti-ferromagnetic material layer. A tunneling layer is over the ferromagnetic pinned layer. A ferromagnetic free layer is over the tunneling layer. The ferromagnetic free layer has a first portion and a demagnetized second portion. The MRAM also includes a top electrode structure over the first portion.




tor

METHOD FOR MODE CONTROL IN MULTIMODE SEMICONDUCTOR WAVEGUIDE LASERS

One embodiment is a wide stripe semiconductor waveguide, which is cleaved at a Talbot length thereof, the wide stripe semiconductor waveguide having facets with mirror coatings. A system provides for selective pumping the wide stripe semiconductor waveguide to create and support a Talbot mode. In embodiments according to the present method and apparatus the gain is patterned so that a single unique pattern actually has the highest gain and hence it is the distribution that oscillates.




tor

Method and device for storing and carrying a portion of rope

An apparatus and method for carrying and storing a portion of rope is claimed. A portion of rope is braided and wound about two complementary loops. Attached to one complementary loop is a flexible fastener. The flexible fastener can be passed through the second complementary loop and attached to itself. The apparatus can then be worn as a bracelet. When the rope is needed, the person can unwind the rope. After using the rope, the rope can be rewound and then bound with the flexible fastener.