Reduction in cooling rate of a substrate having a lower temperature is suppressed because the substrate having a lower temperature is not affected by radiant heat of a substrate having a higher temperature while cooling a plurality of substrates in a cooling chamber. The substrate processing apparatus includes a load lock chamber configured to accommodate stacked substrates; a first transfer mechanism having a first transfer arm provided with a first end effector, and configured to transfer the substrates into/from the load lock chamber at a first side of the load lock chamber; a second transfer mechanism having a second transfer arm provided with a second end effector, and configured to transfer the substrates into/from the load lock chamber at a second side of the load lock chamber; a barrier installed between the substrates to be spaced apart from the substrates supported by a substrate support provided in the load lock chamber; and an auxiliary barrier unit installed between the substrate support and the barrier, wherein the auxiliary barrier unit is installed at places other than standby spaces of the end effectors.

Boom drive apparatus for substrate transport systems and methods are described. The boom drive apparatus is adapted to drive one or more multi-arm robots rotationally mounted to the boom to efficiently put or pick substrates. The boom drive apparatus has a boom including a hub, a web, a first pilot above the web, and a second pilot below the web, a first driving member rotationally mounted to the first pilot, a second driving member rotationally mounted to the second pilot, a first driven member rotationally mounted to the boom above the a web, a second driven member rotationally mounted to the boom below the a web, and a first and second transmission members coupling the driving members to driven members located outboard on the boom. Numerous other aspects are provided.

A robot system includes a crane unit, a crane moving mechanism, a robot, and a controller. The crane unit is to suspend a workpiece. The crane unit moves in a horizontal direction via the crane moving mechanism. The robot is to move the crane unit in the horizontal direction via the crane moving mechanism. The controller is configured to control the crane unit to move upwardly to suspend the workpiece after controlling the robot to bring the crane unit into an engaging state in which the crane unit engages with the workpiece located at a first position. The controller is configured to control the crane unit suspending the workpiece to move downwardly to place the workpiece at a second position after controlling the robot to move the crane unit toward the second position while the crane unit suspends the workpiece.

This invention provides a biomolecule modifying substrate comprising biomolecules selectively fixed to given regions thereon. The biomolecule modifying substrate comprises: a substrate at least comprising a first surface and a second surface; a first linker molecule comprising a hydrocarbon chain and a functional group capable of selectively binding to the first surface at one end of the hydrocarbon chain, which is bound to the first surface via such functional group; a second linker molecule comprising a reactive group capable of binding to the hydrocarbon chain of the first linker molecule, which is bound to the first linker molecule via a bond between the reactive group and the hydrocarbon chain; and a biomolecule bound thereto via the second linker molecule.

One exemplary process for manufacturing a surgical apparatus may include providing a flat, generally-planar strip of biocompatible material; cutting the strip to produce a feeder belt with at least one lateral edge, and staples affixed to the feeder belt in proximity to at least one lateral edge, where the staples and feeder belt are substantially aligned along a first plane; and bending at least one staple out of the first plane, while the feeder belt remains in the first plane. Another exemplary process for manufacturing a surgical apparatus may include providing a flat, generally-planar strip of biocompatible material; cutting that strip to produce a feeder belt with edges, and staples affixed to different edges of the feeder belt; and coining at least one staple after the cutting.

According to one embodiment, a system for manufacturing a semiconductor device includes a spontaneous joining unit and a deformative joining unit. The spontaneous joining unit overlaps a first substrate and a second substrate and spontaneously joins mutual center portions of respective joint faces of the first substrate and the second substrate. The deformative joining unit deforms at least one peripheral portion of the respective joint faces of the first substrate and second substrate joined by the spontaneous joining unit toward the other peripheral portion and joins the mutual peripheral portions of the respective joint faces.

Sliding element for seals includes 25 to 75 weight % carbonaceous impalpable powdery aggregate of non-graphitizing carbon and/or graphitizing carbon and 20 to 50 weight % synthetic resin as binder. The sliding element is blended with the range of 5 to 25 weight % carbonaceous carbon fibers without surface treatment and inside the carbon matrix, the carbon fibers are randomly scattered.

An improved manufacturing method for the hole-punching assembly of a hole-punching unit is disclosed. The method of the present invention comprises the following steps: (1) forming a plurality of aluminum balancing pieces with a rectangular shape by extrusion, and forming an indentation area on one side of each balancing piece; (2) forming an elongated slot by an application of stamping on the indentation area of each balancing piece; (3) obtaining a plurality of rectangular pieces (the number of which equals that of the balancing pieces), made of iron, and forming a row of holes by a single application of stamping on each rectangular piece; and (4) fitting each of the rectangular pieces onto the indentation area of a balancing piece, and connecting the balancing pieces together by screws or bolts. The manufacturing method can lower the production cost and simplify the production process of the hole-punching assembly.

Gum manufacturing machinery and method of manufacturing gum is illustrated in which a gum loafing machine generates loaves of finished gum that are then subsequently run through a gum conditioner to more uniformly set the temperature and viscosity of the gum material prior to further processing. Upon achieving the appropriate conditioning level, a further forming extruder may be used to generate a continuous gum ribbon for subsequent rolling and scoring operations. The gum conditioner may include vertically stacked conveyors that have different operational modes including a first mode that provides a serpentine path for a long residence time and a second mode that provides a cascading path that avoids or bypasses much of the length of some of the conveyors to provide a shorter residence time. The gum manufacturing machinery may be used in an adjustable manner so as to accommodate difference gum recipes for different batches of gum product.

A method and an installation are provided for preserving desired seasoning flavour profiles during the manufacturing of food-seasoning sheets. The method includes the steps of; laying a thin layer of adhesive on a base sheet; removing air from the adhesive prior to the step of laying; reducing free moisture from the adhesive during the step of laying, and depositing food-seasoning ingredients onto the thin layer of adhesive. The installation for manufacturing food-seasoning sheets includes an adhesive dispenser having a reservoir and a delivery slot communicating with the reservoir for dispensing adhesive. The dispenser has a heating element mounted thereto for heating the adhesive. The adhesive is made under a partial vacuum and it is conveyed to the dispenser in a partial vacuum.

An optical active fiber is configured with an asymmetrically-shaped core having at least one long axis and a shortest axis which extends transversely to the long axis. The outmost cladding of the active fiber is configured with a marking indicating the orientation of the short axis. The marking allows for bending the fiber so that the shortest axis extends along and lies in the plane of the bend thereby minimizing distortion of a mode which is guided by the asymmetrically-shaped core as light propagates along the bend.

A method of manufacturing an optical semiconductor device including: forming a mesa structure including a first conductivity type cladding layer, an active layer and a second conductivity type cladding layer in this order on a first conductivity type semiconductor substrate, an upper most surface of the mesa structure being constituted of an upper face of the second conductivity type cladding layer; growing a first burying layer burying both sides of the mesa structure at higher position than the active layer; forming an depressed face by etching both edges of the upper face of the second conductivity type cladding layer; and growing a second burying layer of the first conductivity type on the depressed face of the second conductivity type cladding layer and the first burying layer.

A manufacturing method for an excimer laser that includes a reflective Echelle diffraction grating includes obtaining information of a wavelength of a light source, a blazed order, a repetitive pitch of the grating, a material of the grating, and a predefined orientation ratio B/A that is a ratio between that a diffraction efficiency A of the blazed order and a diffraction efficiency Bb of an order lower by one order than the blazed order, and determining an initial value of a blaze angle based upon these pieces of information.

A wire-bound product using a double type laminated paper board and a method for manufacturing the same are disclosed. The wire-bound product employs a structure in which inner paper sheets are turned over in the rightward and leftward directions on front plates of a frame, instead a structure in which a plurality of inner paper sheets is turned over toward the rear surface of a frame, thereby allowing a user to see both surfaces of the inner paper sheets. Further, rear plates of the frame are inserted into various positions of a spring to support the front plates, thereby allowing a standing angle of the front plates of the frame to be adjustable.

In a machine (1) for manufacturing perfect-bound brochures (2) that includes a book block conveying device (10) with an endless conveying means (11), a plurality of clamps (14) that are arranged on the conveying means at a fixed pitch spacing (T) and serve for clamping book blocks (3, 3.1 . . . 3.8), and of at least one processing station (25, 18, 19, 20, 21, 22, 30) that can be adjusted in a motor-driven fashion, the cycle time (t0) referred to the conveyance of the clamps (14) by the pitch spacing (T) defined in the at least one processing station is divided into an adjusting segment (tV1, tV2) for resetting and/or adjusting the at least one processing station (25, 18, 19, 20, 21, 22, 30) in accordance with changing printed product characteristics and a processing segment (tB1, tB2) for processing the book blocks (3, 3.1 . . . 3.8) and/or covers (4, 4.1 . . . 4.4). The resetting of the at least one processing station to another printed product can take place within one work cycle (t0) of the respective processing station while the conveyance of the book blocks (3, 3.1 . . . 3.8) continues.

Method and device for manufacturing adhesively bound printed products composed of a book block and a cover, in which the book block is conducted past processing stations of the adhesive binding device for processing and applying glue to its back. A cover is supplied to the back to which glue has been applied in a synchronously timed controlled manner. After merging of the cover with the book block, a measuring procedure for measuring a mutual actual position of cover relative to book block. Subsequently, this actual position is compared to a predetermined desired position, and, in the case of deviations, a correction value is determined and stored. Prior to the renewed occurrence of the pairing of drive member and clamp, an appropriate change of the mutual positions of clamp and drive member is carried out.

Disclosed is a compressive album manufacturing apparatus in that independent areas for performing an aligning process, a heat providing process, a compressing process, and a cooling process respectively are formed in the multistage compressive album manufacturing apparatus, so that each process, which is done by hand, is merged into one, thereby rapidly manufacturing the bulk of compressive albums.

An example wheel restraint includes a track to be positioned adjacent a vehicle approach path of a loading dock. A shuttle is pivotally coupled to the track via a track follower and pivots between a home position and a deployed position about a shuttle axis substantially parallel to and offset relative to a longitudinal axis of the track. A barrier is pivotally coupled to the shuttle and pivots between a non-blocking position and a blocking position about a pivot axis substantially parallel to and spaced apart from the longitudinal axis of the track such that the shuttle rotates in a first direction about the shuttle axis when the shuttle moves from the home position to the deployed position and bather rotates in a second direction about the pivot axis when the barrier moves from the non-blocking position to the blocking position, where the first direction being different than the second direction.

A floorplan for a Structured ASIC chip is shown having a core region containing memory and VCLB logic cells surrounded by a plurality of IO connection fabrics that include a first IO connection fabric comprising IO sub-banks connecting the core of the chip to pins for external signals to the core, a first high-speed routing fabric disposed along the east-west vertical top of the core and connects the core to high-speed IO such as SerDes; a network-aware connection fabric connects the core to a microcontroller primarily for testing and repair of the memory in the core; and a second-high speed routing fabric is disposed on the north-south vertical sides of the core and communicates with the IO sub-banks. The VCLB Structured ASIC chip is manufactured on a 28 nm CMOS process lithographic node or smaller, having several metal layers and preferably is programmed on a single via layer.

The present invention discloses an Oven Controlled Crystal Oscillator and a manufacturing method thereof. The Oven Controlled Crystal Oscillator comprises a thermostatic bath, a heating device, a PCB and a signal generating element, where the signal generating element is used for generating a signal of a certain frequency, the heating device, the PCB and the signal generating element are mounted in the thermostatic bath, the signal generating element is mounted in a groove formed on one side of the PCB, while the heating device is mounted against the other side of the PCB that is opposite to the groove. The signal generating element may be a passive crystal resonator or an active crystal oscillator. The Oven Controlled Crystal Oscillator according to the invention is advantageous for a small volume and a high temperature control precision.

Power-efficient actuator apparatus and methods. In one exemplary embodiment, the actuator assembly utilizes a shape memory alloy (SMA) filament driven by an electronic power source to induce movement in the underlying assembly to actuate a load (e.g., water valve). In addition, a circuit board is included which allows the actuator assembly to be readily incorporated or retrofit into a wide range of systems such that the signal characteristics of the supply line can, among other applications, be conditioned in order to protect the SMA filament. Furthermore, the circuit board can also readily be adapted for use with “green” power sources such as photovoltaic systems and the like. Methods for manufacturing and utilizing the aforementioned actuator assembly are also disclosed.

The stack package includes a first semiconductor package and a second semiconductor package. The first semiconductor package includes a first substrate having a first modulus and at least one semiconductor chip mounted on the first substrate. The second semiconductor package stacked on the first semiconductor package and includes a second substrate having a second modulus and at least one semiconductor chip mounted on the second substrate. The second modulus is less than the first modulus. Even in the event that the first semiconductor package is under severe warpage due to a temperature change, the flexible second substrate, which includes e.g., polyimide or poly ethylene terephthalate, of the second semiconductor package may be less sensitive to the temperature change, thereby improving reliability of the stack package.

A through silicon via with sidewall roughness and methods of manufacturing the same are disclosed. The method includes forming a via in a substrate and roughening a sidewall of the via by depositing material within the via. The method further includes removing a backside of the substrate to form a through via with a roughened sidewall structure.

A multi-chip package is provided. The multi-chip package includes a plurality of chips including at least one bad chip and at least one good chip that are stacked and a plurality of through electrodes each penetrating the chips. A logic circuit included in the at least one bad chip is isolated from each of the plurality of through electrodes.

In various embodiments, a chip arrangement is provided. The chip arrangement may include a chip carrier and a chip mounted on the chip carrier. The chip may include at least two chip contacts and an insulating adhesive between the chip and the chip carrier to adhere the chip to the chip carrier. The at least two chip contacts may be electrically coupled to the chip carrier.

In manufacturing an LSI, or semiconductor integrated circuit device, the step of assembling device (such as resin sealing step) is normally followed by a voltage-application test in an environment of high temperature (e.g., from 85 to 130° C.) and high humidity (e.g., about 80% RH). It has been found that separation of a titanium nitride anti-reflection film from an upper film and generation of cracks in the titanium nitride film at an upper surface edge part of the aluminum-based bonding pad applied with a positive voltage in the test is caused by an electrochemical reaction due to moisture incoming through the sealing resin and the like to generate oxidation and bulging of the titanium nitride film. These problems are addressed by removing the titanium nitride film over the pad in a ring or slit shape at peripheral area of the aluminum-based bonding pad.

A larger substrate can be used, and a transistor having a desirably high field-effect mobility can be manufactured through formation of an oxide semiconductor layer having a high degree of crystallinity, whereby a large-sized display device, a high-performance semiconductor device, or the like can be put into practical use. A first multi-component oxide semiconductor layer is formed over a substrate and a single-component oxide semiconductor layer is formed thereover; then, crystal growth is carried out from a surface to an inside by performing heat treatment at 500° C. to 1000° C. inclusive, preferably 550° C. to 750° C. inclusive so that a first multi-component oxide semiconductor layer including single crystal regions and a single-component oxide semiconductor layer including single crystal regions are formed; and a second multi-component oxide semiconductor layer including single crystal regions is stacked over the single-component oxide semiconductor layer including single crystal regions.

A method for manufacturing a light-emitting device includes a step of forming an etching resistant protection layer on a substrate provided with an organic planarizing layer, a step of forming a plurality of electrodes on the etching resistant protection layer, a step of forming an organic compound layer on the substrate provided with the plurality of electrodes, a step of forming a resist layer on the organic compound layer formed on parts of electrodes among the plurality of electrodes using a photolithographic method, and a step of removing the organic compound layer in a region not covered with the resist layer by dry etching, wherein an entire surface of the organic planarizing layer on the substrate on which steps up to the step of forming the plurality of electrodes have been performed is covered with at least one of the etching resistant protection layer and the electrode.

An object of an embodiment of the present invention to be disclosed is to prevent oxygen from being taken in a single crystal semiconductor layer in laser irradiation even when crystallinity of the single crystal semiconductor layer is repaired by irradiation with a laser beam; and to make substantially equal or reduce an oxygen concentration in the semiconductor layer after the laser irradiation comparing before the laser irradiation. A single crystal semiconductor layer which is provided over a base substrate by bonding is irradiated with a laser beam, whereby the crystallinity of the single crystal semiconductor layer is repaired. The laser irradiation is performed under a reducing atmosphere or an inert atmosphere.

A first impurity region is formed by ion implantation through a first opening formed in a mask layer. By depositing a spacer layer on an etching stop layer on which the mask layer has been provided, a mask portion having the mask layer and the spacer layer is formed. By anisotropically etching the spacer layer, a second opening surrounded by a second sidewall is formed in the mask portion. A second impurity region is formed by ion implantation through the second opening. An angle of the second sidewall with respect to a surface is 90°±10° across a height as great as a second depth. Thus, accuracy in extension of an impurity region can be enhanced.

It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.

Disclosed is a semiconductor device including an oxide semiconductor film. A first oxide semiconductor film with a thickness of greater than or equal to 2 nm and less than or equal to 15 nm is formed over a gate insulating layer. First heat treatment is performed so that crystal growth from a surface of the first oxide semiconductor film to the inside thereof is caused, whereby a first crystal layer is formed. A second oxide semiconductor film with a thickness greater than that of the first oxide semiconductor film is formed over the first crystal layer. Second heat treatment is performed so that crystal growth from the first crystal layer to a surface of the second oxide semiconductor film is caused, whereby a second crystal layer is formed. Further, oxygen doping treatment is performed on the second crystal layer.

To provide a method by which a semiconductor device including a thin film transistor with excellent electric characteristics and high reliability is manufactured with a small number of steps. After a channel protective layer is formed over an oxide semiconductor film containing In, Ga, and Zn, a film having n-type conductivity and a conductive film are formed, and a resist mask is formed over the conductive film. The conductive film, the film having n-type conductivity, and the oxide semiconductor film containing In, Ga, and Zn are etched using the channel protective layer and gate insulating films as etching stoppers with the resist mask, so that source and drain electrode layers, a buffer layer, and a semiconductor layer are formed.

An object is to provide a thin film transistor and a method for manufacturing the thin film transistor including an oxide semiconductor with a controlled threshold voltage, high operation speed, a relatively easy manufacturing process, and sufficient reliability. An impurity having influence on carrier concentration in the oxide semiconductor layer, such as a hydrogen atom or a compound containing a hydrogen atom such as H2O, may be eliminated. An oxide insulating layer containing a large number of defects such as dangling bonds may be formed in contact with the oxide semiconductor layer, such that the impurity diffuses into the oxide insulating layer and the impurity concentration in the oxide semiconductor layer is reduced. The oxide semiconductor layer or the oxide insulating layer in contact with the oxide semiconductor layer may be formed in a deposition chamber which is evacuated with use of a cryopump whereby the impurity concentration is reduced.

A semiconductor device having favorable electric characteristics and a manufacturing method thereof are provided. A transistor includes an oxide semiconductor layer formed over an insulating layer, a source electrode layer and a drain electrode layer which overlap with part of the oxide semiconductor layer, a gate insulating layer in contact with part of the oxide semiconductor layer, and a gate electrode layer over the gate insulating layer. In the transistor, a buffer layer having n-type conductivity is formed between the source electrode layer and the oxide semiconductor layer and between the drain electrode layer and the oxide semiconductor layer. Thus, parasitic resistance is reduced, resulting in improvement of on-state characteristics of the transistor.

A highly reliable semiconductor device is manufactured by giving stable electric characteristics to a transistor in which an oxide semiconductor film is used for a channel. An oxide semiconductor film which can have a first crystal structure by heat treatment and an oxide semiconductor film which can have a second crystal structure by heat treatment are formed so as to be stacked, and then heat treatment is performed; accordingly, crystal growth occurs with the use of an oxide semiconductor film having the second crystal structure as a seed, so that an oxide semiconductor film having the first crystal structure is formed. An oxide semiconductor film formed in this manner is used for an active layer of the transistor.

A method for forming an amorphous semiconductor which contains an impurity element and has low resistivity and a method for manufacturing a semiconductor device with excellent electrical characteristics with high yield are provided. In the method for forming an amorphous semiconductor containing an impurity element, which utilizes a plasma CVD method, pulse-modulated discharge inception voltage is applied to electrodes under the pressure and electrode distance with which the minimum discharge inception voltage according to Paschen's Law can be obtained, whereby the amorphous semiconductor which contains an impurity element and has low resistivity is formed.

A sensor substrate includes a blocking pattern disposed on a base substrate, a first electrode disposed on the base substrate and overlapping the blocking pattern, the first electrode including a plurality of first unit parts arranged in a first direction, each of the first unit parts including a plurality of lines connected to each other in a mesh-type arrangement, a color filter layer disposed on the base substrate, a plurality of contact holes defined in the color filter layer and exposing the first unit parts, and a bridge line between and connected to first unit parts adjacent to each other in the first direction, through the contact holes.

An opposed substrate (9') comprises: a substrate (1); a static electricity protective electrode (2), a bridging electrode (4) and a touch induction electrode (6) comprising a plurality of sub-units sequentially formed on the substrate (1), wherein the distribution of the static electricity protective electrode (2) on the substrate (1) corresponds to dummy regions between sub-units, and the static electricity protective electrode (2), the bridging electrode (4) and the touch induction electrode (6) are insulated from each other. The opposed substrate (9') has a good touching effect. A method for manufacturing the opposed substrate, and a liquid crystal display touch panel are also disclosed.

In a semiconductor device, a first interlayer insulating layer made of an inorganic material and formed on inverse stagger type TFTs, a second interlayer insulating layer made of an organic material and formed on the first interlayer insulating layer, and a pixel electrode formed in contact with the second interlayer insulating layer are disposed on a substrate, and an input terminal portion that is electrically connected to a wiring of another substrate is provided on an end portion of the substrate. The input terminal portion includes a first layer made of the same material as that of the gate electrode and a second layer made of the same material as that of the pixel electrode. With this structure, the number of photomasks used in the photolithography method can be reduced to 5.

A liquid crystal display device includes a first substrate, a first electrode on the first substrate, a second substrate opposed to the first substrate, and a second electrode on the second substrate. The second electrode corresponds to the first electrode. The liquid crystal display device also includes a liquid crystal structure between the first electrode and the second electrode. The liquid crystal structure includes a plurality of liquid crystal molecules and at least one movement control member. The movement control member in the liquid crystal structure restricts a movement of the liquid crystal molecules.

The present invention provides an optical compensated bending (OCB) mode liquid crystal display (LCD) panel and a method for manufacturing the same. The method comprises the following steps: forming alignment layers on substrate, respectively; forming a liquid crystal layer between the alignment layers to form a liquid crystal cell; applying an electrical signal across the liquid crystal cell; and irradiating light rays to or heating the liquid crystal cell, so as to form a first polymer alignment layer and a second polymer alignment layer, respectively. The present invention can reduce a phase transition time of liquid crystal molecules from a splay state to a bent state.

Disclosed herein is a liquid crystal display device including a plurality of pixels each having a reflecting section and a transmitting section, the pixels each including a plurality of sub-pixels resulting from alignment division, the liquid crystal display device including: an element layer formed on a substrate; an insulating film formed on the substrate so as to cover the element layer; a pixel electrode formed on the insulating film so as to be connected to the element layer; a gap adjusting layer formed on the insulating film on the element layer including a region of connection between the element layer and the pixel electrode; and a dielectric formed on a connecting part for making an electric connection between the sub-pixels.

A liquid crystal display device includes a liquid crystal display element including a first alignment film and a second alignment film and a liquid crystal layer that is provided between the first alignment film and the second alignment film, wherein the first alignment film includes a compound in which a polymer compound that includes a cross-linked functional group or a polymerized functional group as a side chain is cross-linked or polymerized, the second alignment film includes the same compound as the compound that configures the first alignment film, and the formation and processing of the second alignment film is different from the formation and processing of the first alignment film and when a pretilt angle of the liquid crystal molecules which is conferred by the first alignment film is θ1 and a pretilt angle of the liquid crystal molecules which is conferred by the second alignment film is θ2, θ1>θ2.

The present invention provides a display device substrate, a display device substrate manufacturing method, a display device, a liquid crystal display device, a liquid crystal display device manufacturing method and an organic electroluminescent display device that allow suppressing faults derived from occurrence of gas and/or bubbles in a pixel region. The present invention is a display device substrate that comprises: a photosensitive resin film; and a pixel electrode, in this order, from a side of an insulating substrate. The display device substrate has a gas-barrier insulating film, at a layer higher than the photosensitive resin film, for preventing advance of a gas generated from the photosensitive resin film, or has a gas-barrier insulating film, between the photosensitive resin film and the pixel electrode, for preventing advance of gas generated from the photosensitive resin film.

Embodiments of the disclosed technology relate to a color filter substrate and a method of manufacturing the same. The color filter substrate comprises a base substrate having a black matrix pattern thereon, the black matrix pattern having a plurality of openings; and a plurality of color filter layers in different colors, disposed on the base substrate and located at the openings of the black matrix pattern, the color filter layers being glass layers in different colors.

A liquid crystal display panel, including: a pixel electrode formed on a first substrate; an alignment layer formed on the pixel electrode, wherein the alignment layer includes an alignment layer material and aligns first liquid crystal molecules in a direction substantially perpendicular to the pixel electrode; and a photo hardening layer formed on the alignment layer, wherein the photo hardening layer includes a photo hardening layer material and aligns second liquid crystal molecules to be tilted with respect to the pixel electrode, wherein the alignment layer material and the photo hardening layer material have different polarities from each other.

A liquid crystal display capable of realizing a high transmittance while maintaining favorable voltage response characteristics, and a method of manufacturing the same are provided. The liquid crystal display includes: a liquid crystal layer; a first substrate and a second substrate arranged to face each other with the liquid crystal layer in between; a plurality of pixel electrodes provided on a liquid crystal layer side of the first substrate; and an opposite electrode provided on the second substrate to face the plurality of pixel electrodes. One or both of a face on the liquid crystal layer side of the pixel electrode, and a face on the liquid crystal layer side of the opposite electrode includes a concavo-convex structure.

A seat cushion, in particular for an aircraft seat, the seat cushion comprising a seat part having a receiving surface adapted to receive a person and a reinforcing part supporting the seat part, wherein at least the reinforcing part contains expanded polypropylene (EPP), preferably comprising fire retardant properties. The invention further relates to a method for manufacturing such a seat cushion, a seat comprising such a seat cushion and a vehicle comprising such a seat.

A communication module is provided in which its characteristic of separation between its first and second tuner units is improved. The module is equipped with a circuit board having a first main surface, and a second main surface opposite to the first main surface; a first amplifier arranged on the first main surface, for amplifying a first signal; a first mixer arranged on the first main surface, for converting a signal supplied from the first amplifier to an intermediate-frequency signal; a second amplifier for amplifying a second signal; and a mixer for converting a signal supplied from the second amplifier to an intermediate-frequency signal, both arranged on the second main surface of the circuit board.