ópera Derivatives of normal Jacobi operator on real hypersurfaces in the complex quadric. (arXiv:2005.03483v1 [math.DG]) By arxiv.org Published On :: In cite{S 2017}, Suh gave a non-existence theorem for Hopf real hypersurfaces in the complex quadric with parallel normal Jacobi operator. Motivated by this result, in this paper, we introduce some generalized conditions named $mathcal C$-parallel or Reeb parallel normal Jacobi operators. By using such weaker parallelisms of normal Jacobi operator, first we can assert a non-existence theorem of Hopf real hypersurfaces with $mathcal C$-parallel normal Jacobi operator in the complex quadric $Q^{m}$, $m geq 3$. Next, we prove that a Hopf real hypersurface has Reeb parallel normal Jacobi operator if and only if it has an $mathfrak A$-isotropic singular normal vector field. Full Article
ópera Aspiration can promote cooperation in well-mixed populations as in regular graphs. (arXiv:2005.03421v1 [q-bio.PE]) By arxiv.org Published On :: Classical studies on aspiration-based dynamics suggest that a dissatisfied individual changes strategy without taking into account the success of others. This promotes defection spreading. The imitation-based dynamics allow individuals to imitate successful strategies without taking into account their own-satisfactions. In this article, we propose to study a dynamic based on aspiration which takes into account imitation of successful strategies for dissatisfied individuals. This helps cooperative members to resist. Individuals compare their success to their desired satisfaction level before making a decision to update their strategies. This mechanism helps individuals with a minimum of self-satisfaction to maintain their strategies. If an individual is dissatisfied, it will learn from others by choosing successful strategies. We derive an exact expression of the fixation probability in well-mixed populations as in structured populations in networks. As a result, we show that selection may favor cooperation more than defection in well-mixed populations as in populations ranged over a regular graph. We show that the best scenario is a graph with small connectivity. Full Article
ópera Sharp p-bounds for maximal operators on finite graphs. (arXiv:2005.03146v1 [math.CA]) By arxiv.org Published On :: Let $G=(V,E)$ be a finite graph and $M_G$ be the centered Hardy-Littlewood maximal operator defined there. We found the optimal value $C_{G,p}$ such that the inequality $$Var_{p}(M_{G}f)le C_{G,p}Var_{p}(f)$$ holds for every every $f:V o mathbb{R},$ where $Var_p$ stands for the $p$-variation, when: (i)$G=K_n$ (complete graph) and $pin [frac{ln(4)}{ln(6)},infty)$ or $G=K_4$ and $pin (0,infty)$;(ii) $G=S_n$(star graph) and $1ge pge frac{1}{2}$; $pin (0,frac{1}{2})$ and $nge C(p)<infty$ or $G=S_3$ and $pin (1,infty).$ We also found the optimal value $L_{G,2}$ such that the inequality $$|M_{G}f|_2le L_{G,2}|f|_2$$ holds for every $f:V o mathbb{R}$, when: (i)$G=K_n$ and $nge 3$;(ii)$G=S_n$ and $nge 3.$ Full Article
ópera Quantum arithmetic operations based on quantum Fourier transform on signed integers. (arXiv:2005.00443v2 [cs.IT] UPDATED) By arxiv.org Published On :: The quantum Fourier transform brings efficiency in many respects, especially usage of resource, for most operations on quantum computers. In this study, the existing QFT-based and non-QFT-based quantum arithmetic operations are examined. The capabilities of QFT-based addition and multiplication are improved with some modifications. The proposed operations are compared with the nearest quantum arithmetic operations. Furthermore, novel QFT-based subtraction and division operations are presented. The proposed arithmetic operations can perform non-modular operations on all signed numbers without any limitation by using less resources. In addition, novel quantum circuits of two's complement, absolute value and comparison operations are also presented by using the proposed QFT based addition and subtraction operations. Full Article
ópera Imitation Learning for Human-robot Cooperation Using Bilateral Control. (arXiv:1909.13018v2 [cs.RO] UPDATED) By arxiv.org Published On :: Robots are required to operate autonomously in response to changing situations. Previously, imitation learning using 4ch-bilateral control was demonstrated to be suitable for imitation of object manipulation. However, cooperative work between humans and robots has not yet been verified in these studies. In this study, the task was expanded by cooperative work between a human and a robot. 4ch-bilateral control was used to collect training data for training robot motion. We focused on serving salad as a task in the home. The task was executed with a spoon and a fork fixed to robots. Adjustment of force was indispensable in manipulating indefinitely shaped objects such as salad. Results confirmed the effectiveness of the proposed method as demonstrated by the success of the task. Full Article
ópera A Reduced Basis Method For Fractional Diffusion Operators II. (arXiv:2005.03574v1 [math.NA]) By arxiv.org Published On :: We present a novel numerical scheme to approximate the solution map $smapsto u(s) := mathcal{L}^{-s}f$ to partial differential equations involving fractional elliptic operators. Reinterpreting $mathcal{L}^{-s}$ as interpolation operator allows us to derive an integral representation of $u(s)$ which includes solutions to parametrized reaction-diffusion problems. We propose a reduced basis strategy on top of a finite element method to approximate its integrand. Unlike prior works, we deduce the choice of snapshots for the reduced basis procedure analytically. Avoiding further discretization, the integral is interpreted in a spectral setting to evaluate the surrogate directly. Its computation boils down to a matrix approximation $L$ of the operator whose inverse is projected to a low-dimensional space, where explicit diagonalization is feasible. The universal character of the underlying $s$-independent reduced space allows the approximation of $(u(s))_{sin(0,1)}$ in its entirety. We prove exponential convergence rates and confirm the analysis with a variety of numerical examples. Further improvements are proposed in the second part of this investigation to avoid inversion of $L$. Instead, we directly project the matrix to the reduced space, where its negative fractional power is evaluated. A numerical comparison with the predecessor highlights its competitive performance. Full Article
ópera Heidelberg Colorectal Data Set for Surgical Data Science in the Sensor Operating Room. (arXiv:2005.03501v1 [cs.CV]) By arxiv.org Published On :: Image-based tracking of medical instruments is an integral part of many surgical data science applications. Previous research has addressed the tasks of detecting, segmenting and tracking medical instruments based on laparoscopic video data. However, the methods proposed still tend to fail when applied to challenging images and do not generalize well to data they have not been trained on. This paper introduces the Heidelberg Colorectal (HeiCo) data set - the first publicly available data set enabling comprehensive benchmarking of medical instrument detection and segmentation algorithms with a specific emphasis on robustness and generalization capabilities of the methods. Our data set comprises 30 laparoscopic videos and corresponding sensor data from medical devices in the operating room for three different types of laparoscopic surgery. Annotations include surgical phase labels for all frames in the videos as well as instance-wise segmentation masks for surgical instruments in more than 10,000 individual frames. The data has successfully been used to organize international competitions in the scope of the Endoscopic Vision Challenges (EndoVis) 2017 and 2019. Full Article
ópera An Experimental Study of Reduced-Voltage Operation in Modern FPGAs for Neural Network Acceleration. (arXiv:2005.03451v1 [cs.LG]) By arxiv.org Published On :: We empirically evaluate an undervolting technique, i.e., underscaling the circuit supply voltage below the nominal level, to improve the power-efficiency of Convolutional Neural Network (CNN) accelerators mapped to Field Programmable Gate Arrays (FPGAs). Undervolting below a safe voltage level can lead to timing faults due to excessive circuit latency increase. We evaluate the reliability-power trade-off for such accelerators. Specifically, we experimentally study the reduced-voltage operation of multiple components of real FPGAs, characterize the corresponding reliability behavior of CNN accelerators, propose techniques to minimize the drawbacks of reduced-voltage operation, and combine undervolting with architectural CNN optimization techniques, i.e., quantization and pruning. We investigate the effect of environmental temperature on the reliability-power trade-off of such accelerators. We perform experiments on three identical samples of modern Xilinx ZCU102 FPGA platforms with five state-of-the-art image classification CNN benchmarks. This approach allows us to study the effects of our undervolting technique for both software and hardware variability. We achieve more than 3X power-efficiency (GOPs/W) gain via undervolting. 2.6X of this gain is the result of eliminating the voltage guardband region, i.e., the safe voltage region below the nominal level that is set by FPGA vendor to ensure correct functionality in worst-case environmental and circuit conditions. 43% of the power-efficiency gain is due to further undervolting below the guardband, which comes at the cost of accuracy loss in the CNN accelerator. We evaluate an effective frequency underscaling technique that prevents this accuracy loss, and find that it reduces the power-efficiency gain from 43% to 25%. Full Article
ópera Modeling of time-variant threshability due to interactions between a crop in a field and atmospheric and soil conditions for prediction of daily opportunity windows for harvest operations using field-level diagnosis and prediction of weather conditions an By www.freepatentsonline.com Published On :: Tue, 19 May 2015 08:00:00 EDT A modeling framework for evaluating the impact of weather conditions on farming and harvest operations applies real-time, field-level weather data and forecasts of meteorological and climatological conditions together with user-provided and/or observed feedback of a present state of a harvest-related condition to agronomic models and to generate a plurality of harvest advisory outputs for precision agriculture. A harvest advisory model simulates and predicts the impacts of this weather information and user-provided and/or observed feedback in one or more physical, empirical, or artificial intelligence models of precision agriculture to analyze crops, plants, soils, and resulting agricultural commodities, and provides harvest advisory outputs to a diagnostic support tool for users to enhance farming and harvest decision-making, whether by providing pre-, post-, or in situ-harvest operations and crop analyzes. Full Article
ópera Systems and methods for control reliability operations using TMR By www.freepatentsonline.com Published On :: Tue, 26 May 2015 08:00:00 EDT In one embodiment, a system includes a data collection system configured to collect a data from a control system by using an offline mode of operations. The system further includes a configuration management system configured to manage a hardware configuration and a software configuration for the control system based on the data. The system additionally includes a rule engine configured to use the data as input and to output a health assessment by using a rule database, and a report generator configured to provide a health assessment for the control system. Full Article
ópera Techniques for reusing components of a logical operations functional block as an error correction code correction unit By www.freepatentsonline.com Published On :: Tue, 26 May 2015 08:00:00 EDT A logical operations functional block for an execution unit of a processor includes a first input data link for a first operand and a second input data link for a second operand. The execution unit includes a register connected to an error correction code detection unit. The logical operations functional block includes a look-up table configured to receive an error correction code syndrome from the error correction code detection unit. The logical operations functional block also includes a multiplexer configured to receive an output signal from the look-up table at a first input and the first operand at a second input, wherein an output of the multiplexer is coupled to the first input data link of a logical functional unit. Full Article
ópera Memory controller and operating method of memory controller By www.freepatentsonline.com Published On :: Tue, 26 May 2015 08:00:00 EDT A method of operating a memory controller to control a memory device includes reading a read vector from the memory device and correcting one or more errors in the read vector, where a power consumed at the correcting is varied according to the number of errors in the read vector. Full Article
ópera Processor and operating method By www.freepatentsonline.com Published On :: Tue, 28 Apr 2015 08:00:00 EDT Disclosed is a processor that is able to efficiently execute DFT operations without having part of a basic operational circuit idle even during non-DFT-operation processing. The processor (1) has an operational means (operation unit) (2) and a control means (control unit) (3). The operation means (2) has a plurality of shift addition-and-subtraction means connected such that CORDIC (COordinate Rotation DIgital Computer) operations can be executed. The shift adding-and-subtracting means also execute shift addition-and-subtraction processing of butterfly operations that process shift addition-and-subtraction for one stage or more. The control means (3) instructs the operation means (2) to execute either CORDIC operations or butterfly operations, based on a plurality of data received from the outside. Full Article
ópera Method and apparatus for performing logical compare operations By www.freepatentsonline.com Published On :: Tue, 19 May 2015 08:00:00 EDT A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, instruction decode logic decodes instructions for an execution unit to operate on packed data elements including logical comparisons. A register file including 128-bit packed data registers stores packed single-precision floating point (SPFP) and packed integer data elements. The logical comparisons may include comparison of SPFP data elements and comparison of integer data elements and setting at least one bit to indicate the results. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting the at least one bit, which in turn may be utilized by a branching unit in response to a branch instruction. Alternatively, the branch support actions may include branching to an indicated target code location. Full Article
ópera Method and apparatus for performing logical compare operations By www.freepatentsonline.com Published On :: Tue, 19 May 2015 08:00:00 EDT A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, instruction decode logic decodes instructions for an execution unit to operate on packed data elements including logical comparisons. A register file including 128-bit packed data registers stores packed single-precision floating point (SPFP) and packed integer data elements. The logical comparisons may include comparison of SPFP data elements and comparison of integer data elements and setting at least one bit to indicate the results. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting the at least one bit, which in turn may be utilized by a branching unit in response to a branch instruction. Alternatively, the branch support actions may include branching to an indicated target code location. Full Article
ópera System and method of operating a computing device to perform memoization including transforming input/output parameters to reduce redundancies and efficiently cache data By www.freepatentsonline.com Published On :: Tue, 19 May 2015 08:00:00 EDT A system (200) and a method (100) of operating a computing device to perform memoization are disclosed. The method includes determining whether a result of a function is stored in a cache and, if so, retrieving the result from the cache and, if not, calculating the result and storing it in the cache. The method (100) includes transforming (104) by the computing device at least one selected from the input parameters and the output parameters of the function, the transforming being based on an analysis of the function and its input arguments to establish whether or not there is a possible relationship reflecting redundancy among the input parameters and output parameters of the function. The transforming may include at least one of: use of symmetry, scaling, linear shift, interchanging of variables, inversion, polynomial and/or trigonometric transformations, spectral or logical transformations, fuzzy transformations, and systematic arrangement of parameters. Full Article
ópera Method and apparatus for performing logical compare operation By www.freepatentsonline.com Published On :: Tue, 26 May 2015 08:00:00 EDT A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, instruction decode logic decodes instructions for an execution unit to operate on packed data elements including logical comparisons. A register file including 128-bit packed data registers stores packed single-precision floating point (SPFP) and packed integer data elements. The logical comparisons may include comparison of SPFP data elements and comparison of integer data elements and setting at least one bit to indicate the results. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting the at least one bit, which in turn may be utilized by a branching unit in response to a branch instruction. Alternatively, the branch support actions may include branching to an indicated target code location. Full Article
ópera Semiconductor memory device and operation method thereof By www.freepatentsonline.com Published On :: Tue, 26 May 2015 08:00:00 EDT A semiconductor memory device includes a selection signal generation unit configured to generate a plurality of selection signals that are sequentially activated, a path selection unit configured to select a transmission path of sequentially input information data in response to the plurality of selection signals, a plurality of first storage units, each configured to have a first storage completion time and store an output signal of the path selection unit, and a plurality of second storage units, each configured to have a second storage completion time, which is longer than the first storage completion time, and store a respective output signal of the plurality of first storage units. Full Article
ópera Data storage device and operating method thereof By www.freepatentsonline.com Published On :: Tue, 26 May 2015 08:00:00 EDT A data storage device includes a first memory device configured to store data having a first property, a second memory device configured to store data having a second property, and a controller. The controller selects data stored in the first memory device, and transfers the selected data to the second memory device or stores the selected data in another physical location of the first memory device selectively depending on an update count (UC) of an address at which the selected data is stored. Full Article
ópera Apparatuses enabling concurrent communication between an interface die and a plurality of dice stacks, interleaved conductive paths in stacked devices, and methods for forming and operating the same By www.freepatentsonline.com Published On :: Tue, 01 Sep 2015 08:00:00 EDT Various embodiments include apparatuses, stacked devices and methods of forming dice stacks on an interface die. In one such apparatus, a dice stack includes at least a first die and a second die, and conductive paths coupling the first die and the second die to the common control die. In some embodiments, the conductive paths may be arranged to connect with circuitry on alternating dice of the stack. In other embodiments, a plurality of dice stacks may be arranged on a single interface die, and some or all of the dice may have interleaving conductive paths. Full Article
ópera Electronic devices and methods for sharing peripheral devices in dual operating systems By www.freepatentsonline.com Published On :: Tue, 01 Dec 2015 08:00:00 EST A method for sharing peripheral devices in dual operating systems for an electronic device having at least one peripheral device is provided. The method includes: receiving a setting value for the peripheral device under the first operating system from a user; activating a second operating system; transmitting the setting value to the second operating system; and switching from the first operating system to the second operating system, wherein the second operating system sets the peripheral device with the setting value and enables the electronic device to operate under the second operating system. Full Article
ópera System and method for below-operating system trapping and securing loading of code into memory By www.freepatentsonline.com Published On :: Tue, 19 May 2015 08:00:00 EDT A system for protecting an electronic device against malware includes a memory, an operating system configured to execute on the electronic device, and a below-operating-system security agent. The below-operating-system security agent is configured to trap an attempted access of a resource of the electronic device, access one or more security rules to determine whether the attempted access is indicative of malware, and operate at a level below all of the operating systems of the electronic device accessing the memory. The attempted access includes attempting to write instructions to the memory and attempting to execute the instructions. Full Article
ópera Operand and limits optimization for binary translation system By www.freepatentsonline.com Published On :: Tue, 28 Apr 2015 08:00:00 EDT Methods and systems for optimizing generation of natively executable code from non-native binary code are disclosed. One method includes receiving a source file including binary code configured for execution according to a non-native instruction set architecture. The method also includes translating one or more code blocks included in the executable binary code to source code, and applying an optimizing algorithm to instructions in the one or more code blocks. The optimizing algorithm is selected to reduce a number of memory address translations performed when translating the source code to native executable binary code, thereby resulting in one or more optimized code blocks. The method further includes compiling the source code to generate an output file comprising natively executable binary code including the one or more optimized code blocks. Full Article
ópera Virtualization support for branch prediction logic enable / disable at hypervisor and guest operating system levels By www.freepatentsonline.com Published On :: Tue, 12 May 2015 08:00:00 EDT A hypervisor and one or more guest operating systems resident in a data processing system and hosted by the hypervisor are configured to selectively enable or disable branch prediction logic through separate hypervisor-mode and guest-mode instructions. By doing so, different branch prediction strategies may be employed for different operating systems and user applications hosted thereby to provide finer grained optimization of the branch prediction logic for different operating scenarios. Full Article
ópera System, method and computer program product for recursively executing a process control operation to use an ordered list of tags to initiate corresponding functional operations By www.freepatentsonline.com Published On :: Tue, 19 May 2015 08:00:00 EDT In accordance with embodiments, there are provided mechanisms and methods for controlling a process using a process map. These mechanisms and methods for controlling a process using a process map can enable process operations to execute in order without necessarily having knowledge of one another. The ability to provide the process map can avoid a requirement that the operations themselves be programmed to follow a particular sequence, as can further improve the ease by which the sequence of operations may be changed. Full Article
ópera Storing in other queue when reservation station instruction queue reserved for immediate source operand instruction execution unit is full By www.freepatentsonline.com Published On :: Tue, 26 May 2015 08:00:00 EDT A processing apparatus includes an execution unit which performs computation on two operand inputs each being selectable between read data from a register and an immediate value. The processing apparatus also includes another execution unit which performs computation on two operand inputs, one of which is selectable between read data from a register and an immediate value, and the other of which is an immediate value. A control unit determines, based on a received instruction specifying a computation on two operands, whether each of the two operands specifies read data from a register or an immediate value. Depending on the determination result, the control unit causes one of the execution units to execute the computation specified by the received instruction. Full Article
ópera Electronic system with system modification control mechanism and method of operation thereof By www.freepatentsonline.com Published On :: Tue, 26 May 2015 08:00:00 EDT An electronic system and method of operation thereof includes: a control unit for receiving a patterned signal; a recognizer module, coupled to the control unit, for recognizing an unique trigger from the patterned signal; an operation module, coupled to the recognizer module, for detecting an operational mode from the unique trigger; and a change module, coupled to the operation module, for configuring a system state change of a memory sub-system based on the operational mode. Full Article
ópera Method for operating an internal combustion engine By www.freepatentsonline.com Published On :: Tue, 26 May 2015 08:00:00 EDT A method for operating an internal combustion engine in which a speed-based feature of the internal combustion engine, which is correlated with an indicated mean effective pressure of the fuel, is determined during the warm-up of the internal combustion engine and an ideal fuel quantity, which is to be injected into at least one combustion chamber of the internal combustion engine during the warm-up, is ascertained therefrom. Full Article
ópera Navigation system with fuzzy routing mechanism and method of operation thereof By www.freepatentsonline.com Published On :: Tue, 26 May 2015 08:00:00 EDT A method of operation of a navigation system includes: receiving an origin and a destination; receiving a route keyword for routing between the origin and the destination; identifying a via point matching the route keyword; calculating a keyword group locale based on the via point within a group distance threshold from a keyword group center; and calculating a travel route from the origin to the destination traversing the keyword group locale for displaying on a device. Full Article
ópera Placement based arithmetic operator selection By www.freepatentsonline.com Published On :: Tue, 26 May 2015 08:00:00 EDT Methods and systems are described for placing arithmetic operators on a programmable integrated circuit device (e.g., a PLD). Placement of arithmetic operators of a data flow graph in one of multiple regions (e.g., a region of DSP circuitry blocks or a region of logic fabric circuitry) on the programmable integrated circuitry device may be determined (e.g., randomly). A score related to the performance of the graph (e.g., a score related to data flow graph routing delays or area consumed by the data flow graph) may be determined and this process may be repeated after one of the arithmetic operators of the data flow graph is moved. The placement of arithmetic operators that corresponds to the best value for the score related to the performance of the data flow graph may be stored. Accordingly, more arithmetic operators may be included on a programmable integrated device than in conventional devices. Full Article
ópera Energy storage device and operating method By www.freepatentsonline.com Published On :: Tue, 21 Apr 2015 08:00:00 EDT In order to store excess kinetic energy, an energy storage device and an operating method are described, in which the kinetic energy can be partially converted into electrical energy by a first electric machine using at least two electric machines arranged on a shaft and can be partially converted into additional kinetic energy, such as rotational energy, by a second electric machine. The method for energy storage of excess kinetic energy provides for converting kinetic energy partially into electric energy and partially into additional kinetic energy, such as rotational energy. Full Article
ópera Systems, methods, and apparatus for calibrating, controlling, and operating a quantum processor By www.freepatentsonline.com Published On :: Tue, 21 Apr 2015 08:00:00 EDT Quantum annealing may include applying and gradually removing disorder terms to qubits of a quantum processor, for example superconducting flux qubits of a superconducting quantum processor. A problem Hamiltonian may be established by applying control signals to the qubits, an evolution Hamiltonian established by applying disorder terms, and annealing by gradually removing the disorder terms. Change in persistent current in the qubits may be compensated. Multipliers may mediate coupling between various qubits and a global signal line, for example by applying respective scaling factors. Two global signal lines may be arranged in an interdigitated pattern to couple to respective qubits of a communicatively coupled pair of qubits. Pairs of qubits may be communicatively isolated and used to measure a response of one another to defined signals. Full Article
ópera Using a physical phenomenon detector to control operation of a speech recognition engine By www.freepatentsonline.com Published On :: Tue, 19 May 2015 08:00:00 EDT A device may include a physical phenomenon detector. The physical phenomenon detector may detect a physical phenomenon related to the device. In response to detecting the physical phenomenon, the device may record audio data that includes speech. The speech may be transcribed with a speech recognition engine. The speech recognition engine may be included in the device, or may be included with a remote computing device with which the device may communicate. Full Article
ópera Systems and methods for operating a flash memory file system By www.freepatentsonline.com Published On :: Tue, 26 May 2015 08:00:00 EDT A flash memory file system including a plurality of flash modules. Each of the plurality of flash modules includes a respective cache memory, a respective flash memory, and a respective flash controller in communication with the respective cache memory and the respective flash memory. A first flash module of the plurality of flash modules is configured to receive a file lookup message including a path name for file data stored on a second flash module of the plurality of flash modules. A third flash module of the plurality of flash modules is configured to select the second flash module based on the path name and a directory table, and generate a file metadata message responsive to the file lookup message. The file metadata message identifies the second flash module as containing the file data. Full Article
ópera System and method for determining a level of success of operations on an abstraction of multiple logical data storage containers By www.freepatentsonline.com Published On :: Tue, 26 May 2015 08:00:00 EDT Various systems and methods are described for configuring a logical data storage container. In one embodiment, an instruction to perform an operation to modify an attribute of the logical data storage container that is an abstraction of a plurality of pertinent storage containers is received. A translated instruction to perform a sub-operation associated with the operation is transmitted to each of a number of the plurality of pertinent storage containers. A level of success of the performing of the operation on the logical data storage container is detected based on a comparison of a threshold value to a level of success of the performing of the sub-operation on each of the number of the plurality of pertinent storage containers. A report of the detected level of success is communicated. Full Article
ópera Ozonolysis operations for generation of reduced and/or oxidized product streams By www.freepatentsonline.com Published On :: Tue, 19 May 2015 08:00:00 EDT The present invention relates to methods for safe and efficient use of hydrogen and oxygen in ozonolysis operations. The invention also relates to an ozonolysis process involving elements of both reductive and oxidative ozonolysis which are integrated in a continuous process. In one embodiment, the ozonolysis process of the present invention uses hydrogen and/or oxygen generated from water and electricity, which may be recycled to generate water and/or electricity. Full Article
ópera Multi-cluster processing system and method of operating the same By www.freepatentsonline.com Published On :: Tue, 26 May 2015 08:00:00 EDT A multi-cluster processing system and a method of operating a multi-cluster processing system are provided. The multi-cluster processing system includes: a first cluster including a plurality of first-type cores: a second cluster including a plurality of second-type cores; and a control unit configured to monitor loads of the first-type cores and the second-type cores, wherein when utilization of at least one of enabled first-type cores exceeds a predetermined threshold utilization of each of the first-type cores, the control unit enables at least one of disabled first-type cores in a first mode, and the control unit enables at least one of the disabled second-type cores and disables the first cluster in a second mode, wherein an amount of computation per unit of time of each of the second-type cores is greater than an amount of computation per unit of time of each of the first-type cores. Full Article
ópera Method for operating invisible system services on android platform By www.freepatentsonline.com Published On :: Tue, 26 May 2015 08:00:00 EDT A method for operating an invisible system service on Android platform is disclosed. The method for operating system services on Android platform includes selectively registering a created system service in a context manager according to a type of the created system service, where the type of the system service comprises a first type for permitting access from an outside and a second type for not permitting access from the outside, and the selectively registering comprises registering in the context manager the created system service belonging to the first type and not registering in the context manager the created system service belonging to the second type. Full Article
ópera 3D ultrasound system for intuitive displaying to check abnormality of object and method for operating 3D ultrasound system By www.freepatentsonline.com Published On :: Tue, 02 Jun 2015 08:00:00 EDT Provided are a three-dimensional (3D) ultrasound system and a method for operating the 3D ultrasound system, which are capable of intuitively displaying the abnormality of an object by determining a grade by comparing measurement data obtained by measuring ultrasound data relating to the object and displaying the measurement data in a different way based on the determined grade. Full Article
ópera Systems and methods for analyzing building operations sensor data By www.freepatentsonline.com Published On :: Tue, 26 May 2015 08:00:00 EDT Systems and methods are disclosed for analyzing building sensor information and decomposing the information therein to a more manageable and more useful form. Certain embodiments integrate energy-based and spectral-based analysis methods with parameter sampling and uncertainty/sensitivity analysis to achieve a more comprehensive perspective of building behavior. The results of this analysis may be presented to a user via a plurality of visualizations and/or used to automatically adjust certain building operations. In certain embodiments, advanced spectral techniques, including Koopman-based operations, are employed to discern features from the collected building sensor data. Full Article
ópera Operating method of sensor node, operating method of data sink in sensor network, and sensor network By www.freepatentsonline.com Published On :: Tue, 26 May 2015 08:00:00 EDT Provided is an operating method of a sensor node. The operating method of a sensor node includes receiving a sensing request, adjusting a sensing condition on the basis of the received sensing request, and sensing according to the adjusted sensing condition. Full Article
ópera Method for optimizing the operation of a hydrocarbon synthesis unit starting from synthesis gas, by controlling the partial pressure of CO By www.freepatentsonline.com Published On :: Tue, 27 Jan 2015 08:00:00 EST A method is described for optimizing the operation of a reaction section for the synthesis of hydrocarbons from a feed comprising synthesis gas, operated in the presence of a catalyst comprising cobalt, said method comprising the following steps: a) determining the theoretical partial pressure of CO in the reaction section;b) optionally, adjusting the partial pressure of CO determined in step a) to a value of 4 bar or higher;c) determining a new value for the theoretical partial pressure of CO in the reaction section. Full Article
ópera Method and apparatus for simulating operation in a data processing system By www.freepatentsonline.com Published On :: Tue, 12 May 2015 08:00:00 EDT Methods and systems are provided for executing a simulation of an operation in a data processing system. In one implementation, the method includes executing an operation under a first set of conditions, determining a characteristic associated with the execution of the operation under the first set of conditions, and executing a simulation of the operation under a second set of conditions different from the first set of conditions. The simulation of the operation is constrained by the determined characteristic. The method can further include determining a cost/benefit of executing the operation under a set of conditions different from the first set of conditions based at least in part on the simulation. Full Article
ópera Macro model of operational amplifier and circuit design simulator using the same By www.freepatentsonline.com Published On :: Tue, 19 May 2015 08:00:00 EDT The present invention aims to simulate a response more similar to a actual machine while inhibiting load increase in analog operation. Program configuration of the present invention is a component of a simulation program for circuit design, which is executed by a computer. The computer includes an operation portion, a storage portion, a manipulation portion, and a display portion, so that the computer exerts a function of a circuit design simulator, and as a macro model of an operational amplifier for use in the circuit design simulator, enabling the computer to act by simulating a response of the operational amplifier on the circuit design simulator. The macro model of the operational amplifier includes a control portion (LMT1) for generating output exception in the event of input exception or power supply exception of the operational amplifier. Full Article
ópera Ultrasound operation apparatus, cavitation control method, and ultrasound transducer control method By www.freepatentsonline.com Published On :: Tue, 12 May 2015 08:00:00 EDT An ultrasound operation apparatus comprises: an ultrasound transducer; a driving section that drives the ultrasound transducer by a drive signal; a probe having a proximal end section provided with the ultrasound transducer and a distal end section to which ultrasound oscillation is transmitted, the probe performing a treatment on a living tissue using ultrasound oscillation at the distal end section; a detecting section that detects, from a drive signal, a physical quantity which varies due to cavitation generated by ultrasound oscillation of the distal end section; and an output control section that controls an output of the driving section in accordance with the detected physical quantity. Full Article
ópera Systems for spacing and transferring objects between operative stations By www.freepatentsonline.com Published On :: Tue, 26 May 2015 08:00:00 EDT Systems for spacing and transferring objects between operative stations are provided. Such systems can be used with ovens for preforms for plastic material, in blowing or stretch-blowing machines and for other applications in the packaging field. Such systems provide spacing and transferring of objects advancing in procession on transport elements, from a minimum pitch to a preset pitch larger than said minimum pitch, and for transferring said spaced objects to handling elements. Full Article
ópera Torch with operating device By www.freepatentsonline.com Published On :: Tue, 31 Mar 2015 08:00:00 EDT A torch includes a tank adapted to contain a fuel, a firebowl atop the tank defining a fill opening, and an operating device that fits over the firebowl as a snuffer. A closing device may be fitted into the fill opening. The closing device may be movable between a lowered closed position and a raised open position. The closing device defines at least one recess for receiving a portion of an operating device that moves the closing device between the open and closed positions. Full Article
ópera Optimization of waveform operation in electronic musical instrument By www.freepatentsonline.com Published On :: Tue, 11 Sep 1990 08:00:00 EDT An electronic musical instrument having a number of keys, having tone generators capable of simultaneous tone production, the tone generators being smaller in number than the number of keys. The instrument forms an operation for synthesizing a desired waveform, the operation for synthesizing a desired waveform being performed in a repeating cyclic order with an operation cycle and in which the waveform is transferred to the tone generators and read out therefrom at a rate in accordance with the note of a key being depressed to obtain a desired musical waveform. The device includes a number-of-depressed keys detecting device which counts the number of keys which are actuating the tone generator upon depression. A cycle altering device is provided for changing the operation cycle, as a whole, on the basis of the number of depressed keys, counted by the number-of-depressed keys detecting device. The construction allows for a waveform of a smooth temporal variation to be produced. Full Article
ópera Method and apparatus for efficient zone switch operation in a broadband wireless access system By www.freepatentsonline.com Published On :: Tue, 26 May 2015 08:00:00 EDT A wireless access system and, more particularly, a method and apparatus for more efficiently performing zone switch are disclosed. The method of performing zone switch by an advanced mobile station (AMS) in a mixed-mode advanced base station (ABS) which operates in a mixed mode of a broadband wireless access system includes receiving a ranging response (RNG-RSP) message including system information of an AMS support zone from a legacy zone (LZone) of the ABS, and performing ranging to the AMS support zone using the system information. Full Article
ópera Apparatus and method for operating multiple beamforming transceiver in wireless communication system By www.freepatentsonline.com Published On :: Tue, 26 May 2015 08:00:00 EDT A method for operating a base station in a wireless communication system in order to support a plurality of characteristics is provided. The method includes allocating resource periods for respective characteristics, transmitting system information including information on the characteristics, transmitting a reference signal with the characteristic corresponding to the relevant resource period through at least one of the resource periods, and receiving feedback information determining channel qualities for all of the characteristics. Full Article