In accordance with one embodiment, a computer program product includes a computer readable storage medium having computer readable program code that is readable and/or executable by a processor to: receive a signal including precoded data read from a magnetic tape medium and pass the signal through a soft detector to calculator first soft information about each bit of the signal and to provide adaptive compensation for the precoded data, send the first soft information to a soft decoder, pass the signal through the soft decoder to calculate second soft information about each bit the signal, and send the second soft information to the soft detector, wherein the precoded data is passed through at least one precoder prior to being written to the magnetic tape medium via a precoder that applies 1/(1⊕D2) to bits of data, where D is delay corresponding to bit duration

An information output device includes a first processor configured to execute a process to determine a type of notification information which is outputted from a computer and which notifies a state of the computer; and a second processor configured to execute a process to create a chart, in which a first coordinate axis represents time when the notification information is outputted from the computer, a second coordinate axis represents the type of the notification information, and the notification information is drawn at a corresponding position, and output the chart.

A variable output pump includes a fluid input, a control stage pump having an input portion and an output portion, a main stage pump having an input portion and an output portion, and a differential linkage in mechanical communication with the control stage pump and the main stage pump. The input portion of the control stage pump is in fluid communication with the fluid input and the input portion of the main stage pump is in fluid communication with the fluid input and the output portion of the control stage pump.

Implementations and examples of fiber lasers based on fiber laser cavity designs that produce self-similar pulses (“similaritons”) to achieve a pulse spectral bandwidth greater than a gain spectral bandwidth based on a spectral broadening fiber segment and a spectral filter to ensure the proper similariton conditions.

To provide a pulse signal output circuit and a shift register which have lower power consumption, are not easily changed over time, and have a longer lifetime. A pulse signal output circuit includes a first input signal generation circuit; a second input signal generation circuit; an output circuit which includes a first transistor and a second transistor and outputs a pulse signal in response to a signal output from the first and second input signal generation circuits; a monitor circuit which obtains the threshold voltages of the first and second transistors; and a power supply output circuit which generates a power supply potential raised by a potential higher than or equal to a potential which is equal to or substantially equal to the threshold voltage and supplies the power supply potential to the first and second input signal generation circuits. A shift register includes the pulse signal output circuit.

A bridge output circuit includes an output terminal, a high side transistor, a low side transistor, a high side driver for controlling a gate voltage of the high side transistor, a low side driver for controlling a gate voltage of the low side transistor, and a controller for controlling the high side and low side drivers. The low side driver includes a first current source, a second current source, and a first assist circuit. The controller is configured to control the turning-on and turning-off states of the first current source, the second current source and the first assist circuit.

Disclosed herein is a device that includes first and second buffer circuits connected to a data terminal and a first control circuit controlling the first and second buffer circuits. The first control circuit receives n pairs of first and second internal data signals complementary to each other from 2n input signal lines and outputs a pair of third and fourth internal data signals complementary to each other to first and second output signal lines, where n is a natural number more than one. The first and second buffer circuits are controlled based on the third and fourth internal data signals such that one of the first and second buffer circuits turns on and the other of the first and second buffer circuits turns off.

A level shifter, or method, producing a final output from a driver supplied by a high-side source driver providing VDD or common, and a low-side source driver providing common or VSS. A delay is introduced to prevent a source driver output at common from beginning to transition toward a supply rail until a delaying source driver at a rail begins transitioning toward common. The level shifter may be single-ended or differential, and the delaying source driver may be coupled to the same final output driver as is the delayed source driver, or may be coupled to a different final output driver. The level shifter may have a second level shifter front end stage, which may have high-side and low-side intermediate source driver outputs coupled by a capacitor, and/or may couple one of the supplies to all intermediate source drivers via a common impedance or current limit Zs.

A current output control device is provided that includes: a current cell array section including plural current cell circuits that are each connected in parallel between a first terminal (power source) and a second terminal (ground) that connect between the first terminal and the second terminal in by operation ON so as to increase control current flowing between the first terminal and the second terminal; and a code conversion section (decoder) that generates signals (row codes, column codes) to ON/OFF control current cells so as to change the number of current cells that connect the first terminal and the second terminal according to change in an externally input code and that inputs the generated signals to the current cell array section.

An output buffer comprises a series connection of a first field effect transistor and a second field effect transistor, wherein the first field effect transistor is connected to a first supply potential terminal and the second field effect transistor is connected to a second supply potential terminal. An output terminal is connected to a common connection of the first transistor and the second transistor. The output buffer has a series connection of a resistive element and a capacitive element, wherein the capacitive element is connected to the output terminal, and a control circuit, to which an input signal is provided. The control circuit controls the transistors in such a way that turning off of a transistor is performed immediately, while turning on of a transistor is performed depending on the charging or discharging of the capacitive element, thus achieving a defined slew rate of the output signal at the output terminal.

In some embodiments, a method for processing output of at least one microphone of a device (e.g., a headset) to identify at least one touch gesture exerted by a user on the device, including by distinguishing the gesture from input to the microphone other than a touch gesture intended by the user, and by distinguishing between a tap exerted by the user on the device and at least one dynamic gesture exerted by the user on the device, where the output of the at least one microphone is also indicative of ambient sound (e.g., voice utterences). Other embodiments are systems for detecting ambient sound (e.g., voice utterences) and touch gestures, each including a device including at least one microphone and a processor coupled and configured to process output of each microphone to identify at least one touch gesture exerted by a user on the device.

In a pulse output circuit in a shift register, a power source line which is connected to a transistor in an output portion connected to a pulse output circuit at the next stage is set to a low-potential drive voltage, and a power source line which is connected to a transistor in an output portion connected to a scan signal line is set to a variable potential drive voltage. The variable potential drive voltage is the low-potential drive voltage in a normal mode, and can be either a high-potential drive voltage or the low-potential drive voltage in a bath mode. In the batch mode, display scan signals can be output to a plurality of scan signal lines at the same timing in a batch.

Systems and methods for controlling the output of a battery pack are disclosed. In one example, a battery pack contactor is opened in response to battery pack current. The system and method may reduce battery pack degradation and increase system flexibility.

A dip in the output voltage of a motor-vehicle alternator, owing to a connecting of a load or a change in speed, is compensated with the aid of an alternator regulator which provides a control signal that has a duty factor and increases the excitation current of the motor-vehicle alternator. After the occurrence of the voltage dip, in a first step, the duty factor of the control signal is increased by a differential amount, and in a subsequent second step, the rate of correction is limited. After the occurrence of the voltage dip, parameters describing the instantaneous working point of the motor-vehicle alternator are determined, and in the first step, the differential amount is set as a function of the working point.

A pop-free single-ended output class-D amplifier includes: an input signal generator for generating an input signal; a power supply for supplying input power; a reference voltage generator for generating a reference voltage; a gain-adjustable stage for generating an amplified signal according to the reference voltage and adjusting a gain of the single-ended output class-D amplifier; a pulse width modulation module for outputting a pulse width modulation signal according to the reference voltage, the amplified signal, and the input power; a low-pass filter for low-pass filtering the pulse width modulation signal to generate an output voltage; and a logic controller for generating at least one control signal to control the reference voltage generator, the gain-adjustable stage, and the pulse width modulation module according to the input power, the reference voltage, and the pulse width modulation signal.

An amplifier circuit amplifies a signal for wireless transmission. A feedback circuit, including a capacitor, is coupled to the amplifier circuit. Components of the feedback circuit are selected based on a feedback factor such that an input impedance to the amplifier circuit has a same impedance characteristic as a feedback circuit impedance of the feedback circuit.

In general, this disclosure describes techniques for changing a sampling frequency of a digital signal. In particular, the techniques provide a more accurate way to determining a relative timing between a desired output sample and a corresponding input sample using a non-approximated integer representation of the relative timing. The relative timing between the desired output sample and corresponding input sample may be represented using a first component that identifies a latest input sample of the digital signal used to generate intermediate samples, a second component that identifies an intermediate sample, and a third component that identifies a timing difference between the desired output sample and the intermediate sample. Each of the components may be recursively updated using non-approximated integer values.

A switching power converter includes a voltage source that provides an input voltage Vin to an unregulated DC/DC converter stage and at least one buck-boost converter stage to produce a desired output voltage Vout. The unregulated DC/DC converter stage is adapted to provide an isolated voltage to the at least one regulated buck-boost converter stage, wherein the unregulated DC/DC converter stage comprises a transformer having a primary winding and at least one secondary winding and at least one switching element coupled to the primary winding. The at least one buck-boost converter stage is arranged to operate in a buck mode, boost mode or buck-boost mode in response to a mode selection signal from a mode selection module. By influencing the pulse width modulation output power controller the at least one buck-boost converter stage is arranged to produce one or multiple output voltages.

A wood lathe includes first and second seats disposed respectively and fixedly on two ends of a table. A first driving device includes a motor disposed on the second seat, an outer tube fixed between the first and second seats, and a rotating inner rod journalled within the tube and connected to the motor by a belt and pulley unit. An output shaft is journalled on the first seat, and is provided with a fixed first clamping element. A second clamping element is disposed adjacent to the second seat so as to clamp a workpiece between the first and second clamping elements. A second driving device is disposed within the first seat, and interconnects the shaft and the rod to transfer rotation of the rod to the shaft, thereby rotating the workpiece.

Systems and methods for optimizing low frequency output of marine sources are described. The marine source arrangements and associated methods disclosed herein seek to fully frequency lock bubbles emitted by airguns in close proximity to one another. In this manner, larger effective bubble volumes can be achieved, thus increasing low frequency output.

Systems and associated methods for reciprocity calibration of MIMO wireless communication are disclosed. In one embodiment, a method includes receiving, by a base station, a first set of pilot symbols by receivers (RXes) of the base station based on a first pilot symbol transmitted from a transmitter (TX) of at least one reference antenna, transmitting, by the base station, a second pilot symbol by TXes of the base station, wherein the transmitted second pilot symbol is received by an RX of the at least one reference antenna as a second set of r0,i pilot symbols calculating non-reciprocity compensation factors based on the first set of pilot symbols and the second set of pilot symbols.

An output device or controller supporting voice activated commands by using a portable electronic device is herein disclosed and enabled. The output device may be a television, a controller connectable to a television, a printer, a sound output device, or a projector. The portable electronic device for wirelessly managing or driving the output device may include a microphone to receive voice activated commands. The output device includes wireless circuitry to establish a direct wireless connection (e.g., Bluetooth, etc.) with the portable electronic device, and subsequently, the output device, using the established direct wireless connection, is operable to: wirelessly receive first information from the portable electronic device; wirelessly send to the portable electronic device second information in response to receiving the first information; and wirelessly receive from the portable electronic device data related to voice activated commands from a user.

Described is a computer-implemented method for preventing time out during data transfer to an input/output device. Dummy data is generated and transferred to the input/output device at a time during data transfer, such as when a time out event may occur that would end the data transfer. The transfer of dummy data prevents a time out event from occurring.

An input/output module is provided for a bus system having a socket, the five contact cups of which each may comprise an electrical contact, and a measuring device for detecting a connector of a four-wire data cable. The measuring device can be configured to detect, when a connector is inserted into the socket, whether the connector comprises four or five electrical contact pins which are each plugged into one of the contact cups and are electrically connected to the respective electrical contact of the contact cups. The measuring device may be configured to close a first and a second switching device only when five electrical contact pins are detected in order to apply a respective supply voltage from two DC voltage supplies to the corresponding plugged contact pins of the connector plugged into the socket via the respective electrical contacts of the contact cups.

Disclosed herein is a method of setting valid output sections of a 3-axis acceleration sensor mounted within a tire of a vehicle, including setting an output signal of the 3-axis acceleration sensor in the z-axis direction as a reference signal, setting a specific section of the output signal in the z-axis direction as a valid section where a part of the tire where the 3-axis acceleration sensor is mounted contacts a road surface, and setting sections of output signals of the 3-axis acceleration sensor in the x-axis and y-axis directions corresponding to the valid section in the z-axis direction as valid sections in the x-axis and y-axis directions. The method sets precise valid sections applied to detect information between the tire and a ground surface so as to minimize a component of a noise section by connecting output signals in the x-axis, y-axis and z-axis directions.

An apparatus includes a first terminal configured to communicate data with an outside of the apparatus, a second terminal configured to receive a first power source potential, a third terminal configured to receive a second power source potential lower than the first power source potential, a fourth terminal configured to be coupled to a calibration resistor, an output buffer including first to third nodes coupled to the first to third terminals respectively, and a replica circuit including fourth and fifth nodes coupled to the second and third terminals respectively, and sixth node coupled to the fourth terminal.

This disclosure describes methods, devices, and systems related to an OFDMA Distributed Channel Access. Devices are disclosed comprising: at least one processor; and at least one memory that stores computer-executable instructions, wherein the at least one processor is configured to access the at least one memory and execute the computer-executable instructions to identify a trigger frame received on the communication channel from the computing device. The at least one processor may determine an uplink frame to be sent to a computing device on a communication channel. The at least one processor may identify one or more random access resource allocations, wherein the one or more random access resource allocations are associated with the trigger frame. The at least one processor may assign a respective numerical value to each of the one or more random access resource allocations. The at least one processor may also select a numerical value based at least in part on a probability distribution. The at least one processor may also determine a particular resource allocation of the one or more random access resource allocations that corresponds to the numerical value. The at least one processor may also cause the uplink frame to be sent to the computing device using the particular resource allocation.

Get an in-depth look at Analog Strings by Output, an innovative virtual instrument designed for creating and manipulating string sounds.

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Spain's industrial production declined at the fastest pace in nearly three years in March, data from the statistical office INE showed Friday.

Australia's biggest new gold mine, the $621 million Gruyere project in WA's Great Victoria Desert, pours its first gold bar as the precious metal continues to trade near record highs but the mood in the industry is not all good.

Here are the latest developments in the coronavirus crisis.

Yu. V. Kozachenko and I. V. Rozora
Theor. Probability and Math. Statist. 99 (2020), 113-124.
Abstract, references and article information

In SAS Data Integration Studio, the columns that you select to include in the target table in a Business Rules transformation appear in the Selected columns area in a random order. Th

If the following conditions are met in PROC QLIM: the SELECT option and DISCRETE option are specified in the same MODEL statement or ENDOGENOUS statement the same dependent variable with S

Oil was headed for the longest run of daily gains in more than nine months on signs the worst of the supply glut may be over as production cuts start to take effect.

A majority of sugar companies decided to make hand sanitisers to supply to hospitals by using a part of the ethanol/ENA production, thereby ensuring that the country does not face any shortage of good quality hand sanitisers.

Mills in Uttar Pradesh have produced 11.65 MT as on April 30, 2020, which is 3.72 lakh tonne higher than what was produced a year ago. Of 119 mills operated this year, 44 mills have ended their crushing. As many as 75 mills are operating as against 68 mills last year till April 30.

Hello, my name is Hsukang. I want to use Liberate to create a .lib file for the following circuit. This is a scan FF with two separate outputs.   The question is that no matter how I described its function, the synthesis tool said its a manformed scan FF.  Has anyone ever encountered anything like this？How should I describe the function correctly？I found that almost standard flip-flop cells are with only one output Q or have Qn at the same time. Does Liberate support scan flip-flop cells with two separate outputs ？

Thanks.

Hi,

I am running simulation in ADEXL and need a custom function for VIVA to apply same procedure to all signals saved in output. For instance, I have clock nets and I want to get all of them and look at the duty-cycle, edge rate etc.

It is a little more involved than about part since I have some regex and setof to filter before processing but if I can get all signals for current history, I can postprocess them later.

In ocean, I am just doing outputs() and getting all saved signals but I was able to do this in VIVA calculator due to the difficulties in getting current history, test name and opening result directory

thanks

yayla

Version Info:

ICADV12.3 64b 500.21

spectre -W =>

Tool 'cadenceMMSIM' Current project version '16.10.479'
sub-version  16.1.0.479.isr9

Hi,

i am designing a broadband (100 MHz -6 GHz BW) receiver chain for  radar/rcs measurement tester. i will put Low noise amplifier after antenna input followed by mixed(10 MHz IF BW and digitizer.

I am facing problem regarding LAN. bandwidth of LAN is  approx 6 GHz(100 MHz-6GHz), gain 25-35 dB, with NF less than 2. I am uncertain about noise floor at the output of LNA.  I dont know exact SNR at the input of LNA but it shall be good.System operation will be on stepped CW waveform so receiver input signal will sweep over the BW and some step size.

so LNA output r noise floor will be? i assume, we can neglect thr role of input noise because it will be lesser than internal noise of LNA.

will it be LNA internal noise (Thermal noise due to BW) only ?

will it be LNA internal noise (Thermal noise due to BW)  + LAN Gain ? -78+25 =-53 dB? internal noise shall be lesser because NF is less than 3 . 

i have practically observed that that output noise floor is much lesser then even thermal noise( over LNA BW). i have gone through some tutorial where  formula says( internal noise+input noise)+gain. in  my case input noise shall be much less than theoretical internal noise. 

Thanks

Hello, There is a manual in matlab of matching LNA  shown in the link bellow.

In it as shown in the plot bellow they mention input and output circle plots.

Is there such option of input and output circle in cadence virtuoso?

https://www.mathworks.com/help/rf/examples/designing-matching-networks-part-1-networks-with-an-lna-and-lumped-elements.html

 hi,

i am doing a project on synchronous fifo design using verilog. below written is my coding. after simulation the waveform is showing error regarding its not giving value of rdata_valid and is showing a red line in waveform and due to it address is also not being taken.i have attached the waveform also. the logic for write logic is also not accepting the address(no change occurs while changing value of read_ptr). i have attached my file with it so plz refer to it.

plz help me out in this. your guidance and solns will help me in completing my project work.

thank you

lov sareen

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A trailblazing wind-solar hybrid project in western Minnesota could be a preview of what’s to come as renewable developers look for new ways to bolster projects.

Annual solar energy production in North Carolina jumped 36 percent in 2018, according to the latest government data – firmly placing North Carolina as the No. 2 solar-producing state in the nation.

Annual solar energy production in North Carolina jumped 36 percent in 2018, according to the latest government data – firmly placing North Carolina as the No. 2 solar-producing state in the nation.

A trailblazing wind-solar hybrid project in western Minnesota could be a preview of what’s to come as renewable developers look for new ways to bolster projects.