A function f(x) is calculated with a calculating apparatus that makes a correct calculation with a low probability. Provided that G and H are cyclic groups, f is a function that maps an element x of the group H into the group G, X1 and X2 are random variables whose values are elements of the group G, x1 is a realized value of the random variable X1, and x2 is a realized value of the random variable X2, an integer calculation part calculates integers a' and b' that satisfy a relation a'a+b'b=1 using two natural numbers a and b that are relatively prime. A first randomizable sampler is capable of calculating f(x)bx1 and designates the calculation result as u. A first exponentiation part calculates u'=ua. A second randomizable sampler is capable of calculating f(x)ax2 and designates the calculation result as v. A second exponentiation part calculates v'=vb. A determining part determines whether u'=v' or not. A final calculation part calculates ub'va' in a case where it is determined that u'=v'.

A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, instruction decode logic decodes instructions for an execution unit to operate on packed data elements including logical comparisons. A register file including 128-bit packed data registers stores packed single-precision floating point (SPFP) and packed integer data elements. The logical comparisons may include comparison of SPFP data elements and comparison of integer data elements and setting at least one bit to indicate the results. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting the at least one bit, which in turn may be utilized by a branching unit in response to a branch instruction. Alternatively, the branch support actions may include branching to an indicated target code location.

A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, instruction decode logic decodes instructions for an execution unit to operate on packed data elements including logical comparisons. A register file including 128-bit packed data registers stores packed single-precision floating point (SPFP) and packed integer data elements. The logical comparisons may include comparison of SPFP data elements and comparison of integer data elements and setting at least one bit to indicate the results. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting the at least one bit, which in turn may be utilized by a branching unit in response to a branch instruction. Alternatively, the branch support actions may include branching to an indicated target code location.

A method of generating a code sequence in a wireless communication system is disclosed. More specifically, the method includes recognizing a desired length of the code sequence, generating a code sequence having a length different from the desired length, and modifying the length of the generated code sequence to equal the desired length. Here, the step of modifying includes discarding at least one element of the generated code sequence or inserting at least one null element to the generated code sequence.

A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, instruction decode logic decodes instructions for an execution unit to operate on packed data elements including logical comparisons. A register file including 128-bit packed data registers stores packed single-precision floating point (SPFP) and packed integer data elements. The logical comparisons may include comparison of SPFP data elements and comparison of integer data elements and setting at least one bit to indicate the results. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting the at least one bit, which in turn may be utilized by a branching unit in response to a branch instruction. Alternatively, the branch support actions may include branching to an indicated target code location.

A radiation curable temporary laminating adhesive composition for use in temperature applications at 150° C. or greater, and typically at 200° C. or greater, comprises (A) a hydrogenated polybutadiene diacrylate; (B) a radical photoinitiator; and (C) a diluent.

Embodiments of the present invention relate to a method and an apparatus for obtaining equipment identification information, where the method includes: detecting, by using a first GPIO port, a first discharging duration for a capacitor to discharge through a resistor to be tested; detecting, by using a second GPIO port, a second discharging duration for the capacitor to discharge through a fixed value resistor; and obtaining a resistance of the resistor to be tested according to the first discharging duration, the second discharging duration, and a resistance of the fixed value resistor. The embodiments of the present invention are capable of increasing identification efficiency of the GPIO port.

A memory system includes a CPU that communicates commands and addresses to a main-memory module. The module includes a buffer circuit that relays commands and data between the CPU and the main memory. The memory module additionally includes an embedded processor that shares access to main memory in support of peripheral functionality, such as graphics processing, for improved overall system performance. The buffer circuit facilitates the communication of instructions and data between CPU and the peripheral processor in a manner that minimizes or eliminates the need to modify CPU, and consequently reduces practical barriers to the adoption of main-memory modules with integrated processing power.

Apparatuses and methods of calibrating a memory interface are described. Calibrating a memory interface can include loading and outputting units of a first data pattern into and from at least a portion of a register to generate a first read capture window. Units of a second data pattern can be loaded into and output from at least the portion of the register to generate a second read capture window. One of the first read capture window and the second read capture window can be selected and a data capture point for the memory interface can be calibrated according to the selected read capture window.

An information processing apparatus includes a plurality of modules connected in a ring shape via a bus, and each module processes a packet flowing in a single direction on the ring in a predetermined order. The module includes a communication unit for transmitting a packet received from a first direction in the ring via the bus to a second direction, a discrimination unit for discriminating a packet from among the packets received from the first direction as a processing packet to be processed by the module, and a processing unit which is connected with the communication unit one by one and configured to process the processing packet. The communication unit transmits the packet processed by the processing unit at an interval equivalent to processing time or more for a processing packet processed by a module in a latter stage in the predetermined order among packets transmitted by the communication unit to the second direction.

A data transfer control apparatus includes a transferring unit that transfers data from a transfer source memory to a transfer destination memory, according to an instruction from a first processor; and a first processor configured to detect a process execute by the first processor, determine whether transfer of the data is urgent, based on the type of the detected process, and control the transferring unit or the first processor to transfer the data, based on a determination result.

Various embodiments include apparatuses, stacked devices and methods of forming dice stacks on an interface die. In one such apparatus, a dice stack includes at least a first die and a second die, and conductive paths coupling the first die and the second die to the common control die. In some embodiments, the conductive paths may be arranged to connect with circuitry on alternating dice of the stack. In other embodiments, a plurality of dice stacks may be arranged on a single interface die, and some or all of the dice may have interleaving conductive paths.

A method and an apparatus for generating metadata for digital content are described, which allow to review the generated metadata already in course of ongoing generation of metadata. The metadata generation is split into a plurality of processing tasks, which are allocated to two or more processing nodes. The metadata generated by the two or more processing nodes is gathered and visualized on an output unit.

A system for protecting an electronic device against malware includes a memory, an operating system configured to execute on the electronic device, and a below-operating-system security agent. The below-operating-system security agent is configured to trap an attempted access of a resource of the electronic device, access one or more security rules to determine whether the attempted access is indicative of malware, and operate at a level below all of the operating systems of the electronic device accessing the memory. The attempted access includes attempting to write instructions to the memory and attempting to execute the instructions.

Some embodiments provide a method for managing a logical switching element that includes several logical ports. The logical switching element receives and sends data packets through the logical ports. The logical switching element is implemented in a set of managed switching elements that forward data packets in a network. The method provides a set of tables for specifying forwarding behaviors of the logical switching element. The method performs a set of database join operations on the tables to specify in the tables that the logical forwarding element drops a data packet received through a first logical port when the data packet is headed to a second logical port different than the first logical port.

Techniques for adaptive thread scheduling on a plurality of cores for reducing system energy are described. In one embodiment, a thread scheduler receives leakage current information associated with the plurality of cores. The leakage current information is employed to schedule a thread on one of the plurality of cores to reduce system energy usage. On chip calibration of the sensors is also described.

A data transfer control apparatus includes a transferring unit that transfers data from a transfer source memory to a transfer destination memory, according to an instruction from a first processor; and a first processor configured to detect a process execute by the first processor, determine whether transfer of the data is urgent, based on the type of the detected process, and control the transferring unit or the first processor to transfer the data, based on a determination result.

Methods and apparatus are provided for evaluating potential resource capacity in a system where there is elasticity and competition between a plurality of containers. A dynamic potential capacity is determined for at least one container in a plurality of containers competing for a total capacity of a larger container. A current utilization by each of the plurality of competing containers is obtained, and an equilibrium capacity is determined for each of the competing containers. The equilibrium capacity indicates a capacity that the corresponding container is entitled to. The dynamic potential capacity is determined based on the total capacity, a comparison of one or more of the current utilizations to one or more of the corresponding equilibrium capacities and a relative resource weight of each of the plurality of competing containers. The dynamic potential capacity is optionally recalculated when the set of plurality of containers is changed or after the assignment of each work element.

A method and apparatus for method of continuously producing 1,1,1,2,3-pentafluoropropane with high yield is provided. The method includes (a) bringing a CoF3-containing cobalt fluoride in a reactor into contact with 3,3,3-trifluoropropene to produce a CoF2-containing cobalt fluoride and 1,1,1,2,3-pentafluoropropane, (b) transferring the CoF2-containing cobalt fluoride in the reactor to a regenerator and bringing the transferred CoF2-containing cobalt fluoride into contact with fluorine gas to regenerate a CoF3-containing cobalt fluoride, and (c) transferring the CoF3-containing cobalt fluoride in the regenerator to the reactor and employing the transferred CoF3-containing cobalt fluoride in Operation (a). Accordingly, the 1,1,1,2,3-pentafluoropropane can be continuously produced with high yield from the 3,3,3-trifluoropropene using a cobalt fluoride (CoF2/CoF3) as a fluid catalyst, thereby improving the reaction stability and readily adjusting the optimum conversion rate and selectivity.

The disclosure describes a process for dehalogenation of chlorofluorocompounds. The process comprises contacting a saturated chlorofluorocompound with hydrogen in the presence of a catalyst at a temperature sufficient to remove chlorine and/or fluorine substituents to produce a fluorine containing terminal olefin.

A microfluidic method and device for focusing and/or forming discontinuous sections of similar or dissimilar size in a fluid is provided. The device can be fabricated simply from readily-available, inexpensive material using simple techniques.

According to the present invention, a metal nanoparticle dispersion suitable to multiple layered coating by jetting in the form of fine droplets is prepared by dispersing metal nanoparticles having an average particle size of 1 to 100 nm in a dispersion solvent having a boiling point of 80° C. or higher in such a manner that the volume percentage of the dispersion solvent is selected in the range of 55 to 80% by volume and the fluid viscosity (20° C.) of the dispersion is chosen in the range of 2 mPa·s to 30 mPa·s, and then when the dispersion is discharged in the form of fine droplets by inkjet method or the like, the dispersion is concentrated by evaporation of the dispersion solvent in the droplets in the course of flight, coming to be a viscous dispersion which can be applicable to multi-layered coating.

A data processing apparatus includes multiple processing means that are connected in a ring shape via corresponding communication means respectively. Each communication means includes a reception means for receiving data from a previous communication means, and a transmission means for transmitting data to a next communication means. Connection information is assigned to each of the reception means and the transmission means. The communication means, when receiving a packet that has same connection information as one assigned to its reception means, causes the corresponding processing means to perform data processing on the packet, sets the connection information assigned to its transmission means to the packet, and transmits the packet to the next communication means, and when receiving a packet that has connection information that is not same as one assigned to its reception means, transmits the packet to the next communication means without changing the connection information of the packet.

Techniques are described for decoupling fetching of an instruction stored in a main program memory from earliest execution of the instruction. An indirect execution method and program instructions to support such execution are addressed. In addition, an improved indirect deferred execution processor (DXP) VLIW architecture is described which supports a scalable array of memory centric processor elements that do not require local load and store units.

A processor determines whether a first program is under execution when a second program is executed, and changes a setting of a memory management unit based on access prohibition information so that a fault occurs when the second program makes an access to a memory when the first program is under execution. Then, the processor determines whether an access from the second program to a memory area used by the first program is permitted based on memory restriction information when the fault occurs while the first program and the second program are under execution, and changes the setting of the memory management unit so that the fault does not occur when the access to the memory area is permitted.

A hypervisor and one or more guest operating systems resident in a data processing system and hosted by the hypervisor are configured to selectively enable or disable branch prediction logic through separate hypervisor-mode and guest-mode instructions. By doing so, different branch prediction strategies may be employed for different operating systems and user applications hosted thereby to provide finer grained optimization of the branch prediction logic for different operating scenarios.

A data processing device includes processing circuitry 20 for executing a first memory access instruction to a first address of a memory device 40 and a second memory access instruction to a second address of the memory device 40, the first address being different from the second address. The data processing device also includes prefetching circuitry 30 for prefetching data from the memory device 40 based on a stride length 70 and instruction analysis circuitry 50 for determining a difference between the first address and the second address. Stride refining circuitry 60 is also provided to refine the stride length based on factors of the stride length and factors of the difference calculated by the instruction analysis circuitry 50.

A method of applying formal verification methodologies to event processing applications is provided herein. The method includes the following stages: representing an event processing application as an event processing network, being a graph with event processing agents as nodes; generating a finite state machine based on the event processing network, wherein the finite state machine is an over-approximation of the event processing application; expressing stateful rules and policies that are associated with the event processing application using temporal logic, to yield a temporal representation of the event processing application; combining the temporal representation and the finite state machine into a model; generating a statement associated with a user-selected verification-related property of the event processing application, wherein the statement is generated using the temporal representation; and applying the statement to the model, to yield an indication for: (i) a correctness of the statement or (ii) a counter example, respectively.

Graphical programming or modeling environments in which a coding standard can be applied to graphical programs or models are disclosed. The present invention provides mechanisms for applying the coding standard to graphical programs/models in the graphical programming/modeling environments. The mechanisms may detect violations of the coding standard in the graphical model and report such violations to the users. The mechanisms may automatically correct the graphical model to remove the violations from the graphical model. The mechanisms may also automatically avoid the violations in the simulation and/or code generation of the graphical model.

The disclosure generally describes computer-implemented methods, software, and systems for creating and using two-tier mobile applications. A computer-implemented method includes identifying at least a portion of a database to be associated with a mobile application, retrieving a set of metadata associated with the at least a portion of the identified database, automatically generating a set of mobile application source code for directly accessing the at least a portion of the database based on the set of retrieved metadata, and compiling the set of mobile application source code into a distributable mobile application, the distributable mobile application configured to directly access the identified database associated with the mobile application. In some instances, the identifying, retrieving, generating, and compiling operations are performed at design time, while at runtime, the mobile application is executable by a mobile device and, during runtime execution, can request database-related information directly from the identified database.

The present invention provides a method, a system and a computer program product for defining a version identifier of a service component. The method includes determining various specification levels corresponding to the service component. Thereafter, the determined specification levels are integrated according to a predefined hierarchy to obtain the version identifier of the service component. The present invention also enables the identification of the service components. The service components are identified from one or more service components on the basis of one or more user requirements.

An information editing device is provided with an object storage portion 11 in which a character string object or image object is stored, a placement information storage portion 12 that stores placement area designation information that sets two or more placement areas that do not overlap each other for respectively placing the objects, and that correspond to the objects, an object output portion 13 that outputs, into placement areas that are set based on the placement area designation information, each of the objects corresponding to the respective placement areas, an input receiving portion 14 that receives a deletion instruction or a modification instruction for at least one of the objects output by the object output portion 13, and a placement modification portion 15 that, according to the deletion instruction or modification instruction, modifies the placement area of the object such that the placement area is placed without overlapping.

A deployment system provides the ability to deploy a multi-node distributed application, such as a cloud computing platform application that has a plurality of interconnected nodes performing specialized jobs. The deployment system includes a release management system that builds and manages versioned releases of application services and/or software modules that are executed by the plurality of nodes of the cloud computing platform application. The release management system utilizes specification files to define a jobs and application packages and configurations needed to perform the jobs. The jobs and application packages are assembled into a self-contained release bundle that may be provided to the deployment system. The deployment system unwraps the release bundle and provides each job to deployment agents executing on VMs. The deployment agents apply the jobs to their respective VM (e.g., launching applications), thereby deploying the cloud computing platform application.

In one embodiment, a machine-implemented method programs a heterogeneous multi-processor computer system to run a plurality of program modules, wherein each program module is to be run on one of the processors The system includes a plurality of processors of two or more different processor types. According to the recited method, machine-implemented offline processing is performed using a plurality of SIET tools of a scheduling information extracting toolkit (SIET) and a plurality of SBT tools of a schedule building toolkit (SBT). A program module applicability analyzer (PMAA) determines whether a first processor of a first processor type is capable of running a first program module without compiling the first program module. Machine-implemented online processing is performed using realtime data to test the scheduling software and the selected schedule solution.

This invention relates to a method, computer readable medium, and apparatus for identifying one or more problematic loops in an application. This invention provides a Directed Acyclic Graph or DAG representation of structure of one or more loops in the application by performing a static and a dynamic analysis of the application source code and depicts the loop information as LoopID, loop weight, total loop iteration, average loop iteration, total loop iteration time, average loop iteration time and embedded vector size. This aids a programmer to concentrate on problematic loops in the application and analyze them further for potential parallelism.

The present invention relates generally to client-server architectures for allowing generic upload and download functionality between a web application at a server and a client. One exemplary method includes sending a download/upload request to a web application at the server, where the download/upload request specifies at least one file to download/upload; receiving a transmission from the server; parsing the transmission to identify a download/upload command and an associated download/upload manifest, where the download/upload manifest includes executable code that, when executed on the client, will perform the download/upload of the at least one file.

A firmware update method and apparatus of a set-top box for a digital broadcast system is provided. A firmware update method of a set-top box for a digital broadcast system includes determining whether a newly received Code Version Table (CVT) following a public CVT which has been previously received and stored is the public CVT or a filtering CVT; and updating, when the newly received CVG is the filtering CVT, the firmware of the set-top box with a filtering firmware indicated by the filtering CVT.

The present invention relates to an apparatus for coproducting iso-type reaction product and alcohol from olefin, and a method for coproducting using the apparatus, in which the hydroformylation reactor provides a sufficient reaction area due to the broad contact surface area between the olefin and the synthesis gases that are the raw materials by a distributor plate installed in the reactor, and the raw materials can be sufficiently mixed with the reaction mixture due to the circulation of the reaction mixture so that the efficiency of the production of the aldehyde is excellent; and also the hydrogenation reactor suppresses the side reaction so that the efficiency for producing aldehyde and alcohol are all increased, and also iso-type reaction product and alcohol can be efficiently co-produced.

The present invention relates to the energy efficient and selective extraction of dilute concentrations of C2-C6 alcohols from an aqueous solution using liquid phase dimethyl ether.

Apparatus for orientating a user in a space wherein the space comprises a plurality of zones of which only certain zones constitute functional zones wherein each functional zone includes a first type device containing information relating to the position of the zone in the space and wherein the first type device is reactive to the presence of a second type device associated with the user to provide the user with the information to determine the orientation of the user in the space. A method of orientating the user within the space and guiding the user toward one or more features in the space is also disclosed.

An apparatus for estimating a travel path of a vehicle is mounted on the vehicle; and includes: an object detection device that detects an object lying ahead of the vehicle; a stationary object detection device that determines whether a detected object is a stationary object; a device that calculates an approximate straight line indicating a path of the stationary object from the temporal positional data for the stationary object projected on two-dimensional coordinates using a vehicle position as a starting point; a device that calculates a orthogonal line which passes through a midpoint in the temporal positional data for the stationary object and goes straight with respect to the approximate straight line on the two-dimensional coordinates; and a device that calculates a vehicle turning radius from an intersection point where the orthogonal line intersects with a x axis.

Some embodiments provide a mapping application that provides routing information to third-party applications on a device. The mapping application receives route data that includes first and second locations. Based on the route data, the mapping application provides a set of routing applications that provide navigation information. The mapping application receives a selection of a routing application in the set of routing applications. The mapping application passes the route data to the selected routing application in order for the routing application to provide navigation information.

An apparatus and method for determining an Absolute Location of an indoor stationary object, the method comprising: receiving a distance between an indoor stationary object and one or more predetermined spots; determining a location of stationary object relative to one of the predetermined spots; receiving an Absolute Location of one of the predetermined spots; determining an Absolute Location of the stationary object; and storing the Absolute Location of the stationary object with description information of the stationary object.

Disclosed is a vehicle control apparatus which can prevent the deterioration of drivability. The ECU can set a control accelerator opening degree to be converted when a control permission condition is established. The control accelerator opening degree is equal to or larger than an accelerator lower limit which is larger than an idle determination value for determining an automatic stopping of an engine by an eco-run. The control accelerator opening degree thus set can prevent the drivability from being deteriorated without the automatic stopping of the engine being caused even if the accelerator opening degree is converted to reduce the torque of the engine with the establishment of the control permission condition.

A vehicle notification sound emitting apparatus is basically provided with a first sound emitting device, a second sound emitting device and a notification sound control device. The first sound emitting device emits a first intermittent notification sound inside a cabin interior of a vehicle. The second sound emitting device emits a second intermittent notification sound outside of the cabin interior of the vehicle. The notification sound control device operates the first and second sound emitting devices to separately emit the first and second intermittent notification sounds in at least a partially overlapping pattern in response to occurrence of a vehicle condition to convey a same type of vehicle information to both inside and outside of the cabin interior of the vehicle. The notification sound control device includes a cabin interior-exterior notification sound synchronizing section that is configured to synchronize the first and second intermittent notification sounds.

A method of patterning a plurality of layers of a work piece in a series of writing cycles in one or a plurality of write machines, the workpiece being deviced to have a number of N layers and layers of the workpiece having one or a plurality of boundary condition(s) for pattern position, the method comprising the steps of: determining the boundary conditions of layers 1 to N, calculating deviations due to the boundary conditions and calculating a compensation for the deviation of the first transformation added with the assigned part of the deviation due to the boundary conditions.

A plurality of Field Programmable Gate Arrays (FPGA), high performance transceivers, and memory devices provide a verification module for timing and state debugging of electronic circuit designs. Signal value compression circuits and gigabit transceivers embedded in each FPGA increase the fanout of each FPGA. Ethernet communication ports enable remote software debugging of processor instructions.

Methods are provided to facilitate automated creation and management of design rule checking or DRC waiver descriptions. Embodiments include receiving a plurality of first checksums corresponding to respective first geometric element violations waived in association with a block of an integrated circuit design, the first checksums being based on a first version of at least one design verification rule and/or of the block, receiving a second checksum corresponding to a second geometric element violation associated with the block, the second checksum being based on a second version of the design verification rule and/or of the block, determining whether the second checksum corresponds to at least one of the first checksums, and, if the second checksum does not correspond to at least one first checksum, generating a waiver request for the second geometric element error.

A relationship between distance from a back bias control section which outputs a control signal for controlling a back bias of a transistor and an amount of noise in the control signal outputted from the back bias control section is found. An increase of jitter corresponding to the amount of the noise in a clock transmitted on a clock path connected to a circuit section (IP macro) is found on the basis of the relationship between the distance from the back bias control section and the amount of the noise. The circuit section and the clock path are placed on the basis of the increase of the jitter and an allowable jitter value for the circuit section.

A via disposition information acquiring unit acquires via disposition information indicating a disposition of the plurality of first vias (212). A second conductor information acquiring unit acquires second conductor information indicating disposition positions of a plurality of second conductors (232) repeatedly disposed in the second conductor layer (230). A via extracting unit extracts an extraction via with respect to each of the plurality of second conductors (232). The extraction via is each of the first vias (212) overlapping the second conductor (232). A via selecting unit selects a selection via with respect to each of the plurality of second conductors (232). The selection via is each of first vias (212) selected in a predetermined number from the extraction vias. An opening introducing unit introduces a first opening (234) to each of the plurality of second conductors (232). The first opening (234) overlaps the extraction via not selected by the via selecting unit in plan view.