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Metal nanoparticle dispersion usable for ejection in the form of fine droplets to be applied in the layered shape

According to the present invention, a metal nanoparticle dispersion suitable to multiple layered coating by jetting in the form of fine droplets is prepared by dispersing metal nanoparticles having an average particle size of 1 to 100 nm in a dispersion solvent having a boiling point of 80° C. or higher in such a manner that the volume percentage of the dispersion solvent is selected in the range of 55 to 80% by volume and the fluid viscosity (20° C.) of the dispersion is chosen in the range of 2 mPa·s to 30 mPa·s, and then when the dispersion is discharged in the form of fine droplets by inkjet method or the like, the dispersion is concentrated by evaporation of the dispersion solvent in the droplets in the course of flight, coming to be a viscous dispersion which can be applicable to multi-layered coating.




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Antibacterial sol-gel coating solution

Antibacterial sol-gel coating solutions are used to form articles. The antibacterial sol-gel coating solution includes at least one Ti or Si-containing compound that is capable of hydrolyzing to form a base film; a regulating agent capable of regulating the hydrolysis rate of the Ti or Si-containing compounds, an organic solvent, water, and at least one soluble compound of an antibacterial metal, such as Ag, Cu, Mg, Zn, Sn, Fe, Co, Ni, or Ce.




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Method of synthesizing bulk transition metal carbide, nitride and phosphide catalysts

A method for synthesizing catalyst beads of bulk transmission metal carbides, nitrides and phosphides is provided. The method includes providing an aqueous suspension of transition metal oxide particles in a gel forming base, dropping the suspension into an aqueous solution to form a gel bead matrix, heating the bead to remove the binder, and carburizing, nitriding or phosphiding the bead to form a transition metal carbide, nitride, or phosphide catalyst bead. The method can be tuned for control of porosity, mechanical strength, and dopant content of the beads. The produced catalyst beads are catalytically active, mechanically robust, and suitable for packed-bed reactor applications. The produced catalyst beads are suitable for biomass conversion, petrochemistry, petroleum refining, electrocatalysis, and other applications.




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Foams of graphene, method of making and materials made thereof

Method for making a liquid foam from graphene. The method includes preparing an aqueous dispersion of graphene oxide and adding a water miscible compound to the aqueous dispersion to produce a mixture including a modified form of graphene oxide. A second immiscible fluid (a gas or a liquid) with or without a surfactant are added to the mixture and agitated to form a fluid/water composite wherein the modified form of graphene oxide aggregates at the interfaces between the fluid and water to form either a closed or open cell foam. The modified form of graphene oxide is the foaming agent.




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Indirect designation of physical configuration number as logical configuration number based on correlation information, within parallel computing

A computing section is provided with a plurality of computing units and correlatively stores entries of configuration information that describes configurations of the plurality of computing units with physical configuration numbers that represent the entries of configuration information and executes a computation in a configuration corresponding to a designated physical configuration number. A status management section designates a physical configuration number corresponding to a status to which the computing section needs to advance the next time for the computing section and outputs the status to which the computing section needs to advance the next time as a logical status number that uniquely identifies the status to which the computing section needs to advance the next time in an object code. A determination section determines whether or not the computing section has stored an entry of configuration information corresponding to the status to which the computing section needs to advance the next time based on the logical status number that is output from the status management section. A rewriting section correlatively stores the entry of the configuration information and a physical configuration number corresponding to the entry of the configuration information in the computing section when the determination section determines that the computing section has not stored the entry of configuration information corresponding to the status to which the computing section needs to advance the next time.




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Low latency variable transfer network communicating variable written to source processing core variable register allocated to destination thread to destination processing core variable register allocated to source thread

A method and circuit arrangement utilize a low latency variable transfer network between the register files of multiple processing cores in a multi-core processor chip to support fine grained parallelism of virtual threads across multiple hardware threads. The communication of a variable over the variable transfer network may be initiated by a move from a local register in a register file of a source processing core to a variable register that is allocated to a destination hardware thread in a destination processing core, so that the destination hardware thread can then move the variable from the variable register to a local register in the destination processing core.




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Implementation of multi-tasking on a digital signal processor with a hardware stack

The disclosure relates to the implementation of multi-tasking on a digital signal processor. Blocking functions are arranged such that they do not make use of a processor's hardware stack. Respective function calls are replaced with a piece of inline assembly code, which instead performs a branch to the correct routine for carrying out said function. If a blocking condition of the blocking function is encountered, a task switch can be done to resume another task. Whilst the hardware stack is not used when a task switch might have to occur, mixed-up contents of the hardware stack among function calls performed by different tasks are avoided.




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Client-allocatable bandwidth pools

Methods and apparatus for client-allocatable bandwidth pools are disclosed. A system includes a plurality of resources of a provider network and a resource manager. In response to a determination to accept a bandwidth pool creation request from a client for a resource group, where the resource group comprises a plurality of resources allocated to the client, the resource manager stores an indication of a total network traffic rate limit of the resource group. In response to a bandwidth allocation request from the client to allocate a specified portion of the total network traffic rate limit to a particular resource of the resource group, the resource manager initiates one or more configuration changes to allow network transmissions within one or more network links of the provider network accessible from the particular resource at a rate up to the specified portion.




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Issue policy control within a multi-threaded in-order superscalar processor

A multi-threaded in-order superscalar processor 2 includes an issue stage 12 including issue circuitry 22, 24 for selecting instructions to be issued to execution units 14, 16 in dependence upon a currently selected issue policy. A plurality of different issue policies are provided by associated different policy circuitry 28, 30, 32 and a selection between which of these instances of the policy circuitry 28, 30, 32 is active is made by policy selecting circuitry 34 in dependence upon detected dynamic behavior of the processor 2.




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Efficient conditional ALU instruction in read-port limited register file microprocessor

A microprocessor having performs an architectural instruction that instructs it to perform an operation on first and second source operands to generate a result and to write the result to a destination register only if its architectural condition flags satisfy a condition specified in the architectural instruction. A hardware instruction translator translates the instruction into first and second microinstructions. To execute the first microinstruction, an execution pipeline performs the operation on the source operands to generate the result. To execute the second microinstruction, it writes the destination register with the result generated by the first microinstruction if the architectural condition flags satisfy the condition, and writes the destination register with the current value of the destination register if the architectural condition flags do not satisfy the condition.




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Virtualization support for branch prediction logic enable / disable at hypervisor and guest operating system levels

A hypervisor and one or more guest operating systems resident in a data processing system and hosted by the hypervisor are configured to selectively enable or disable branch prediction logic through separate hypervisor-mode and guest-mode instructions. By doing so, different branch prediction strategies may be employed for different operating systems and user applications hosted thereby to provide finer grained optimization of the branch prediction logic for different operating scenarios.




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Efficient parallel computation of dependency problems

A computing method includes accepting a definition of a computing task, which includes multiple Processing Elements (PEs) having execution dependencies. The computing task is compiled for concurrent execution on a multiprocessor device, by arranging the PEs in a series of two or more invocations of the multiprocessor device, including assigning the PEs to the invocations depending on the execution dependencies. The multiprocessor device is invoked to run software code that executes the series of the invocations, so as to produce a result of the computing task.




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High performance computing (HPC) node having a plurality of switch coupled processors

A High Performance Computing (HPC) node comprises a motherboard, a switch comprising eight or more ports integrated on the motherboard, and at least two processors operable to execute an HPC job, with each processor communicably coupled to the integrated switch and integrated on the motherboard.




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Shared load-store unit to monitor network activity and external memory transaction status for thread switching

An array of a plurality of processing elements (PEs) are in a data packet-switched network interconnecting the PEs and memory to enable any of the PEs to access the memory. The network connects the PEs and their local memories to a common controller. The common controller may include a shared load/store (SLS) unit and an array control unit. A shared read may be addressed to an external device via the common controller. The SLS unit can continue activity as if a normal shared read operation has taken place, except that the transactions that have been sent externally may take more cycles to complete than the local shared reads. Hence, a number of transaction-enabled flags may not have been deactivated even though there is no more bus activity. The SLS unit can use this state to indicate to the array control unit that a thread switch may now take place.




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Hardware assist thread for increasing code parallelism

Mechanisms are provided for offloading a workload from a main thread to an assist thread. The mechanisms receive, in a fetch unit of a processor of the data processing system, a branch-to-assist-thread instruction of a main thread. The branch-to-assist-thread instruction informs hardware of the processor to look for an already spawned idle thread to be used as an assist thread. Hardware implemented pervasive thread control logic determines if one or more already spawned idle threads are available for use as an assist thread. The hardware implemented pervasive thread control logic selects an idle thread from the one or more already spawned idle threads if it is determined that one or more already spawned idle threads are available for use as an assist thread, to thereby provide the assist thread. In addition, the hardware implemented pervasive thread control logic offloads a portion of a workload of the main thread to the assist thread.




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System, method and computer program product for recursively executing a process control operation to use an ordered list of tags to initiate corresponding functional operations

In accordance with embodiments, there are provided mechanisms and methods for controlling a process using a process map. These mechanisms and methods for controlling a process using a process map can enable process operations to execute in order without necessarily having knowledge of one another. The ability to provide the process map can avoid a requirement that the operations themselves be programmed to follow a particular sequence, as can further improve the ease by which the sequence of operations may be changed.




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Reception according to a data transfer protocol of data directed to any of a plurality of destination entities

A data processing system arranged for receiving over a network, according to a data transfer protocol, data directed to any of a plurality of destination identities, the data processing system comprising: data storage for storing data received over the network; and a first processing arrangement for performing processing in accordance with the data transfer protocol on received data in the data storage, for making the received data available to respective destination identities; and a response former arranged for: receiving a message requesting a response indicating the availability of received data to each of a group of destination identities; and forming such a response; wherein the system is arranged to, in dependence on receiving the said message.




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Dynamic energy savings for digital signal processor modules using plural energy savings states

In an example embodiment, there is described herein an apparatus comprising an interface for communicating with a plurality of digital signal processors and logic operable to send and receive data via the interface. The logic is configured to determine a first set of digital signal processors to be maintained in a ready state, a second set of digital signal processors to be maintained in a first energy saving state, and a third set of digital signal processors to be maintained in a second energy saving state.




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Conducting verification in event processing applications using formal methods

A method of applying formal verification methodologies to event processing applications is provided herein. The method includes the following stages: representing an event processing application as an event processing network, being a graph with event processing agents as nodes; generating a finite state machine based on the event processing network, wherein the finite state machine is an over-approximation of the event processing application; expressing stateful rules and policies that are associated with the event processing application using temporal logic, to yield a temporal representation of the event processing application; combining the temporal representation and the finite state machine into a model; generating a statement associated with a user-selected verification-related property of the event processing application, wherein the statement is generated using the temporal representation; and applying the statement to the model, to yield an indication for: (i) a correctness of the statement or (ii) a counter example, respectively.




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Applying coding standards in graphical programming environments

Graphical programming or modeling environments in which a coding standard can be applied to graphical programs or models are disclosed. The present invention provides mechanisms for applying the coding standard to graphical programs/models in the graphical programming/modeling environments. The mechanisms may detect violations of the coding standard in the graphical model and report such violations to the users. The mechanisms may automatically correct the graphical model to remove the violations from the graphical model. The mechanisms may also automatically avoid the violations in the simulation and/or code generation of the graphical model.




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Fault localization using condition modeling and return value modeling

Disclosed is a novel computer implemented system, on demand service, computer program product and a method that leverages combined concrete and symbolic execution and several fault-localization techniques to automatically detects failures and localizes faults in PHP Hypertext Preprocessor (“PHP”) Web applications.




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System and method for efficient compilation and invocation of function type calls

A system and method for efficient compilation and invocation of function type calls in a virtual machine (VM), or other runtime environment, and particularly for use in a system that includes a Java Virtual Machine (JVM). In accordance with an embodiment, the system comprises a virtual machine for executing a software application; a memory space for the application byte code comprising callsites generated using a function type carrier; a bytecode to machine code compiler which performs MethodHandle invocation optimizations; a memory space for the compiled machine code; and a memory space for storing software objects as part of the software application. The system enables carrying the function type from the original MethodHandle to a callsite in the generated bytecode, including maintaining generics information for a function type acquired from a target function, and generating a callsite based on the generics information for the function object invocation.




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Program module applicability analyzer for software development and testing for multi-processor environments

In one embodiment, a machine-implemented method programs a heterogeneous multi-processor computer system to run a plurality of program modules, wherein each program module is to be run on one of the processors The system includes a plurality of processors of two or more different processor types. According to the recited method, machine-implemented offline processing is performed using a plurality of SIET tools of a scheduling information extracting toolkit (SIET) and a plurality of SBT tools of a schedule building toolkit (SBT). A program module applicability analyzer (PMAA) determines whether a first processor of a first processor type is capable of running a first program module without compiling the first program module. Machine-implemented online processing is performed using realtime data to test the scheduling software and the selected schedule solution.




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Software modification methods to provide master-slave execution for multi-processing and/or distributed parallel processing

In one embodiment of the invention, a method is disclosed for modifying a pre-existing application program for multi-processing and/or distributed parallel processing. The method includes searching an application program for a computational loop; analyzing the computational loop to determine independence of the computational transactions of the computational loop; and replacing the computational loop with master code and slave code to provide master-slave execution of the computational loop in response to analyzing the computational loop to determine independence of the computational transactions of the computational loop. Multiple instances of the modified application program are executed to provide multi-processing and/or distributed parallel processing.




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Systems and methods for information flow analysis

Computer-implemented methods for analyzing computer programs written in semi-structured languages are disclosed. The method is based on unification of the two classic forms of program flow analysis, control flow and data flow analysis. As such, it is capable of substantially increased precision, which increases the effectiveness of applications such as automated parallelization and software testing. Certain implementations of the method are based on a process of converting source code to a decision graph and transforming that into one or more alpha graphs which support various applications in software development. The method is designed for a wide variety of digital processing platforms, including highly parallel machines. The method may also be adapted to the analysis of (semi-structured) flows in other contexts including water systems and electrical grids.




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Algorithm for automated enterprise deployments

A method of automating the deployment of a number of enterprise applications on one or more computer data processing systems. Each enterprise application or update is stored in a dynamic distribution directory and is provided with identifying indicia, such as stage information, target information, and settings information. When automated enterprise deployment is invoked, computer instructions in a computer readable medium provide for initializing deployment, performing deployment, and finalizing deployment of the enterprise applications or updates.




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Generic download and upload functionality in a client/server web application architecture

The present invention relates generally to client-server architectures for allowing generic upload and download functionality between a web application at a server and a client. One exemplary method includes sending a download/upload request to a web application at the server, where the download/upload request specifies at least one file to download/upload; receiving a transmission from the server; parsing the transmission to identify a download/upload command and an associated download/upload manifest, where the download/upload manifest includes executable code that, when executed on the client, will perform the download/upload of the at least one file.




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Blueprint-driven environment template creation in a virtual infrastructure

A system for blueprint-driven environment template creation in a virtual infrastructure comprises a processor and a memory. The processor is configured to receive a blueprint, receive an environment template configuration, and build an environment template using the blueprint and the environment template configuration. The environment template is for provisioning an environment. The environment is for deploying an application. The memory is coupled to the processor and is configured to provide the processor with instructions.




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Adjustment of threads for execution based on over-utilization of a domain in a multi-processor system by destroying parallizable group of threads in sub-domains

Embodiments provide various techniques for dynamic adjustment of a number of threads for execution in any domain based on domain utilizations. In a multiprocessor system, the utilization for each domain is monitored. If a utilization of any of these domains changes, then the number of threads for each of the domains determined for execution may also be adjusted to adapt to the change.




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Firmware update method and apparatus of set-top box for digital broadcast system

A firmware update method and apparatus of a set-top box for a digital broadcast system is provided. A firmware update method of a set-top box for a digital broadcast system includes determining whether a newly received Code Version Table (CVT) following a public CVT which has been previously received and stored is the public CVT or a filtering CVT; and updating, when the newly received CVG is the filtering CVT, the firmware of the set-top box with a filtering firmware indicated by the filtering CVT.




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Malodor counteracting compositions and method for their use

The present invention relates to the field of perfumery and more particularly to the field of malodor counteractancy. In particular, it relates to a method for application of malodor counteracting (MOC) compositions capable of neutralizing in an efficient manner, through chemical reactions, malodors of a large variety of origins and which can be encountered in the air, on textiles, bathroom or kitchen surfaces, and the like. The composition may be applied as is or in the form of a perfuming composition or in a consumer product or article containing the compound or perfume composition.




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Perfuming ingredients of the floral and/or anis type

The present invention concerns a compound of formula wherein R represents a hydrogen atom or a C1-2 alkyl or alkoxyl group; each R1, R2 or R3 represents a hydrogen atom or a methyl or ethyl group; and X represents a CHO, COOR4 or CN group, R4 being a methyl or ethyl group; and at least one of said R, R1 or R2 represents a group containing at least one carbon atom; and it use as perfuming ingredient, for instance to impart odor notes of the floral and/or anis type.




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Use of alkamides for masking an unpleasant flavor

An individual alkamide and/or a mixture having two or more different alkamides, is disclosed for changing, masking or reducing the unpleasant flavor impression of an unpleasant-tasting substance or mixture of substances. The alkamide can be trans-pellitorine; cis-pellitorine; 2Z,4Z- or 2Z,4E-decadienoic acid-N-isobutylamide; 2E,4E-decadienoic acid-N-([2S]-2-methylbutyl)amide; 2E,4E-decadienoic acid-N-([2R]-2-methylbutylamide); 2E,4Z-decadienoic acid-N-(2-methylbutyl)amide; achilleamide; sarmentine; 2E- or 3E-decenoic acid-N-isobutylamide; 3E-nonenoic acid-N-isobutylamide; spilanthol; homospilanthol; 2E,6Z,8E-decatrienoic acid-N-([2R]-2-methylbutyl)amide; 2E- or 2Z-decen-4-oic acid-N-isobutylamide; α-sanshool; α-hydroxysanshool; γ-hydroxysanshool; γ-hydroxysanshool; γ-hydroxyisosanshool; γ-dehydrosanshool; γ-sanshool; bungeanool; isobungeanool; dihydrobungeanool; or tetrahydrobungeanool, or combinations thereof.




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4-alkyl substituted pyridines as odiferous substances

The present invention primarily concerns certain 4-alkyl pyridines of the following formula (I), wherein R is C8-C12 alkyl, odiferous substance mixtures and aromatic substance mixtures containing these 4-alkyl pyridines, the respective uses thereof as an odiferous or aromatic substance (mixture) and corresponding perfumed products.




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Functional fragrance precursor

The present invention relates to a class of fragrance precursor compounds comprising one or more of the compounds derived from the reaction of X—OH and an aldehyde or ketone, the fragrance precursor compounds being of the formula X—O—C(R)(R*)(OR**) wherein R is a C6-24 alkyl group, a C6-24 aralkyl group or a C6-24 alkaryl group; R* is H or a C6-24 alkyl group, a C6-24 aralkyl group or a C6-24 alkaryl group; R** is H or X; X—O representing a moiety derived from X—OH, and wherein X—OH is a compound selected from the group consisting of surfactants, fabric softeners, softener precursor ester amines, softener precursor amido amines, hair conditioners, skin conditions, saccharides and polymers. In a second aspect it relates to a method of preparing such precusors. Further the invention relates to compositions, comprising the precursor of the invention.




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Functional fragrance precursor

The present invention relates to a class of fragrance precursor compounds comprising one or more of the compounds derived from the reaction of X—OH and an aldehyde or ketone, the fragrance precursor compounds being of the formula X—O—C(R)(R*)(OR**) wherein R is a C6-24 alkyl group, a C6-24 aralkyl group or a C6-24 alkaryl group; R* is H or a C6-24 alkyl group, a C6-24 aralkyl group or a C6-24 alkaryl group; R** is H or X; X—O representing a moiety derived from X—OH, and wherein X—OH is a compound selected from the group consisting of surfactants, fabric softeners, softener precursor ester amines, softener precursor amido amines, hair conditioners, skin conditions, saccharides and polymers. In a second aspect it relates to a method of preparing such precusors. Further the invention relates to compositions, comprising the precursor of the invention.




al

Functional fragrance precursor

The present invention relates to a class of fragrance precursor compounds comprising one or more of the compounds derived from the reaction of X—OH and an aldehyde or ketone, the fragrance precursor compounds being of the formula X—O—C(R)(R*)(OR**) wherein R is a C6-24 alkyl group, a C6-24 aralkyl group or a C6-24 alkaryl group; R* is H or a C6-24 alkyl group, a C6-24 aralkyl group or a C6-24 alkaryl group; R** is H or X; X—O representing a moiety derived from X—OH, and wherein X—OH is a compound selected from the group consisting of surfactants, fabric softeners, softener precursor ester amines, softener precursor amido amines, hair conditioners, skin conditions, saccharides and polymers. In a second aspect it relates to a method of preparing such precusors. Further the invention relates to compositions, comprising the precursor of the invention.




al

Functional fragrance precursor

The present invention relates to a class of fragrance precursor compounds comprising one or more of the compounds derived from the reaction of X—OH and an aldehyde or ketone, the fragrance precursor compounds being of the formula X—O—C(R)(R*)(OR**) wherein R is a C6-24 alkyl group, a C6-24 aralkyl group or a C6-24 alkaryl group; R* is H or a C6-24 alkyl group, a C6-24 aralkyl group or a C6-24 alkaryl group; R** is H or X; X—O representing a moiety derived from X—OH, and wherein X—OH is a compound selected from the group consisting of surfactants, fabric softeners, softener precursor ester amines, softener precursor amido amines, hair conditioners, skin conditions, saccharides and polymers. In a second aspect it relates to a method of preparing such precursors. Further the invention relates to compositions, comprising the precursor of the invention.




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Perfuming ingredient of the galbanum family

The present invention relates to 1-(5-ethyl-5-methyl-1-cyclohexen-1-yl)-4-penten-1-one and its use as perfuming ingredient.




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Aldehydes as perfuming ingredients

An aldehyde of formula (I) in the form of any one of its stereoisomers or a mixture thereof, wherein each dotted line, independently from each other, represents a single or double bond; n is 0 or 1; R1 is a hydrogen atom or a methyl group; R2 is a hydrogen atom or a methyl or ethyl group; and R3, which can be present in any of positions 2 to 6 of the cyclic moiety, is a hydrogen atom or a methyl or ethyl group, or a CH2 group bridging positions 3 and 6. Also, the use of the aldehyde as perfuming ingredient to impart odor notes of the aldehyde, lily of the valley type.




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Odorant composition containing allyl ethers as odorant precursors

The deliberate release of odorants or aroma substances is desirable in many fields of application, and in particular in the field of washing and cleaning agents. Said deliberate release is achieved by using an odorant composition that comprises an odorant precursor, which is an allyl ether of the formula (I), R1R2C═CR3—CR4R5—O—CHR6R7, in which the residues R1, R2, R3, R4, R5, R6 and R7 mutually independently denote H or a hydrocarbon residue that can be acyclic or cyclic, substituted or unsubstituted, branched or unbranched, as well as saturated or unsaturated. Thus, in particular odorants in the form of an alkene having an allylic hydrogen atom, such as α-pinene, can be released in a deliberate manner.




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Process for isolating crystallized 2,2,4,4 tetramethyl-1,3-cyclobutanediol (TMCD) particles utilizing pressure filtration

A method for isolating 2,2,4,4-tetramethyl-1,3-cyclobutanediol (TMCD) solids from an isolated feed slurry formed in a TMCD process comprising TMCD, a liquid phase, and impurities by (a) treating the isolated feed slurry in a product isolation zone to produce an isolated TMCD product wet cake, a mother liquor, and impurities; wherein the product isolation zone can comprise at least one rotary pressure drum filter.




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Reduced energy alcohol separation process having controlled pressure

The present invention is directed to processes for the recovery of ethanol from a crude ethanol product obtained from the hydrogenation of acetic acid using a low energy process. The crude ethanol product is separated in one or more columns. At least one of the columns is operated at a controlled pressure to enhance separation of ethanol and organics. In one embodiment, there are at least two columns that operate at controlled pressures.




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Hydrogenation catalysts with acidic sites

The present invention relates to catalysts and to chemical processes employing such catalysts. The catalysts are preferably used for converting acetic acid to ethanol. The catalyst comprises acidic sites and two or more metals. The catalyst has acidic sites on the surface and the balance favors Lewis acid sites.




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Process for making ethanol from acetic acid using acidic catalysts

A process for selective formation of ethanol from acetic acid by hydrogenating acetic acid in the presence of a catalyst comprises a first metal on an acidic support. The acidic support may comprise an acidic support material or may comprise an support having an acidic support modifier. The catalyst may be used alone to produced ethanol via hydrogenation or in combination with another catalyst. In addition, the crude ethanol product is separated to obtain ethanol.




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Hydrogenation catalysts comprising a mixed oxide comprising nickel

A process is disclosed for producing ethanol comprising contacting acetic acid and hydrogen in a reactor in the presence of a catalyst comprising a binder and a mixed oxide comprising nickel and tin.




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Catalysts and processes for producing butanol

A catalyst composition for converting ethanol to higher alcohols, such as butanol, is disclosed. The catalyst composition comprises at least one alkali metal, at least a second metal and a support. The second metal is selected from the group consisting of palladium, platinum, copper, nickel, and cobalt. The support is selected from the group consisting of Al2O3, ZrO2, MgO, TiO2, zeolite, ZnO, and a mixture thereof.




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Method of producing alcohols

A method of making alcohols involves forming of alcohol esters from liquid alkane halides and a solution of metallic salts of organic acids to produce gaseous alcohol esters for reaction with magnesium or metal hydroxides to form the alcohol and the metal salt of the organic acids. In an improvement method liquid phase alcohol esters instead of gaseous alcohol esters are produced from liquid alkane halides and a solution of metal salts of organic acids whose alkane esters are less soluble in water than that of the alkane halide and treating of the alcohol ester formed with magnesium or metal hydroxides to form the alcohol and the metal salt of the organic acids.




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Method for producing 2-chloromethylbenzaldehyde, 2-chloromethylbenzaldehyde-containing composition, and method for storing same

A process for obtaining an industrially useful 2-chloromethylbenzaldehyde-containing liquid composition at a high yield is provided. More specifically, a process for producing 2-chloromethylbenzaldehyde comprising step (A) of mixing 1-dichloromethyl-2-chloromethylbenzene and sulfuric acid having a concentration of 84.5% by weight or more; and step (B) of mixing a mixture obtained in step (A) and water is provided.




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Protected aldehydes for use as intermediates in chemical syntheses, and processes for their preparation

A para-methoxy protected benzaldehyde useful in preparation of treprostinil, and of formula: (Formula (1)) is prepared by subjecting to Claisen re-arrangement a substituted benzaldehyde of formula (1a): (Formula (Ia)) to form the m-hydroxy-substituted benzaldehyde of formula (1b): (Formula (Ib)) and then reacting compound (1b) with a p-methoxybenzyl (PMB) compound to form a PMB-substituted benzaldehyde of formula (1).