In an apparatus for controlling an unmanned autonomous operating vehicle having an electric motor supplied with power from a battery for operating an operating machine, and magnetic sensors for detecting intensity of a magnetic field of an area wire and controlled to run about in an operating area defined by the area wire through wheels driven by the prime movers to perform an operation using the operating machine and to return to a charging device installed on the area wire so as to charge the battery, there is provided with a turn-back portion formed by bending the area wire at an appropriate position and again bending the area wire to return in a same direction with a predetermined space so as to divide the operating area into a plurality of parts and vehicle running is controlled to be prohibited from going across the turn-back portion.

A combination tractor and baler is provided to automate tractor stopping and baler wrapping while incorporating operator interaction to improve the efficiency of the tractor and baler combination in operation. Automated control systems and manual operator devices are utilized to improve the timing of the tractor stop and baler wrapping time sequences. Various methods to improve efficiency, including methods to synchronize tractor stop with wrapping activation are provided.

An agricultural harvester (100) comprises a self-propelled vehicle (102); a feederhouse (104); a driveshaft (114) supported on the feederhouse (104), the driveshaft (114) having a first coupler (116) fixed to one end of the driveshaft (114), the first coupler (116) comprising a coupler body (420), a piston (416) disposed in the coupler body (420), and a first key (302) mechanically coupled to the piston (416) to be extended or retracted by the piston (416) to engage a mating coupler on a second driveshaft (120) of an agricultural harvesting head (106) that is supported on the feederhouse (104).

A harvesting header includes a cutter bed having a plurality of cutting elements arranged transverse to the header and a crop chopping and conditioning region having a crop chopping device and a crop conditioning device. The crop chopping device is configured to chop crop cut by the cutter bed into smaller lengths and the crop conditioning device is configured to crimp the crop to aid in drying. The first chopping roller has a tubular, cylindrically-shaped body and a plurality of parallel knife-mounting lugs extending radially outward along substantially the full length of the body. A plurality of chopping knives are attached to the knife-mounting lugs and arranged around the body, each chopping knife having a length that is shorter than the length of the knife-mounting lug to which it is attached such that each chopping knife covers only a portion of the lateral length of the first chopping roller.

The present invention relates to a baler ejection system that may be used with an agricultural harvester, such as a round baler, waste baler, combine, or cotton harvester. More particularly, the bale ejection system uses the motion of two pairs of parallel arms that extend transversely from the sidewalls of a bale chamber at two sets of distinct pivot points. When activated by the operator of the bale ejection system, the two pairs of parallel arms raise simultaneously to expose an outlet through which the bale may be ejected. The bale ejection system is designed to allow a larger outlet for the bale evacuation as compared to existing bale ejection systems that employ circular motion to expose the bale outlet. A formed bale may become ejected by one or more conveyer belts that exert a rearward force on the bale within the bale chamber.

An apparatus for forming a water storage material from a biomass input material using supercritical or subcritical fluid processing, the water storage material capable of absorbing a liquid and releasing the liquid. The apparatus utilizes supercritical fluid processing, subcritical fluid processing, charring, or a combination thereof. The apparatus includes a controller configured to control the apparatus. The apparatus further including a processing station configured to hold the biomass input material, and to use the biomass input material for processing into the water storage material.

A decelerator apparatus for mounting at the end of a pneumatic or gravity-fed fruit harvesting or delivery tube. The decelerator comprises a housing with a moving decelerator body aligned with a fruit-receiving inlet connected to the delivery tube. The decelerator body, for example a padded rotating wheel, moves at a speed slower than the speed at which the fruit is delivered into the housing, includes multiple depressions or indentations for receiving and separating fruit, and further defines a compressive deceleration path that moves the fruit in a compressive but protective fit toward a housing exit, releasing the fruit after the fruit has been decelerated to the speed of the moving body.

A flail rotor head attachment for use with any type harvesting machine having crop residue processing elements and including an input opening for receiving crop residue. The attachment includes a frame structure for operatively coupling the attachment to the harvesting machine, a flail rotor and an auger each mounted on the frame structure and a drive mechanism for rotating the flail rotor and the auger. The flail rotor includes a plurality of cutting elements for picking up and chopping crop residue from a field. The auger includes at least two flightings positioned in opposite directions for funneling crop residue towards the opening of the harvesting machine. Another embodiment includes a rake positioned between the flail rotor and the auger, the rake and the flail rotor rotating in the same direction and the auger rotating in an opposite direction.

A system is provided that automatically stops a tractor as a function of a status of a round baler. This may include a controller such as a baler controller directly or indirectly detecting initial movement of an actuator that moves a wrapper assembly. Based on this detection, conditions for starting a wrap procedure may be determined either by actuator position or by a time period required for moving the wrapper assembly from a home position to a wrap start position. A time period required to bring the tractor to stop may be determined and compared with the time period required for the wrapper assembly to move from the home position to the wrap start position. The baler controller may send a tractor halt command signal for stopping the tractor to coordinate and synchronize bringing the tractor to a complete stop at the same time that the wrapping material is inserted and applied onto the bale at the beginning of a wrapping procedure.

A reel lawn mower which has a connection structure for connecting a reel cutting unit to a main body. The reel cutting unit has a spiral cutting reel which is rotated by a prime mover to cut grass together with a bedknife. In the connection structure, in order to connect the reel cutting unit to the main body so that the reel cutting unit rolls around a virtual horizontal line perpendicular to the shaft center of the cutting reel in the center of the axial direction of the cutting reel, the reel cutting unit includes a connecting arm with an arc portion shaped so as to follow a virtual arc centered on the virtual horizontal line. The connecting arm is slidably supported so as to prevent the arc portion from coming off the virtual arc.

A nut tree pickup and debris separator comprising three separate but serially interconnected stages, each including optimized structural and functional features for nut harvesting. The first stage includes a rotary pickup brush and an endless conveyor. The conveyor is constructed from a plurality of parallel bars with flights therebetween, the rods being arranged in spaced relation to retain nuts and pass debris. The second stage comprises an inclined rotating drum whose sidewall includes a plurality of elongated apertures passing therethrough, sized to retain nuts and pass debris. An inner side of the sidewall has a helical flight, sized, configured, and arranged to convey and tumble nuts and debris through the drum, with debris falling through the apertures. The third stage includes vertically offset, tandem conveyors and a cleaning fan to remove any remaining debris from the nuts as the stream falls from the end of one conveyor onto the other.

A grass collection system may have an impeller with a through-shaft that mechanically couples power take off (PTO) energy to the mower deck. The PTO shaft may pass through the impeller and blower housing to power the mower deck, resulting in a compact mechanism. The PTO shaft may pass through a grass tunnel that connects between the blower housing and the mower deck, then may be connected to the mower deck to power the mower blades. The grass collection system may be deployed on a front mounted deck tractor that has front wheel drive. The front wheels may each have a hydrostatic pump and gearbox, and the PTO shaft may pass between or under the front wheel drive systems in connecting to the mower deck.

A semiconductor device has a plurality of semiconductor die. A first prefabricated insulating film is disposed over the semiconductor die. A conductive layer is formed over the first prefabricated insulating film. An interconnect structure is formed over the semiconductor die and first prefabricated insulating film. The first prefabricated insulating film is laminated over the semiconductor die. The first prefabricated insulating film includes glass cloth, glass fiber, or glass fillers. The semiconductor die is embedded within the first prefabricated insulating film with the first prefabricated insulating film covering first and side surfaces of the semiconductor die. The interconnect structure is formed over a second surface of the semiconductor die opposite the first surface. A portion of the first prefabricated insulating film is removed after disposing the first prefabricated insulating film over the semiconductor die. A second prefabricated insulating film is disposed over the first prefabricated insulating film.

An example method includes providing a packaging device includes a substrate having an integrated circuit die mounting region. A plurality of microstructures, each including an outer insulating layer over a conductive material, are disposed proximate a side of the integrated circuit die mounting region. An underfill material is disposed between the substrate and the integrated circuit die, the microstructures preventing spread of the underfill. In another example method, a via can be formed in a substrate and the substrate etched to form a bump or pillar from the via. An insulating material can be formed over the bump or pillar. In another example method, a photoresist deposited over a seed layer and patterned to form openings. A conductive material is plated in the openings, forming a plurality of pillars or bumps. The photoresist and exposed seed layer are removed. The conductive material is oxidized to form an insulating material.

A method of making a semiconductor device can include providing a wafer comprising a plurality of semiconductor die, wherein each semiconductor die comprises an active surface and a backside opposite the active surface. A photosensitive layer can be formed over the wafer and on a backside of each of the plurality of semiconductor die within the wafer with a coating machine. An identifying mark can be formed within the photosensitive layer for each of the plurality of semiconductor die with a digital exposure machine and a developer, wherein a thickness of the identifying mark is less than or equal to 50 percent of a thickness of the photosensitive layer. The photosensitive layer can be cured. The wafer can be singulated into a plurality of semiconductor devices.

A semiconductor package is provided, including: an insulating base body having a first surface with an opening and a second surface opposite to the first surface; an insulating extending body extending outward from an edge of the first surface of the insulating base body, wherein the insulating extending body is less in thickness than the insulating base body; an electronic element having opposite active and inactive surfaces and disposed in the opening with its inactive surface facing the insulating base body; a dielectric layer formed in the opening of the insulating base body and on the first surface of the insulating base body, the insulating extending body and the active surface of the electronic element; and a circuit layer formed on the dielectric layer and electrically connected to the electronic element. The configuration of the insulating layer of the invention facilitates to enhance the overall structural rigidity of the package.

A semiconductor device includes a first moisture-resistant ring disposed in a peripheral region surrounding a circuit region on a semiconductor substrate in such a way as to surround the circuit region and a second moisture-resistant ring disposed in the peripheral region in such a way as to surround the first moisture-resistant ring.

A semiconductor mounting apparatus includes a storing unit that stores a liquid or a gas, a contact unit that comes into contact with a semiconductor chip when the storing unit is filled with the liquid or the gas, and a sucking unit that sucks up the semiconductor chip to bring the semiconductor chip into close contact with the contact unit.

A system for determining thickness variation values of a semiconductor substrate comprises a substrate vacuumed to a pedestal that defines a reference plane for measuring the substrate. A measurement probe assembly determines substrate CTV and BTV values, and defines a substrate slope angle. A thermal bonding assembly attaches a die to the substrate at a bonding angle congruent with the substrate slope angle. A plurality of substrates are measured using the same reference plane on the pedestal. Associated methods and processes are disclosed.

A method of ultrasonically bonding semiconductor elements includes the steps of: (a) aligning surfaces of a plurality of first conductive structures of a first semiconductor element to respective surfaces of a plurality of second conductive structures of a second semiconductor element; (b) ultrasonically forming tack bonds between ones of the first conductive structures and respective ones of the second conductive structures; and (c) forming completed bonds between the first conductive structures and the second conductive structures.

Package structures and methods are provided to integrate optoelectronic and CMOS devices using SOI semiconductor substrates for photonics applications. For example, a package structure includes an integrated circuit (IC) chip, and an optoelectronics device and interposer mounted to the IC chip. The IC chip includes a SOI substrate having a buried oxide layer, an active silicon layer disposed adjacent to the buried oxide layer, and a BEOL structure formed over the active silicon layer. An optical waveguide structure is patterned from the active silicon layer of the IC chip. The optoelectronics device is mounted on the buried oxide layer in alignment with a portion of the optical waveguide structure to enable direct or adiabatic coupling between the optoelectronics device and the optical waveguide structure. The interposer is bonded to the BEOL structure, and includes at least one substrate having conductive vias and wiring to provide electrical connections to the BEOL structure.

A semiconductor device includes a substrate comprising a trench; a gate dielectric layer formed over a surface of the trench; a gate electrode positioned at a level lower than a top surface of the substrate, and comprising a lower buried portion embedded in a lower portion of the trench over the gate dielectric layer and an upper buried portion positioned over the lower buried portion; and a dielectric work function adjusting liner positioned between the lower buried portion and the gate dielectric layer; and a dipole formed between the dielectric work function adjusting liner and the gate dielectric layer.

A method for forming a V-NAND device is disclosed. Specifically, the method involves deposition of at least one of semiconductive material, conductive material, or dielectric material to form a channel for the V-NAND device. In addition, the method may involve a pretreatment step where ALD, CVD, or other cyclical deposition processes may be used to improve adhesion of the material in the channel.

Embodiments of the inventive concepts provide a method for manufacturing a semiconductor device. The method includes forming a stack structure including insulating layers and sacrificial layers which are alternately and repeatedly stacked on a substrate. A first photoresist pattern is formed on the stack structure. A first part of the stack structure is etched to form a stepwise structure using the first photoresist pattern as an etch mask. The first photoresist pattern includes a copolymer including a plurality of units represented by at least one of the following chemical formulas 1 to 3, wherein “R1”, “R2”, “R3”, “p”, “q” and “r” are the same as defined in the description.

A performance of a semiconductor device is improved. A film, which is made of silicon, is formed in a resistance element formation region on a semiconductor substrate, and an impurity, which is at least one type of elements selected from a group including a group 14 element and a group 18 element, is ion-implanted into the film, and a film portion which is formed of the film of a portion into which the impurity is ion-implanted is formed. Next, an insulating film with a charge storage portion therein is formed in a memory formation region on the semiconductor substrate, and a conductive film is formed on the insulating film.

A method of manufacturing a semiconductor device according to one embodiment includes forming a first film including a first metal above a processing target member. The method includes forming a second film including two or more types of element out of a second metal, carbon, and boron above the first film. The method includes forming a third film including the first metal above the second film. The method includes forming a mask film by providing an opening part to a stacked film including the first film, the second film and the third film. The method includes processing the processing target member by performing etching using the mask film as a mask.

Embodiments of the inventive concept provide a method for manufacturing a semiconductor device. The method includes forming a stack structure by alternately and repeatedly stacking insulating layers and sacrificial layers on a substrate, sequentially forming a first lower layer and a first photoresist pattern on the stack structure, etching the first lower layer using the first photoresist pattern as an etch mask to form a first lower pattern. A first part of the stack structure is etched to form a stepwise structure using the first lower pattern as an etch mask. The first lower layer includes a novolac-based organic polymer, and the first photoresist pattern includes a polymer including silicon.

A method of manufacturing a thin film transistor is disclosed. The method of manufacturing the thin film transistor includes: manufacturing a substrate; forming an oxide semiconductor layer on the substrate; forming a pattern including an active layer through a patterning process; forming a source and drain metal layer on the active layer; and forming a pattern including a source electrode and a drain electrode through a patterning process, an opening being formed between the source electrode and the drain electrode at a position corresponding to a region of the active layer used as a channel, wherein the step of forming the pattern including the source electrode and the drain electrode through a patterning process includes: removing a portion of the source and drain metal layer corresponding to the position of the opening through dry etching. The method may also be used to manufacturing a thin film transistor.

A first photoresist pattern and a second photoresist pattern are formed over a substrate. The first photoresist pattern is separated from the second photoresist pattern by a gap. A chemical mixture is coated on the first and second photoresist patterns. The chemical mixture contains a chemical material and surfactant particles mixed into the chemical material. The chemical mixture fills the gap. A baking process is performed on the first and second photoresist patterns, the baking process causing the gap to shrink. At least some surfactant particles are disposed at sidewall boundaries of the gap. A developing process is performed on the first and second photoresist patterns. The developing process removes the chemical mixture in the gap and over the photoresist patterns. The surfactant particles disposed at sidewall boundaries of the gap reduce a capillary effect during the developing process.

A TFT and manufacturing method thereof, an array substrate and manufacturing method thereof, an X-ray detector and a display device are disclosed. The manufacturing method includes: forming a gate-insulating-layer thin film (3'), a semiconductor-layer thin film (4') and a passivation-shielding-layer thin film (5') successively; forming a pattern (5') that includes a passivation shielding layer through one patterning process, so that a portion, sheltered by the passivation shielding layer, of the semiconductor-layer thin film forms a pattern of an active layer (4a'); and performing an ion doping process to a portion, not sheltered by the passivation shielding layer, of the semiconductor-layer thin film to form a pattern comprising a source electrode (4c') and a drain electrode (4b'). The source electrode (4c') and the drain electrode (4b') are disposed on two sides of the active layer (4a') respectively and in a same layer as the active layer (4a'). The manufacturing method can reduce the number of patterning processes and improve the performance of the thin film transistor in the array substrate.

A method of forming a semiconductor device is provided such that a trench is formed in a semiconductor body at a first surface of the semiconductor body. Dopants are introduced into a first region at a bottom side of the trench by ion implantation. A filling material is formed in the trench. Dopants are introduced into a second region at a top side of the filling material. Thermal processing of the semiconductor body is carried out and is configured to intermix dopants from the first and the second regions by a diffusion process along a vertical direction perpendicular to the first surface.

A semiconductor device is provided that includes an n-type field effect transistor including a plurality of vertically stacked silicon-containing nanowires located in one region of a semiconductor substrate, and a p-type field effect transistor including a plurality of vertically stacked silicon germanium alloy nanowires located in another region of a semiconductor substrate. Each vertically stacked silicon-containing nanowire of the n-type field effect transistor has a different shape than the shape of each vertically stacked silicon germanium alloy nanowire of the p-type field effect transistor.

To provide a semiconductor device having improved reliability. After formation of an n+ type semiconductor region for source/drain, a first insulating film is formed on a semiconductor substrate so as to cover a gate electrode and a sidewall spacer. After heat treatment, a second insulating film is formed on the first insulating film and a resist pattern is formed on the second insulating film. Then, these insulating films are etched with the resist pattern as an etching mask. The resist pattern is removed, followed by wet washing treatment. A metal silicide layer is then formed by the salicide process.

A method of fabricating a semiconductor device includes forming a gate strip including a dummy electrode and a TiN layer. The method includes removing a first portion of the dummy electrode to form a first opening over a P-active region and an isolation region. The method includes performing an oxygen-containing plasma treatment on a first portion of the TiN layer; and filling the first opening with a first metal material. The method includes removing a second portion of the dummy electrode to form a second opening over an N-active region and the isolation region. The method includes performing a nitrogen-containing plasma treatment on a second portion of the TiN layer; and filling the second opening with a second metal material. The second portion of the TiN layer connects to the first portion of the TiN layer over the isolation region.

A method for forming a semiconductor structure includes forming a strained silicon germanium layer on top of a substrate. At least one patterned hard mask layer is formed on and in contact with at least a first portion of the strained silicon germanium layer. At least a first exposed portion and a second exposed portion of the strained silicon germanium layer are oxidized. The oxidizing process forms a first oxide region and a second oxide region within the first and second exposed portions, respectively, of the strained silicon germanium.

In some embodiments, a field effect transistor structure includes a first semiconductor structure and a gate structure. The first semiconductor structure includes a channel region, and a source region and a drain region. The source region and the drain region are formed on opposite ends of the channel region, respectively. The gate structure includes a central region and footing regions. The central region is formed over the first semiconductor structure. The footing regions are formed on opposite sides of the central region and along where the central region is adjacent to the first semiconductor structure.

The on-state characteristics of a transistor are improved and thus, a semiconductor device capable of high-speed response and high-speed operation is provided. A highly reliable semiconductor device showing stable electric characteristics is made. The semiconductor device includes a transistor including a first oxide layer; an oxide semiconductor layer over the first oxide layer; a source electrode layer and a drain electrode layer in contact with the oxide semiconductor layer; a second oxide layer over the oxide semiconductor layer; a gate insulating layer over the second oxide layer; and a gate electrode layer over the gate insulating layer. An end portion of the second oxide layer and an end portion of the gate insulating layer overlap with the source electrode layer and the drain electrode layer.

A semiconductor structure is disclosed. The semiconductor structure includes a source trench in a drift region, the source trench having a source trench dielectric liner and a source trench conductive filler surrounded by the source trench dielectric liner, a source region in a body region over the drift region. The semiconductor structure also includes a patterned source trench dielectric cap forming an insulated portion and an exposed portion of the source trench conductive filler, and a source contact layer coupling the source region to the exposed portion of the source trench conductive filler, the insulated portion of the source trench conductive filler increasing resistance between the source contact layer and the source trench conductive filler under the patterned source trench dielectric cap. The source trench is a serpentine source trench having a plurality of parallel portions connected by a plurality of curved portions.

A method for producing an integrated power transistor circuit includes forming at least one transistor cell in a cell array, each transistor cell having a doped region formed in a semiconductor substrate and adjoining a first surface of the semiconductor substrate on a first side of the semiconductor substrate, depositing a contact layer on the first side, structuring the contact layer to form a contact structure from the contact layer, the contact structure having, in a projection of the cell array orthogonal to the first surface, a first section and, outside the cell array, a second section which connects the first section to an interface structure, and forming an electrode structure on and in direct contact with the first section in the orthogonal projection of the cell array, the electrode structure being absent outside the cell array.

A semiconductor device includes a substrate comprising a channel region and a recess, wherein the recess is located at both side of the channel region; a gate structure formed over the channel region; a first SiP layer covering bottom corners of the gate structure and the recess; and a second SiP layer formed over the first SiP layer and in the recess, wherein the second SiP layer has a phosphorus concentration higher than that of the first SiP layer.

A method of production of a semiconductor device comprising a semiconductor layer forming step of forming a semiconductor layer including an inorganic oxide semiconductor on a board, a passivation film forming step of forming a passivation film comprising an organic material so as to cover the semiconductor layer, a baking step of baking the passivation film, and a cooling step of cooling the passivation film after baking, herein, in the cooling step, a cooling speed from a baking temperature at the time of baking in the baking step to a temperature 50° C. lower than the baking temperature is substantially controlled to 0.5 to 5° C./min in range is provided.

A method is provided for making smooth crystalline semiconductor thin-films and hole and electron transport films for solar cells and other electronic devices. Such semiconductor films have an average roughness of 3.4 nm thus allowing for effective deposition of additional semiconductor film layers such as perovskites for tandem solar cell structures which require extremely smooth surfaces for high quality device fabrication.

A magnetoresistive random access memory (MRAM) structure includes a bottom electrode structure. A magnetic tunnel junction (MTJ) element is over the bottom electrode structure. The MTJ element includes an anti-ferromagnetic material layer. A ferromagnetic pinned layer is over the anti-ferromagnetic material layer. A tunneling layer is over the ferromagnetic pinned layer. A ferromagnetic free layer is over the tunneling layer. The ferromagnetic free layer has a first portion and a demagnetized second portion. The MRAM also includes a top electrode structure over the first portion.

One embodiment is a wide stripe semiconductor waveguide, which is cleaved at a Talbot length thereof, the wide stripe semiconductor waveguide having facets with mirror coatings. A system provides for selective pumping the wide stripe semiconductor waveguide to create and support a Talbot mode. In embodiments according to the present method and apparatus the gain is patterned so that a single unique pattern actually has the highest gain and hence it is the distribution that oscillates.

An apparatus and method for carrying and storing a portion of rope is claimed. A portion of rope is braided and wound about two complementary loops. Attached to one complementary loop is a flexible fastener. The flexible fastener can be passed through the second complementary loop and attached to itself. The apparatus can then be worn as a bracelet. When the rope is needed, the person can unwind the rope. After using the rope, the rope can be rewound and then bound with the flexible fastener.

Self adjusting and/or locking buckle tongue assemblies for use with occupant restraint systems in vehicles are described herein. In one embodiment, a buckle tongue assembly includes a plate having a tongue portion configured to cooperatively engage a corresponding buckle assembly. The buckle tongue assembly of this embodiment can further include first and second web gripping portions carried by the plate. The second web gripping portion is configured to move relative to the first web gripping portion between a first position in which the web gripping portions are spaced apart to permit movement of a web therebetween, and a second position in which the web gripping portions are engaged or interlocked to clamp the web therebetween.

First and second plates have a space between them. Each plate has parallel top and bottom edges, parallel inner and outer edges, and interior and exterior surfaces. First and second fingering assemblies include fingers fabricated of a flexible material. Each finger includes a terminal projection extending into the space between the support plates. The fingers may move into and out of the space between the support plates. First and second tubes are provided. Each tube is coupled to the inner edge of an associated plate. Each tube has circumferential recesses with C-shaped clips positioned within the circumferential recesses. In this manner the tubes are secured together. Also in this manner rotation of the tubes and support plates is allowed.

A respiratory mask assembly for delivering breathable gas to a patient includes a frame and at least one locking clip. The frame has a main body and a side frame member provided on each lateral side of the main body, at least one of the side frame members including a locking clip receiver assembly. The at least one locking clip has a main body providing a front portion adapted to be removably coupled with the at least one locking clip receiver assembly and a rear portion adapted to be removably coupled to a headgear assembly. The rear portion includes a cross bar that forms an opening through which a strap of the headgear assembly can pass and be removably coupled with the cross bar, and the front portion includes at least one resiliently flexible spring arm that is flexible within the plane of the main body.

The present invention relates to a tool (1) for separating a hair bundle (11) comprising a number of hair strands appropriate for receiving a hair treatment composition (15) for creating a hair bundle effect. The hair bundle (11) is received into a through hole (10) via a slit (50). The dimensions of the through hole (10) dictate the appropriate size of a hair bundle (11). In one aspect of the present invention, the tool (1) is substantially flat in order to prevent spillages of hair treatment composition (15) onto the scalp. A gripping layer (70) may extend upon at least a portion of the tool (1) for aiding the grip of the tool (1) to the hair bundle (11).

The present disclosure relates to an apparatus for fastening a power semiconductor using an integral springy (elastic) clip, capable of fixing a power semiconductor, such as a diode and a MOSFET, using elasticity of a U-shaped clip by integrally molding the clip onto a housing of a plastic module. The apparatus includes an elastic (springy) clip integrally molded onto a lower surface of the housing and downwardly curved into a U-like shape in a bridge module in which a bridge of the power semiconductor protrudes through a through hole of the housing to be connected to a printed circuit board, whereby the power semiconductor is fixed by a force that the housing presses the power semiconductor.