The dual camera allows continuous wireless transmission of image data through radio waves to outside picture processing devices and continuous capture of images on frames of camera film rolls. A radio wave transmission attachment transmits image data though radio waves to outside picture processing devices. Several housing compartments of the dual camera receive camera film rolls. When images are captured on all frames of one camera film roll, a detachable housing compartment door is operable so that the camera film roll may be removed. While the camera film roll is being removed, the dual camera may simultaneously capture images on a remaining camera film roll in a filming position and the radio wave transmission attachment may transmit image data to outside picture processing devices without exposing the camera film roll in the filming position. Alternatively, a cable transmits radio wave image data to outside picture processing devices. An image radio wave converter of the dual camera converts photograph image data into radio wave image data.

A head structure of a robot according to the invention includes a first motor and a second motor so supported side by side within a head of the robot that output shafts are positioned coaxially with each other; a left elastic frame that is so driven by the first motor and one end of which is so fitted as to be rotatable around the output shaft and the other end of which extending in a perpendicular direction from the output shaft is supported by a trunk of the robot; and a right elastic frame that is so driven by the second motor and one end of which is so fitted as to be rotatable around the output shaft and the other end of which extending side by side with the left elastic frame from the output shaft is supported by the trunk.

A dollhouse is moveable from a closed or folded position to an open or unfolded position. In its open configuration, the dollhouse provides one or more play areas on each side of the dollhouse. The dollhouse can be provided with a variety of sensors for detecting play activities and providing feedback such as audible feedback, motion or lights in response to the specific play activities. Feedback can also be produced in response to the order in which the sensors are activated and in response to activation by particular play components to encourage desired play behavior.

The present invention relates to moldable sand compositions, methods for making the moldable sand compositions, and methods for using the moldable sand compositions. In a particular embodiment, the moldable sand composition comprises between about 70% to about 95% sand, between about 5% to about 30% water, a polar polymeric resin, a crosslinking agent, and a humectant. In an exemplary embodiment, the composition contains no oils, waxes, glycols, or rubbers. The composition is capable of becoming hardened over time in order to maintain the achieved shape, and can be re-wetted and molded again after becoming hardened.

A multi-color harmonic synthesized laser system for laser processing and a laser processing method using multi-color harmonic synthesized laser are disclosed. The multi-color harmonic synthesized laser system includes a laser source for providing a single laser wave, a converter for converting the single laser wave into a plurality of harmonic waves with different frequencies, and a modulating unit for modulating amplitudes and relative phases of the harmonic waves to form a plurality of modulated harmonic waves, so as to synthesize the modulated harmonic waves as a single synthesized laser wave, wherein the single synthesized laser wave is focused on an object to perform a laser processing. The converter includes a plurality of non-linear crystals for converting the single laser wave into a fundamental harmonic wave and a plurality of multi-frequency harmonic waves. The harmonic waves are coherent and collinear, and the phases of the harmonic waves are related to one another.

A microlaser system includes an optical source, a microlaser, an actuator switch, and a photovoltaic power source. The microlaser, which includes a control element, is optically pumped by at least a portion of light emitted by the optical source. The actuator switch is configured to be activated by a triggering event. Furthermore, the photovoltaic power source is coupled in a series connection with the actuator switch and the control element, the series connection configured to connect the photovoltaic power source to the control element of the microlaser when the actuator switch is activated by the triggering event.

A conduction cooled high power semiconductor laser and a method for fabricating the same are provided. The conduction cooled high power semiconductor laser comprises a heat sink (2) and one or more semiconductor laser units (1). The semiconductor laser unit consists of a laser chip (3), a substrate (4) bonded to the laser chip for heat dissipation and electrical connection, and an insulation plate (5) soldered to the substrate for insulation and heat dissipation. The semiconductor laser unit is soldered on the heat sink with the insulation plate therebetween. The semiconductor laser unit may be tested, aged, and screened in advance, and thereby the yield of the lasers can be improved and the manufacturing costs can be reduced. The laser has desirable heat dissipation performance, high reliability, and is applicable to high temperature and other complex and volatile environments.

An interposer (support substrate) for an opto-electronic assembly is formed to include a thermally-isolated region where temperature-sensitive devices (such as, for example, laser diodes) may be positioned and operate independent of temperature fluctuations in other areas of the assembly. The thermal isolation is achieved by forming a boundary of dielectric material through the thickness of the interposer, the periphery of the dielectric defining the boundary between the thermally isolated region and the remainder of the assembly. A thermo-electric cooler can be used in conjunction with the temperature-sensitive device(s) to stabilize the operation of these devices.

A method for quasi-synchronous tuning of wavelength or frequency of grating external-cavity semiconductor laser and a corresponding semiconductor laser are provided. A grating or mirror is rotated around a quasi-synchronous tuning point (Pq) as rotation center, so as to achieve the frequency selections by grating and resonance cavity in quasi-synchronous tuning, wherein the angle of the line between the quasi-synchronous tuning point (Pq) and a conventional synchronous tuning point (P0) with respect to the direction of light incident on the grating is determined according to the angle difference between the incidence angle and diffraction angle of light on the grating. According to present invention, approximately synchronous tuning of laser is achieved with a simple and flexible design.

A method for generation of electromagnetic radiation has the following method steps: generation of electromagnetic radiation at a useful frequency,division of the electromagnetic radiation into a useful beam and a secondary beam,frequency shift of the electromagnetic radiation of the secondary beam,control of the useful frequency as determined by a manipulated variable, wherein the manipulated variable is derived from the frequency-shifted radiation of the secondary beam.

Frequency standards based on mode-locked fiber lasers, fiber amplifiers and fiber-based ultra-broad bandwidth light sources, and applications of the same.

Various embodiments of a photonic device and fabrication method thereof are provided. In one aspect, a device includes a substrate, a current confinement layer disposed on the substrate, an absorption layer disposed in the current confinement layer, and an electrical contact layer disposed on the absorption layer. The current confinement layer is doped in a pattern and configured to reduce dark current in the device. The photonic device may be a photodiode or a laser.

Disclosed are a scanner and an image reading apparatus including the same. The scanner can include a transparent plate, a scanning unit configured to scan a document on the transparent plate, a first sensor and a second sensor. The first sensor is positioned in a first document zone that is associated with an area in which a first document type is to be positioned based on a first alignment reference point provided on the transparent plate. The second sensor is positioned in a second document zone that is associated with an area in which a second document type of a different size is positioned based on a second alignment reference point provided on the transparent plate. The first document zone and the second document zone are non-overlapping zones. The document type and/or orientation can be determined based on the detection signals from the first and second sensors.

A wire-bound product using a double type laminated paper board and a method for manufacturing the same are disclosed. The wire-bound product employs a structure in which inner paper sheets are turned over in the rightward and leftward directions on front plates of a frame, instead a structure in which a plurality of inner paper sheets is turned over toward the rear surface of a frame, thereby allowing a user to see both surfaces of the inner paper sheets. Further, rear plates of the frame are inserted into various positions of a spring to support the front plates, thereby allowing a standing angle of the front plates of the frame to be adjustable.

A sheet processing apparatus which is capable of improving operability while suppressing an increase in apparatus size. In a front cover insertion mode, an insertion sheet for a front cover is inserted into a bundle of sheets on which images have been formed, and in a rear cover insertion mode, an insertion sheet for a rear cover is inserted into the bundle of sheets. Insertion sheets for the front cover and insertion sheets for the rear cover are set with the same orientation in a manual feed tray 105. An insertion sheet for the front cover stored in the manual feed tray 105 is conveyed to a finisher 500 in one of a face-down state and a face-up state. An insertion sheet for the rear cover stored in the manual feed tray 105 is conveyed to the finisher 500 in the other of the face-down state and the face-up state. The insertion sheets for the front cover and for the rear cover conveyed from the manual feed tray 105 and the sheets on which images have been formed are stacked on the finisher 500.

Theres is disclosed a device (10) for manufacturing a notepad (15) comprising a stack of sheets, a first side of each sheet having an adhesive to attach the first side to a reverse face of a sheet immediately facing said first side in said stack. The device (10) including a sheet feeder (20) for loading one or more loose sheets (24) of similar dimensions with the reverse face of each sheet (24) in said stack facing in the same direction and feeding each said sheet downstream of said device (10). A cutting means (40) is provided to cut each sheet (24) or a number of said sheets (24) to predetermined dimensions. An adhesive applicator (60) applies adhesive to a portion or portions of the first side of each sheet (24). A stacking means (100) stacks the cut sheets one on top of the other whereby a forming means (120) forms the cut sheets together to form the notepad (15).

Disclosed are various embodiments relating to verifying a printed work comprises a correct number of pages. Associated with a stack comprising one or more pages is an identifier that may be used to obtain an expected thickness of the pages in the stack. A sensor may then measure an actual thickness of the pages in the stack. Before binding the pages in the stack, the expected thickness of the stack may be compared to the actual thickness of the stack in order to verify the stack comprises the correct number of pages.

A machine for attachment of a cover to a book block comprises a press plate elevating mechanism for elevating a press plate 8, a nip plate drive mechanism for sliding nip plates 9 and 10, and a controller 30 controlling the press plate elevating mechanism and the nip plate drive mechanism. The press plate 8 elevates from the lower standby position to an upper press position. The press plate 8 presses the cover 12 to the book block 4 at the upper press position. The cover 12 is attached to the book block 4 by pressing the cover 12 to the lower end surface of the book block 4. The press plate 8 is elevated from the intermediate position to the upper press position, staying at the intermediate position during a waiting time for adjustment. The press plate 8 elevates from the intermediate position to the upper press position.

A female thread member capable of preventing seizing caused by inclined insertion, and being smoothly fastened from any directions in which a bolt is inserted, and a fastening member using the female thread member. A non-thread portion is formed on an inner peripheral surface of a female thread member body having a female thread for a length corresponding to at least one pitch from an end surface on a bolt-inserting side, and a projection which comes into contact with a flank surface of a male thread of an inserted bolt is formed on a line extending from a helical line of the female thread. The female thread member is used in combination with the bolt having no incomplete thread portion, and there is no adverse possibility of seizing regardless of any directions in which the bolt is inserted.

The blind rivet for fastening together a plurality of mounted components with mounting holes comprises a rivet body having a sleeve, a flange and a through hole; a mandrel having a slender stem and a head; and a washer. The head of the mandrel is adjacent to the sleeve-side end portion of the rivet body, the stem of the mandrel extends through the rivet body from the flange-side end portion, and the washer is mounted near the flange on the outer periphery of the sleeve of the rivet body. A portion of the outer peripheral surface of the sleeve adjacent to the flange is swaged to form a recessed portion so that the diameter in the other position is enlarged. The washer is pushed onto the enlarged-diameter portion and secured. The mounted components are fastened together between the enlarged end portion of the sleeve and the washer.

An assembly comprising at least two non-metal components which are fixed to each other using at least one fixing system. The fixing system includes a fixing device with a fixing element which is provided with a head and a rod, and a crimping ring which is in contact with one of the components. A protection device is a part of the fixing system which delimits a cavity for confining gas around a portion of the device comprising the crimping ring. In order to improve the repeatability of the operation for positioning the protection device, a guiding device is provided which includes an assembly element on the portion of the fixing device, and an element for guiding the protection device.

The invention relates to a self-tapping and self-boring osteosynthesis screw for compressive orthopaedic surgery, characterised in that, in the bone engagement regions, at both the distal portion (A1a) and at the proximal portion (A2a), the sum of the angles defining the outer taper of the shank (f) and the taper of the crest line of the screw thread pitch (P) is higher than 45°, and in that the leading portion (i.e. the most distal one) of each thread includes a plurality of cutting edges (AR) obtained by stock removal.

A connecting arrangement is provided between a plastic component with at least two mutually adjacent and at least approximately parallel walls and another structural element, having at least one force-transmission element which is adhesively bonded to the plastic component via an adhesive bond on the plastic component in frusto-conical or spherical-segment-shaped depressions in the mutually adjacent walls of the plastic component. The force-transmission element has a carrying structure for the other structural element. With the exception of a possibly provided coating, the force-transmission element is composed only of metallic material and has a plate which is adapted to the depression in the outer wall of the plastic component, which outer wall is adjacent to the other structural element. The edge of the plate rests with interposition on the outer wall in the surrounding region of the depression, wherein the plate is connected via a web to an end section of the force-transmission element, which end section is adapted to the depression in the other inner wall of the plastic component. The depression is configured in the outer wall without a bottom to such an extent that the end section of the force-transmission element can be inserted through the outer wall into the recess of the inner wall.

A shift register and driving method thereof, a gate driving apparatus and a display apparatus, the shift register comprises a pulling-up unit(21), a precharging and resetting unit(22), an output signal terminal at present stage(OUTPUT), a pulling-down unit(23), an input terminal connected to an output signal terminal of a shift register at previous stage(OUTF), an input terminal connected to an output signal terminal of a shift register at next stage(OUTL), and a scan control signal input terminal(INPUT), wherein: the precharging and resetting unit(22) precharges a gate of a first thin film transistor(T1) included in the pulling-up unit(21) and resets its potential; the pulling-down unit(23) pulls down a potential at the gate of the first thin film transistor(T1) and the output signal at present stage after the precharging and resetting unit(22) resets the potential at the gate of the first thin film transistor(T1), so that the pulling-up unit(21) is turned off and the output signal at present stage is at a low level. The present shift register realizes a bidirectional gate driving scan from up to down or from down to up by a conversion control for high-low levels of input signals.

A scan driving apparatus includes a plurality of sequentially arranged scan driving blocks, each including: a first node configured to receive a first clock signal; a second node configured to receive an input signal according to a second clock signal input; a first transistor having a gate electrode coupled to the first node, a first electrode configured to receive a power source voltage, and a second electrode coupled to an output terminal; and a second transistor having a gate electrode coupled to the second node, a first electrode for receiving a third clock signal, and a second electrode coupled to the output terminal. Each scan driving block is configured to receive the first, second, and third clock signals as a corresponding three clock signals among four clock signals sequentially shifted by a first period, and to output the third clock signal by being synchronized with the input signal.

A stage circuit and a scan driver using the same that is capable of concurrently (e.g., simultaneously) or progressively supplying a scan signal to a plurality of scan lines. The stage circuit includes a progressive driver and a concurrent driver.

A wearable device has a carrier having an aperture. A device has a USB connection and a protrusion wherein the protrusion is received in the aperture to connect the device to a wristband. The device is a USB type device having athletic functionality. The device may further be configured to receive calibration data such that a measured distance may be converted to a known distance based on athletic activity performed by a user.

A counter includes a buffer unit and a ripple counter. The buffer unit generates at least one least significant signal of a count by buffering at least one clock signal until a termination time point. The ripple counter generates at least one most significant signal of the count by sequentially toggling in response to at least one of the least significant signal. The counter performs multiple data rate counting with enhance operation speed and reduced power consumption.

A display device including various portions, circuits and other arrangements for outputting various pulses and triggers, for controlling forward shift and backward shift operations.

A shift register circuit includes a first shift register string and a second shift register string. The first shift register string is configured to receive a first start signal and output a first-stage control signal. The second shift register string, electrically connected to the first shift register string, is configured to receive the first-stage control signal and a second start signal and output the first pulse of a first-stage scan signal according to the first-stage control signal and the second start signal and consequently output the second pulse of the first-stage scan signal according to the second start signal; wherein the first and second pulses are configured to have different pulse widths. A driving method of a shift register circuit is also provided.

To suppress malfunctions in a shift register circuit. A shift register having a plurality of flip-flop circuits is provided. The flip-flop circuit includes a transistor 11, a transistor 12, a transistor 13, a transistor 14, and a transistor 15. When the transistor 13 or the transistor 14 is turned on in a non-selection period, the potential of a node A is set, so that the node A is prevented from entering into a floating state.

A method and system for synchronizing the output signal phase of a plurality of frequency divider circuits in a local-oscillator (LO) or clock signal path is disclosed. The LO path includes a plurality of frequency divider circuits and a LO buffer for receiving a LO signal coupled to the plurality of frequency divider circuits. The method and system comprise adding offset voltage and setting predetermined state to each of the frequency divider circuits; and enabling the frequency divider circuits. The method and system includes enabling the LO buffer to provide the LO signal to the frequency divider circuits after they have been enabled. When the LO signal drives each of the frequency divider circuits, each of the frequency divider circuits starts an operation. Finally the method and system comprise removing the offset voltage from each of the frequency divider circuits to allow them to effectively drive other circuits.

An active level shift (ALS) driver circuit and a liquid crystal display apparatus including the ALS driver circuit are disclosed. The ALS driver circuit includes an input unit configured to apply a first polarity voltage to a first node and to apply a second polarity voltage to a second node, a level compensation unit configured to adjust the voltages of the first node and the second node, and an output unit configured to alternately output a first power voltage and a second power voltage according to the adjusted voltages of the first and second nodes.

An open loop clock divider circuit includes (a) a first divider configured to receive an incoming clock signal and output a first divided clock signal, (b) a flying-adder synthesizer configured to fractionally divide the first divided clock signal and output a fractionally divided clock signal, and (c) a second divider configured to receive the fractionally divided clock signal and output a second divided clock signal. The open loop clock divider circuit advantageously provides a fractional divider in which there is no feedback loop between the source frequency (fs) and the destination frequency (fd). Methods of generating a divided clock signal involving the open loop clock divider circuit are also disclosed.

A stage circuit including an output unit for supplying first or second power source to an output terminal is disclosed. The stage circuit may comprise a bidirectional driver for respectively supplying signals supplied to first and second input terminals, a first driver, and a second driver. The second driver controls the output unit to output the second power source to the output terminal without any voltage loss, corresponding to a second clock signal.

A display apparatus and a method for generating gate signal thereof are provided. The display apparatus includes a timing controller and a display panel. The timing controller is used for providing a plurality of timing signals. The display panel includes a pixel array and a gate drive circuit. The pixel array has a plurality of pixels. The gate drive circuit is electrically connected to the timing controller and the pixel array and including a plurality of shift register circuits. The shift register circuit includes a first shift register and a second shift register. The first shift register is configured for generating a corresponding primary gate signal. The second shift register is configured for generating a corresponding secondary gate signal. The timing controller adjusts overlapping relations of the timing signals according to a frame rate of the display apparatus.

An LCD and a bidirectional shift register device thereof are provided. The bidirectional shift register device of the invention is disposed on the substrate of the panel and includes multi-stages shift registers in series connection. Each stage shift register includes a pre-charging unit, a pull-up unit and a pull-down unit, in which the pre-charging unit receives a first preset clock signal and the output from a (i−1)th stage shift register or a (i+1)th stage shift register so as to thereby output a charging signal. The pull-up unit receives the charging signal and a second preset clock signal so as to thereby output a scan signal. The pull-down unit receives the second preset clock signal, a third preset clock signal and the output from the (i+2)th stage shift register or the (i−2)th stage shift register so as to decide whether or not pulling down the scan signal to a reference level.

Stake pocket formations are secured to a cargo bed frame of a land vehicle such as trailers and flatbed trucks for removably supporting sidewall supporting members. The formations include sidewalls secured to and projecting from the frame and an end wall extending between the sidewalls. An opening extends through the end wall and is adapted to receive the terminal end of a J-hook therethrough. The J-hook is secured to the formation by inserting the terminal end thereof into the pocket placing an upper edge of the end wall into the J-hook gap and rolling/rotating the J-hook thereby inserting the terminal end into the opening. The J-hook cannot be removed from the pocket unless it is rolled/rotated in the opposite direction. While within the stake pocket and without strap tension, the J-hook abuts the trailer frame and formation end wall and is, thereby, maintained within the pocket.

A box stop device includes a base member and a raised member attached to the base member. The base member has a top surface and a bottom surface. The top surface may be flat. The bottom surface may be adapted to attach to a desired surface. The raised member may be attached to the base member and may extend approximately vertically from the top surface. The raised member may include a first side and a second side. The first side and the second side may be attached together at an angle of approximately 90 degrees.

An apparatus for selectively securing a boat to a trailer may include a hull contact structure for abutting against the boat hull, and a releasable gripping structure positioned adjacent the hull contact structure to engage the boat's securing loop and selectively lock onto the loop to hold the boat to the trailer.

A bridge output circuit includes an output terminal, a high side transistor, a low side transistor, a high side driver for controlling a gate voltage of the high side transistor, a low side driver for controlling a gate voltage of the low side transistor, and a controller for controlling the high side and low side drivers. The low side driver includes a first current source, a second current source, and a first assist circuit. The controller is configured to control the turning-on and turning-off states of the first current source, the second current source and the first assist circuit.

An active termination circuit for a differential receiver includes a first receiver element configured to receive a first component of a differential signal, a second receiver element configured to receive a second component of a differential signal, a common mode measurement element configured to receive the differential signal and generate a transmit common mode signal (Vcm) representing an average value of the differential signal, and a receiver (RX) common mode signal node. The termination circuit also comprises an active element configured to receive the transmit common mode signal (Vcm) and provide an output to the receiver common mode signal node, the output configured to drive the value of the signal at the receiver common mode signal node to the value of the transmit common mode signal (Vcm), and a capacitive element coupled to the receiver common mode signal node in parallel with the active element.

Methods and circuits related to a driving circuit with zero current shutdown are disclosed. In one embodiment, a driving circuit with zero current shutdown can include: a linear regulating circuit that receives an input voltage source, and outputs an output voltage; a start-up circuit having a threshold voltage, the start-up circuit receiving an external enable signal; a first power switch receiving both the output voltage of the linear regulating circuit and the external enable signal, and that generates an internal enable signal, the internal enable signal being configured to drive a logic circuit; when the external enable signal is lower than a threshold voltage, the driving circuit is not effective; when the external enable signal is higher than the threshold voltage, the start-up circuit outputs a first current; and where the output voltage at the first output terminal is generated by the linear regulating circuit based on the first current.

An impedance tuning circuit includes a calibration unit and a post-processing unit. The calibration unit generates an initial pull-up code and an initial pull-down code by performing a calibration operation using an external resistor during an initial impedance tuning operation. The post-processing unit outputs the initial pull-up code and the initial pull-down code as a final pull-up code and a final pull-down code during the initial impedance tuning operation, and generates the final pull-up code and the final pull-down code by using the initial pull-up code and the initial pull-down code during a subsequent impedance tuning operation.

A method of configuring a programmable integrated circuit device with a user logic design includes analyzing the user logic design to identify unidirectional logic paths within the user logic design and cyclic logic paths within the user logic design, assigning the cyclic logic paths to logic in a first portion of the programmable integrated circuit device that operates at a first data rate, assigning the unidirectional logic paths to logic in a second portion of the programmable integrated circuit device that operates at a second data rate lower than the first data rate, and pipelining the unidirectional data paths in the second portion of the programmable integrated circuit device to compensate for the lower second data rate. A programmable integrated circuit device adapted to carry out such method may have logic regions operating at different rates, including logic regions with programmably selectable data rates.

A semiconductor device includes an internal circuit, a power supply control circuit which controls supply of a power supply to the internal circuit upon receipt of a first control signal, and a control signal generation circuit which outputs the first control signal upon receipt of a second control signal. The control signal generation circuit does not deactivate the first control signal when an inactive period of the second control signal is equal to or less than a first period and deactivates the first control signal when the inactive period of the second control signal is more than the first period.

A method and apparatus that controls the clock of a digital circuit, and therefore power consumption, without substantially comprising performance is provided. The apparatus may include monitoring the utilization of a First in First Out (FIFO) buffer. For example in a systems and methods according to the invention, clock speed may be reduced when the FIFO is relatively empty and increased when the FIFO is relatively full. The clock speed may be controlled by a phase locked loop, a clock divider, a clock masking device or a combination of more than one of these methods. Power reduction may also be obtained by controlling the clocking of different stages of a pipelined device. One or more aspects of the inventions may be implemented in combination with other aspects of the invention to further reduce power use.

The present disclosure relates to nanoresonator oscillators or NEMS (nanoelectromechanical system) oscillators. A circuit for measuring the oscillation frequency of a resonator is provided, comprising a first phase-locked feedback loop locking the frequency of a controlled oscillator at the resonant frequency of the resonator, this first loop comprising a first phase comparator. Furthermore, a second feedback loop is provided which searches for and stores the loop phase shift introduced by the resonator and its amplification circuit when they are locked at resonance by the first loop. The first and the second loops operate during a calibration phase. A third self-oscillation loop is set up during an operation phase. It directly links the output of the controllable phase shifter to the input of the resonator. The phase shifter receives the phase-shift control stored by the second loop.

A self-feedback random generator comprises a digital-to-analog converter, a digital oscillator, a frequency-modulating unit and a first D-type flip-flop. The digital-to-analog converter receives a digital random-code signal and the digital random-code signal is converted to corresponding analog random signal. The frequency-modulating unit modulates frequency of first digital oscillating signal so as to increase random of frequency of first digital oscillating signal according to voltage value of the analog random signal, and accordingly outputs a second digital oscillating signal. The first D-type flip-flop receives the second digital oscillating signal and a clock signal, and reads the second digital oscillating signal through utilizing the clock signal so as to outputs the digital random-code signal, wherein frequency of the clock signal is smaller than frequency of the first digital oscillating signal, and random of frequency of the second digital oscillating signal corresponds to random of the digital random-code signal.

There are provided an accumulator-type fractional N-PLL synthesizer for suppressing the fractional spurious caused by periodically switching a frequency division number of a fractional frequency divider, and a control method thereof. In an accumulator-type fractional N-PLL synthesizer (100), a pulse signal proportional to a fractional phase error occurring between a reference signal and an output signal of a fractional divider (112) for feeding back an output of a VCO (115) of an output stage to a preceding stage is generated using an error signal from an accumulator (120). Through the use of the pulse signal, pulse widths of a UP signal and a DN signal output from a phase detector (140) are controlled so as to reduce a fractional phase error occurring between the UP signal and the DN signal. Thus, the fractional spurious caused by periodically switching the frequency division number of the fractional divider (112) is suppressed.