A cover applier is provided. The cover applier includes a transport system transporting a book, a cover delivery delivering a cover to a book, the cover delivery driven by a servomotor, a book sensor detecting an image printed on the book prior to the cover being delivered to the book and a cover sensor detecting an image printed on the cover prior to the cover being delivered to the book. The servomotor adjusting the position of the cover with respect to the book as a function of the book sensor and cover sensor. A method is also provided.

A drill bit assembly has a bit head and a pin body. The bit head comprises a cutting end, an opposite connecting end with an engagement section, and a feature facing the connecting end. The pin body comprises a tubular body with an axial bore therethrough, a connecting end with an engagement section and a feature facing the connecting end. The drill bit assembly is manufactured by positioning the pin body connecting end with the bit head connecting end such that the pin body and bit head engagement sections overlap with a gap therebetween, and the pin body and bit head features are aligned; injecting a thermoplastic or other connecting material in liquid form between the bit head and pin body engagement sections and into the gap; and solidifying the thermoplastic or other connecting material such that the bit head and pin body are mechanically coupled together at their connecting ends and their features are securely aligned.

In a driving circuit, one output circuit has a scanning signal line, a first transistor which controls electrical connection between the scanning signal line and a clock signal line which has a gate connected to a first node, the first node which is at an active potential in a first time period including a time period during which the active potential is output to the scanning signal line, a second transistor which electrically connects the first node and an inactive signal line which has a potential to open the transistor in a second time period other than the first time period, and the second transistor has a gate connected to a second node, wherein the second node has two kinds of timings to be charged for retaining the active potential.

A display panel drive circuit includes a shift register constructed of unit circuits connected in stages. The unit circuits generate signal line selection signals, respectively, which signal line selection signals are made active for a respective certain period of time to form a respective pulse, and the pulses are outputted successively from respective unit circuits in order of ordinal number starting from a first stage until an end stage. In at least one embodiment, each of the unit circuits receive (i) clock signals generated based on a sync signal received from outside of the display panel drive circuit, (ii) a start pulse signal generated based on the sync signal, or a signal line selection signal generated in a stage different from its own stage, and (iii) a clear signal. The clear signal is made active in a case where anomalousness is included in the sync signal, and no pulse is outputted from the shift register until a subsequent vertical scanning period starts. This configuration achieves a display panel drive circuit which prevents display disorder or holds down increase in load given to a power source, each of which occurs in a case where anomalousness is included in the sync signal.

A shift register includes a plurality of stages of unit circuits each including a flip-flop. Each of the unit circuits generates, by obtaining a sync signal in accordance with an output from the flip-flop, an output signal. The flip-flop includes a first switch and a second switch and a latch circuit for latching a signal supplied thereto and outputting the signal as the output from the flip-flop. A first shift direction signal is supplied to the latch circuit via the first switch, and the second shift direction signal is supplied to the latch circuit via the second switch. In each unit circuit other than those of the first and last stages, an output signal from a previous stage is supplied to a control terminal of the first switch, and an output signal from a subsequent stage is supplied to a control terminal of the second switch.

A method and system for synchronizing the output signal phase of a plurality of frequency divider circuits in a local-oscillator (LO) or clock signal path is disclosed. The LO path includes a plurality of frequency divider circuits and a LO buffer for receiving a LO signal coupled to the plurality of frequency divider circuits. The method and system comprise adding offset voltage and setting predetermined state to each of the frequency divider circuits; and enabling the frequency divider circuits. The method and system includes enabling the LO buffer to provide the LO signal to the frequency divider circuits after they have been enabled. When the LO signal drives each of the frequency divider circuits, each of the frequency divider circuits starts an operation. Finally the method and system comprise removing the offset voltage from each of the frequency divider circuits to allow them to effectively drive other circuits.

A stage constituent circuit of a display device drive circuit includes a first-node to a third-node, a thin-film transistor that changes a potential of a scanning signal toward a VDD potential when a potential of the first-node is in a HIGH level, a thin-film transistor that changes a potential of a different stage control signal toward a potential of a clock when a potential of the second-node is in the HIGH level, a capacitor between the first-node and the second-node, and a capacitor between the second-node and the third-node. The potential of the first-node is raised on the basis of a different stage control signal output from the stage constituent circuit in the different stage, and then the potential of the second-node and a potential of the third-node are sequentially raised. Herein, an amplitude of the clock is set to be smaller than an amplitude of the scanning signal.

To provide a pulse signal output circuit and a shift register which have lower power consumption, are not easily changed over time, and have a longer lifetime. A pulse signal output circuit includes a first input signal generation circuit; a second input signal generation circuit; an output circuit which includes a first transistor and a second transistor and outputs a pulse signal in response to a signal output from the first and second input signal generation circuits; a monitor circuit which obtains the threshold voltages of the first and second transistors; and a power supply output circuit which generates a power supply potential raised by a potential higher than or equal to a potential which is equal to or substantially equal to the threshold voltage and supplies the power supply potential to the first and second input signal generation circuits. A shift register includes the pulse signal output circuit.

A display apparatus and a method for generating gate signal thereof are provided. The display apparatus includes a timing controller and a display panel. The timing controller is used for providing a plurality of timing signals. The display panel includes a pixel array and a gate drive circuit. The pixel array has a plurality of pixels. The gate drive circuit is electrically connected to the timing controller and the pixel array and including a plurality of shift register circuits. The shift register circuit includes a first shift register and a second shift register. The first shift register is configured for generating a corresponding primary gate signal. The second shift register is configured for generating a corresponding secondary gate signal. The timing controller adjusts overlapping relations of the timing signals according to a frame rate of the display apparatus.

The invention concerns an oscillator generating a wave composed of a frequency of on the order of terahertz from a beat of two optical waves generated by a dual-frequency optical source. The oscillator includes a modulator the transfer function of which is non-linear for generating harmonics with a frequency of less than one terahertz for each of the optical waves generated by the dual-frequency optical source, an optical detector able to detect at least one harmonic for each of the optical waves generated by the dual-frequency optical source and transforming the harmonics detected into an electrical signal, a phase comparator for comparing the electrical signal with a reference electrical signal, and a module for controlling at least one element of the dual-frequency optical source with a signal obtained from the signal resulting from the comparison.

An oscillator module includes a first MOS transistor and a capacitor. The capacitor is coupled between a gate and source of the first MOS transistor. The drain of the first MOS transistor receives a first bias current and generates an oscillating output signal. A switching circuit operates in response to the oscillating output signal to selective charge and discharge the capacitor. A current sourcing circuit is configured to generate the bias current. The current sourcing circuit includes a second MOS transistor which has an identical layout to the first MOS transistor and receives a second bias current. A resistor is coupled between a gate and source of the second MOS transistor. The current sourcing circuit further includes a current mirror having an input configured to receive a reference current passing through the resistor and generate the first and second bias currents.

The present invention proposes a digital system and method of measuring (estimating) non-energy parameters of the signal (phase, frequency and frequency rate) received in additive mixture with Gaussian noise. The first embodiment of the measuring system consists of a PLL system tracking variable signal frequency, a block of NCO full phase computation (OFPC), a block of signal phase primary estimation (SPPE) and a first type adaptive filter filtering the signal from the output of SPPE. The second embodiment of the invention has no block SPPE, and NCO full phase is fed to the input of a second type adaptive filter. The present invention can be used in receivers of various navigation systems, such as GPS, GLONASS and GALILEO, which provide precise measurements of signal phase at different rates of frequency change, as well as systems using digital PLLs for speed measurements.

An image forming apparatus may include an image forming unit, a stacking unit, a control unit, and an alignment unit. The image forming unit forms an image on a recording material having a type. The stacking unit stacks the recording material on which the image formation is formed by the image forming unit. The control unit sets a predetermined number of sheets to a number that corresponds to the type of the recording material. The alignment unit aligns the recording material if the predetermined number of sheets of the recording material is stacked by the stacking unit.

In an embodiment, a processor-readable medium stores code representing instructions that when executed by a processor cause the processor to receive sheet length data for two paper sheets of a same standard dimension passing consecutively through a printing device. The processor calculates a length difference between the two paper sheets, and when the length difference exceeds a two-sheet threshold, it initiates an alignment correction cycle in a paper finishing device.

An image recording apparatus includes: a recording unit for recording an image on a recording medium; a tray for supporting the recording medium recorded by the recording unit; a conveyor mechanism for conveying the recorded medium to the tray; and an alignment mechanism for aligning a plurality of recording media stacked on the tray, by application of an external force. In a period from a start to an end of recording based on one recording job, the alignment mechanism aligns the plurality of recording media stacked on the tray in a period in which image recording is not performed, and the alignment mechanism does not align the plurality of recording media stacked on the tray in a period in which image recording is being performed.

The present invention provides an apparatus for enhancing Q factor of an inductor. The apparatus includes a negative resistance generator coupled to the inductor for providing a negative resistance, and a bias circuit coupled to the negative resistance generator for biasing the negative resistance generator.

The present invention generally relates to drinking games and apparatuses for the use therewith. Specifically, this invention relates to an improved drinking game component and cup alignment apparatus for use with various drinking games. The drinking game cup or attachment and cup alignment apparatus may be designed in such a manner as to allow for simplified, accurate and reliable positioning of one or more drinking cups on a playing surface.

A designer-adaptive visual code (32, 32', 32″) includes a user-selected set glyphs (36, 36', 36″, 36'−), a user-selected set of allowable glyph orientations relative to a user-selected reference angle, and a user-selected spatial arrangement of the glyphs (36, 36', 36″, 36'″). The user-selected set of glyphs (36, 36', 36″, 36'″) has a size sufficient to recover geometric characteristics of at least one repeating code portion so as to generate an analyzable image when captured via a camera-equipped mobile device (26). The user-selected spatial arrangement of the glyphs (36, 36', 36″, 36'″) includes the at least one repeating code portion (34) to be visible on a surface from at least two different areas of the surface.

A system and method for reading a bar code are disclosed which may include transmitting light pulsed at a selected frequency to illuminate the bar code; converting light received at the bar code reader from the bar code into an electrical signal; transmitting the electrical signal through a signal conditioning circuit to filter and amplify the electrical signal, to thereby provide a conditioned electrical signal; sampling the conditioned electrical signal at the selected frequency; removing energy due to light scattering within a housing of the bar code reader from the sampled, conditioned electrical signal; generating one of a logical “1” and a logical “0” output based on a value of the signal generated by the step of removing; and resolving output from the step of generating into data indicative of information on the bar code.

An output buffer comprises a series connection of a first field effect transistor and a second field effect transistor, wherein the first field effect transistor is connected to a first supply potential terminal and the second field effect transistor is connected to a second supply potential terminal. An output terminal is connected to a common connection of the first transistor and the second transistor. The output buffer has a series connection of a resistive element and a capacitive element, wherein the capacitive element is connected to the output terminal, and a control circuit, to which an input signal is provided. The control circuit controls the transistors in such a way that turning off of a transistor is performed immediately, while turning on of a transistor is performed depending on the charging or discharging of the capacitive element, thus achieving a defined slew rate of the output signal at the output terminal.

In one example implementation, the present disclosure provides a direct current (DC) restoration circuit for restoring the DC component of a synchronization signal provided over an alternating current (AC) coupled link from a transmitting circuit to a receiving circuit. During a period of inactivity in the synchronization signal, the synchronization signal may experience a drift towards the common mode, and may affect the ability for the synchronization signal to properly trigger the receiving circuit. The DC restoration circuit is configured to hold the synchronization signal steady during the period of inactivity, and allow the AC component of the synchronization signal pass through to the receiving circuit during the period of activity to alleviate the problem of baseline drift in the synchronization signal.

An apparatus (40,60) for aligning a rail conditioning system, such as a sanding system or a compressed air snow removal system of a locomotive. A source of light (50,70) is removeably and unmovingly attached to a conduit (44,62) of the rail conditioning system to direct a beam of light (53) toward a rail (46) to verify a location of impingement (56) of a spray of rail conditioning material (45,66). The source of light may be a battery operated laser pointer, and it may be attached to a fixture (48,72) that is removeably secured to the conduit. The fixture may be attached over an outlet nozzle (42,62) of the conduit, or it may be threaded onto the conduit in place of the nozzle when the nozzle is removed for cleaning and inspection.

The present invention provides an ultra violet irradiating device for aligning liquid crystal and also an water-cooling coaxial tube. The ultraviolet irradiating device includes a water-cooling coaxial tube configured with an inter tube and an external pipe enveloping the internal pipe. A light tube is disposed within the internal pipe, and an infrared filter layer is disposed between the internal and external pipes; and an ultra violet filter layer is coated over an external surface of the external pipe so as to filter out an ultra violet light beam having wavelength lower than 320 nm. The breakage of the unit filters resulted from inter pushing with each other or leakage resulted from overlapping of the unit filters can be readily resolved.

A method of manufacturing a liquid crystal display includes: preparing a lower mother substrate, where lower cells, each including a thin film transistor, are provided on the lower mother substrate, and a lower alignment layer is disposed on the lower cells; preparing an upper mother substrate, where upper cells corresponding to the lower cells are provided on the upper mother substrate, and an upper alignment layer is disposed on the upper cells; providing a mother substrate assembly by providing a liquid crystal mixture layer between the lower and upper mother substrates and combining the lower and upper mother substrates; providing a pretilt of the liquid crystals by applying a voltage to a voltage application unit of the lower mother substrate; and curing an alignment supporting agents in the liquid crystal mixture layer or the lower and upper alignment layers by irradiating light to a side of the mother substrate assembly.

An apparatus for aligning a dispenser includes a table having a first alignment mark, an alignment plate provided along at least one side of the table, at least one syringe supplying a dispensing material to the alignment plate through a nozzle provided at one end portion thereof to form a second alignment mark, a first image camera provided along a side of the syringe and detecting an image of the second alignment mark, a second image camera detecting an image of the first alignment mark, and an alignment control unit aligning the image of the second alignment mark and a first reference position, and aligning an image of the first alignment mark and a second reference position.

An exhaust system for a compression ignition engine comprising an oxidation catalyst for treating carbon monoxide (CO) and hydrocarbons (HCs) in exhaust gas from the compression ignition engine, wherein the oxidation catalyst comprises: a platinum group metal (PGM) component selected from the group consisting of a platinum (Pt) component, a palladium (Pd) component and a combination thereof; an alkaline earth metal component; a support material comprising a modified alumina incorporating a heteroatom component; and a substrate, wherein the platinum group metal (PGM) component, the alkaline earth metal component and the support material are disposed on the substrate.

This specification discloses an operational continuous process to convert lignin as found in ligno-cellulosic biomass before or after converting at least some of the carbohydrates. The continuous process has been demonstrated to create a slurry comprised of lignin, raise the slurry comprised of lignin to ultra-high pressure, deoxygenate the lignin in a lignin conversion reactor over a catalyst which is not a fixed bed without producing char. The conversion products of the carbohydrates or lignin can be further processed into polyester intermediates for use in polyester preforms and bottles.

A blade for a rotor of a wind turbine is manufactured with a root region with a substantially circular or elliptical profile closest to the hub, an airfoil region with a lift generating profile furthest away from the hub and a transition region having a profile gradually changing the root region to the airfoil region. A first blade design is used for the first base part on a first longitudinal section of an airfoil region of a second blade, so that an induction factor of the first base part on the second blade deviates from a target induction factor. The first longitudinal section of the second blade is provided with flow altering devices so as to adjust the aerodynamic properties of the first longitudinal segment to substantially meet the target induction factor at the design point on the second blade.

A method of transmitting a training signal in a Wireless Local Area Network (WLAN) system includes generating one or more first training signals for a first destination station and one or more second training signals for a second destination station by applying a mapping matrix P to a training signal generation sequence, mapping the first training signals and the second training signals to a plurality of antennas according to an antenna mapping matrix, and performing Inverse Fast Fourier Transform (IFFT) on each of the first training signals and the second training signals mapped to the plurality of antennas and transmitting the training signals through the plurality of antennas.

In an angle modulated radio transmitter, the total power is the same when modulated or unmodulated. Angle modulation produces multiple sideband pairs. The power in the sidebands is derived from the carrier. When a complex modulating waveform is used, the power (and therefore the amplitude) of the carrier varies. A system and method is provided for dramatically minimizing, to nearly zero, the bandwidth needed to transmit digital information using sideband suppression of angle modulated signals. The systems described use various techniques to suppress sideband pairs, leaving the carrier signal. The amplitude variations of the carrier are used to convey information. In some examples, techniques are used to filter and/or phase out one or more sideband pairs, leaving the carrier signal.

A communication apparatus with a multiple-input and multiple-output (MIMO) channel, includes a minimum mean square error (MMSE) detector configured to estimate quadrature amplitude modulation (QAM) symbols based on signals received through the MIMO channel. The apparatus further includes a QAM demodulator configured to demodulate the estimated QAM symbols, and estimate a first posterior probability of each of encoded bits of the estimated QAM symbols, and a first module configured to remove a first prior probability of each of the encoded bits from the first posterior probability to generate soft estimates of the encoded bits. The apparatus further includes a channel decoder configured to decode the encoded bits based on the soft estimates, and generate an improved posterior probability of each of the encoded bits, and a second module configured to generate a second prior probability of each of the encoded bits based on the improved posterior probability.

A digital broadcasting receiving system is provided. A receiving module receives an M number of symbols each carrying an N number of subcarriers of a control signal. A converting module performs FFT on respective kth subcarriers of an ith symbol and an (i+1)th symbol to generate an (i, k)th converted value and an (i+1, k)th converted value. A demodulating module performs differential demodulation on the (i, k)th and (i+1, k)th converted values to generate an (i, k)th demodulation value. A combining module soft-combines the (i, 1)th demodulation value through the (i, N)th demodulation value to generate an ith prediction value corresponding to the ith symbol. A determining module identifies a synchronization segment in the control signal according to the 1st prediction value to the (M−1)th prediction value.

Various embodiments associated with an at least fourth-order cumulant of a signal are described. The at least fourth-order noise-insensitive cumulant of the signal can be taken and compared against an at least fourth-order noise-insensitive cumulant of known signals. A match can be found between the signal and a known signal and from this match, a demodulation scheme of the signal can be determined. The demodulation scheme can be used to demodulate the signal.

A system that incorporates the subject disclosure may include, for example, a process that includes adjusting a filter in electrical communication between an input terminal and a demodulator. The filter is applied to an information bearing signal, e.g., to mitigate interference, received at the input terminal, resulting in a filtered signal. An error signal is received, indicative of errors detected within information obtained by demodulation of a modulated carrier of the filtered signal. A modified filter state is determined in response to the error signal and the filter is adjusted according to the modified filter state, e.g., to improve mitigation of the interference. Other embodiments are disclosed.

A receiving circuit, use, and method for receiving an encoded and modulated radio signal is provided. The circuit comprise a demodulator and a digital filter connected downstream of the demodulator for moving averaging. The filter has at least two FIFO registers and subtractors. Whereby for subtracting an output value of the FIFO register from an input value of the FIFO register a subtractor is connected to each FIFO register. Wherein the filter has a weighting unit, which is connected downstream of each FIFO register, and wherein the filter has an integrator, which is connected downstream of the subtractors for integration.

Systems and methods for discrete signal synchronization based on a known bit pattern are described. In one aspect of the present subject matter, a discrete signal synchronization system is configured to synchronize a preprocessed discrete signal with a modified discrete signal. The system comprises a processor and a synchronization module coupled to the processor. The synchronization module comprises an extraction module and comparison module. The extraction module determines a bit pattern from the modified discrete signal using Discrete Wavelet Transformation (DWT) and Singular Value Decomposition (SVD). The comparison module compares the determined bit pattern with a known bit pattern of the preprocessed discrete signal and records a time point at which the determined bit pattern matches with the known bit pattern of the preprocessed discrete signal as a synchronization point.

The present invention relates to a wireless transmission system for signals intended more specifically for a domestic environment. It includes a central terminal comprising at least m transmission channels and n directive transmission antennas intended to transmit first signals at least one client terminal having at least one reception channel connected to a reception antenna in order to receive the first signals said central terminal and said client terminal communicating in a transmission channel having a predetermined frequency band, and an estimation device able to generate an item of information representative of the reception quality of first signals in at least one point of a predetermined geographic zone associated with the client terminal and a return channel in order to transmit said at least one item of information to the control means of the central terminal.

A mobile wireless device maintains a radio sector database. When receiving no response or a negative response from a radio sector to a transmitted signaling message, the mobile wireless device adds or updates the radio sector database. When receiving a positive response from the radio sector, the mobile wireless device deletes the radio sector from the radio sector database. Before transmitting signaling messages to a radio sector, the mobile device determines a time delay value if the radio sector is in the radio sector database. The mobile wireless device discards the signaling message when an elapsed time since a most recently transmitted signaling message to the radio sector does not exceed the determined time delay value. In an embodiment, each radio sector in the radio sector database includes a failure count value, and the determined time delay value depends on the failure count value.

Multiple-Input and Multiple-Output (MIMO)-Orthogonal Frequency Division Multiplexing (OFDM) communication is provided which allows high accuracy estimation of frequency offset, high accuracy estimation of a transmission path fluctuation and high accuracy synchronization/signal detection. Pilot symbol mapping is provided for forming pilot carriers by assigning orthogonal sequences to corresponding subcarriers among OFDM signals which are transmitted at the same time from respective antennas in the time domain. Even when pilot symbols are multiplexed among a plurality of channels (antennas), this allows frequency offset/phase noise to be estimated with high accuracy.

A radio communication device capable of randomizing both inter-cell interference and intra-cell interference. In this device, a spreading section (214) primarily spreads a response signal in a ZAC sequence set by a control unit (209). A spreading section (217) secondarily spreads the primarily spread response signal in a block-wise spreading code sequence set by the control unit (209). The control unit (209) controls the cyclic shift amount of the ZAC sequence used for the primary spreading in the spreading section (214) and the block-wise spreading code sequence used for the secondary spreading in the spreading section (217) according to a set hopping pattern. The hopping pattern set by the control unit (209) is made up of two hierarchies. An LB-based hopping pattern different for each cell is defined in the first hierarchy in order to randomize the inter-cell interference. A hopping pattern different for each mobile station is defined in the second hierarchy in order to randomize the intra-cell interference.

The present invention relates to a system, method, and apparatus that include a novel way of automatically assigning materials to 3D CAD models. A predefined material template specifies that a particular part or material name is assigned to a particular material such that all instances of the particular part name are assigned or modified automatically by the material template. By having a consistent naming convention for the parts in the CAD file, this material assignment can be performed automatically when the CAD file is imported or viewed.

A three dimensional (3D) branchline coupler using through silicon vias (TSV), methods of manufacturing the same and design structures are disclosed. The method includes forming a first waveguide structure in a first dielectric material. The method further includes forming a second waveguide structure in a second dielectric material. The method further includes forming through silicon vias through a substrate formed between the first dielectric material and the second dielectric material, which connects the first waveguide structure to the second waveguide structure.

An attenuation reduction control structure for high-frequency signal transmission lines of a flexible circuit board includes an impedance control layer formed on a surface of a substrate. The impedance control layer includes an attenuation reduction pattern that is arranged in an extension direction of the high-frequency signal transmission lines of the substrate and corresponds to bottom angle structures of the high-frequency signal transmission lines in order to improve attenuation of a high-frequency signal transmitted through the high-frequency signal transmission lines. An opposite surface of the substrate includes a conductive shielding layer formed thereon. The conductive shielding layer is formed with an attenuation reduction pattern corresponding to top angle structures of the high-frequency signal transmission lines.

A signal transmission cable includes a multi-layer parallel transmission path, a single-layer parallel transmission path, and a single-layer/multi-layer conversion section. The multi-layer parallel transmission path includes two or more dielectric waveguides stacked in upper and lower directions. Each dielectric waveguide includes a dielectric layer formed of a dielectric substance, two conductive layers formed to sandwich the dielectric layer, and two quasi-conductive walls. The two quasi-conductive walls include a plurality of via-holes electrically connected to the two conductive layers. The dielectric waveguides are arranged sharing the conductive layers in contact in the upper and lower directions. The single-layer parallel transmission path includes the two or more dielectric waveguides arranged in left- and right-hand directions on the same dielectric layer and conductive layer. The single-layer/multi-layer conversion section transmits a signal transmitted by each dielectric waveguide in the single-layer parallel transmission path to each dielectric waveguide in the multi-layer parallel transmission path.

A de-noise circuit and a de-noise method for differential signals and a chip for receiving differential signals are provided. The de-noise circuit includes a filter and a register. Both the filter and the register are disposed in the chip. The chip receives a differential signal through a first input terminal and a second input terminal. The filter is coupled between the first input terminal and the second input terminal of the chip. The filter filters out noises in the differential signal. The filter includes at least one filter unit. Each filter unit has at least one resistance value or at least one capacitance value. The register is coupled to the filter. The register receives and stores a control value. The register controls the resistance value or the capacitance value of at least one of the filter units based on the control value.

A nanogap device includes a first insulation layer having a nanopore formed therein, a first nanogap electrode which may be formed on the first insulation layer and may be divided into two parts with a nanogap interposed between the two parts, the nanogap facing the nanopore, a second insulation layer formed on the first nanogap electrode, a first graphene layer formed on the second insulation layer, a first semiconductor layer formed on the first graphene layer, a first drain electrode formed on the first semiconductor layer, and a first source electrode formed on the first graphene layer such as to be apart from the first semiconductor layer.

An alignment film forming apparatus and a method are provided to form an alignment film for a liquid crystal in a single process of simultaneously executing a film deposition process of ion beam sputtering and an alignment process. The method greatly restricts the size of a substrate. An alignment film forming apparatus includes a target disposed on a top surface side of a substrate and having a sputtering surface defining a sharp angle to the top surface of the substrate, a transfer table that transfers the substrate in a predetermined direction, and an ion source disposed on the top surface side of the substrate in such a way that an ion beam is irradiated on the sputtering surface of the target. An ion beam reflected at the sputtering surface is irradiated on a sputtering film formed on the substrate. The apparatus includes a mask disposed in such a way as to cover a part of the top surface of the substrate on an upstream side of a position where the sputtering film is formed, and a temperature regulator which regulates the temperature of the target.

A low resistivity interface material is provided between a self-aligned vertical heater element and a contact region of a selection device. A phase change chalcogenide material is deposited directly on the vertical heater element. In an embodiment, the vertical heater element in L-shaped, having a curved vertical wall along the wordline direction and a horizontal base. In an embodiment, the low resistivity interface material is deposited into a trench with a negative profile using a PVD technique. An upper surface of the low resistivity interface material may have a tapered bird-beak extension.

A transistor device includes a compound semiconductor body having a first surface and a two-dimensional charge carrier gas disposed below the first surface in the compound semiconductor body. The transistor device further includes a source in contact with the two-dimensional charge carrier gas and a drain spaced apart from the source and in contact with the two-dimensional charge carrier gas. A first passivation layer is in contact with the first surface of the compound semiconductor body, and a second passivation layer is disposed on the first passivation layer. The second passivation layer has a different etch rate selectivity than the first passivation layer. A gate extends through the second passivation layer into the first passivation layer.