Is there any way I can find duplicated shapes?

I would like to find two or more shapes are identical and they are placed in the same location.

Hi all,

I have a question regarding the manufacture : how to check a cluster of same net vias spacing, with have no shape or cline covered

Those who work in the IC Packaging design space have some unique challenges. We bridge between the IC design world (90/45-degree traces with rectangular and octagonal pins) and the PCB domain...

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Hi experts,

I have a problem with my design as below

ERROR: in SHAPE (-2.3622 2.3622)

  class = ETCH

  subclass = TOP 

  Part of Symbol Def SHAPE_4725X4725.

      Which is part of a padstack as a SHAPE symbol.

  ERROR(SPMHDB-187): SHAPE boundary may not cross itself.

   Error cannot be fixed.

       Object has first point location at (-2.3622 2.3622).

Can you tell me how to solve my problem?

Thanks a lot.

Currently I tried this:

axlDBCreateShape(recPolyPlanes t "BOUNDARY/L02" netName sym1)

I get a atom error on car(sym1)

I can do this "static" using ETCH/L02 with out an issue, but I am trying to avoid doing an axlShapeChangeDynamicType().

Thanks,

Jerry

Hi all,

I am creating shapes on plane layers for a coupon and want to void them using axlShapeAutoVoid()

The shapes are attached to a symbol.

I've tried using axlShapeAutoVoid, but this only voids the pins, not the route keepouts created by nc_backdrill.

I also tried selecting the shape, individually, then running axlShapeAutoVoid. That was unsuccessful, also.

planeShapes is a list of shapes I created. The code for voiding:

;run backdrill to get route keepouts
axlShell("setwindow pcb;backdrill setup ;setwindow form.nc_backdrill;FORM nc_backdrill apply ;FORM nc_backdrill close")

foreach(sHape planeShapes
axlShapeAutoVoid(car(sHape))
)

Those who work in the IC Packaging design space have some unique challenges. We bridge between the IC design world (90/45-degree traces with rectangular and octagonal pins) and the PCB domain (any-angle routing, filled planes, and a multitude of pad ...(read more)

Here are two screen capture of Before and After Autorouting my board. Padstacks have all been revised and corrected. The Capture Schematic is correct. All Footprints have been verified after Padstack revision. a new NETLIST generation have been done after some corrections made in Capture. I have imported the new Logic. I revised my Layout Cross Section as such: TOP, GND, VCC, BOTTOM. Both VCC and GND shapes have been assigned to their respective logical GND and VCC Nets (verified). Yet, I still have the Autorouter to systematically use extra vias to make GND and VCC connections to the VCC and GND planes. Where a simple utilisation of the part padstack inner layer would have been indicated. What Im I missing ?

Hi everybody,

I've created a symbol with custom pad shapes. Everything looks correct in the symbol editor.

And the 3d view looks correct (upside down to show placement)

But when I try to place it on the pcb the 2 "T" shaped pads aren't in the correct location.

I have the pad shape centered on the pad...

with no offset on the padstack editor.

Does anybody know how to fix this?

Thank you!

If you have one of those Die layouts, which doesn’t have bumps, but rather uses pad shapes and labels to identify I/O locations, then you might be feeling a bit left out of all of this jazz and tango. Hence, today, I am writing to tell you that, fear not, we have a solution for your Die as well.(read more)

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