xcelium 5X “Time Warp” in Your Next Verification Cycle Using Xcelium Machine Learning By community.cadence.com Published On :: Wed, 22 Jun 2022 05:19:00 GMT Artificial intelligence (AI) is everywhere. Machine learning (ML) and its associated inference abilities promise to revolutionize everything from driving your car to making your breakfast. Verification is never truly complete; it is over when you run...(read more) Full Article xcelium ml machine learning xcelium simulation
xcelium Xcelium PowerPlayBack App and Dynamic Power Analysis By community.cadence.com Published On :: Mon, 18 Jul 2022 10:00:00 GMT Learn how Xcelium PowerPlayback App enables the massively parallel Xcelium replay of waveforms for glitch-accurate power estimation of multi-billion gate SoC designs.(read more) Full Article Dynamic Power Analysis xcelium power
xcelium Coalesce Xcelium Apps to Maximize Performance by 10X and Catch More Bugs By community.cadence.com Published On :: Tue, 02 Aug 2022 04:30:00 GMT Xcelium Simulator has been in the industry for years and is the leading high-performance simulation platform. As designs are getting more and more complex and verification is taking longer than ever, the need of the hour is plug-and-play apps that ar...(read more) Full Article performance SoC apps xcelium simulation verification
xcelium Xcelium/Simvision/xrun running very slow (waiting for SimVision/Verisium Debug to connect...) By community.cadence.com Published On :: Fri, 01 Nov 2024 10:44:24 GMT Hello,I would like to use the simulation software xrun/simvision that comes with XCELIUM. We are currently using classroom licenses and want to disable all ip addresses on the student pcs except the license server ip. We want to make sure that students cannot copy confidential data from the Cadence tools.Problem:When I launch the xrun simulation while all ip addresses are blocked, it starts but the performance is very slow. The GUI starts after 5 minutes and the simulation is ready after 10 minutes. The interesting thing is that when I enable all blocked ip addresses, everything works at a reasonable speed. Terminal Output (execution without internet connection): xrun -gui design.vhd waiting for SimVision/Verisium Debug to connect...Is there a way to run the simulation tools without an Internet connection? Or can you give me the ip addresses that are used by the simulation tools so that I can enable only those specific ips?Regards,Max Full Article
xcelium Using Xcelium, xrun -nogui option, where are the simulation results By community.cadence.com Published On :: Thu, 29 Feb 2024 18:23:56 GMT I'm completely new to Cadence. I've been able to run a very simple simulation with the -gui option. Simvision opens, I add the variables to the waveform viewer, and press run. All is good. I don't understand the flow when using the -nogui option. It appears that the simulation runs and returns control to the OS. When I launch Simvision, is there a database or file that I can open to display the already-simulated data? My command is of the form: xrun -gui -64bit -sv -access +rwc -top tb_top.sv <src files> Full Article
xcelium [Xcelium][xrun] Simulate with multiple builds By community.cadence.com Published On :: Sun, 05 May 2024 06:21:52 GMT I want to do a 2-step build->simulate as follow: 1. Make multiple builds using xrun -elaborate [other options]. The purpose is to create multiple builds with different compile-time macros (+define+MACROA +define+MACROB=ABC). Each build is located in a different directory. 2. Run simulation with xrun -r. This is where I need help. How do I specify which build to simulate? Also, I need the simulation directory (with log files, …) to be different than the build directory. Has anyone been able to achieve this or similar solutions? Full Article
xcelium xcelium - CSI: *F,INTERR: INTERNAL EXCEPTION By community.cadence.com Published On :: Sun, 19 May 2024 10:06:24 GMT I just completed the setup of xcelium and I am trying to test a very simple vhdl file - I got " CSI: *F,INTERR: INTERNAL EXCEPTION" without any further explanation. Could someone point me to how to investigate this error further? csi-xmelab - CSI: Command line: xmelab -f /home/cadadmin/test/xcelium.d/run.lnx86.23.03.d/xmelab.args -ACCESS +r -no_analogsolver -MESSAGES andgate -XLMODE ./xcelium.d/run.lnx86.23.03.d -RUNMODE -CDSLIB ./xcelium.d/run.lnx86.23.03.d/cds.lib -HDLVAR ./xcelium.d/run.lnx86.23.03.d/hdl.var -WORK worklib -IRUNHASTOP -CHECK_VERSION TOOL: xrun 23.03-s001 -LOG_FD 4 csi-xmelab - CSI: *F,INTERR: INTERNAL EXCEPTION-----------------------------------------------------------------The tool has encountered an unexpected condition and must exit.Contact Cadence Design Systems customer support about thisproblem and provide enough information to help us reproduce it,including the logfile that contains this error message. TOOL: xmelab 23.03-s001OPERATING SYSTEM: Linux 4.18.0-513.9.1.el8_9.x86_64 #1 Elaboration of package STD.STANDARD----------------------------------------------------------------- csi-xmelab - CSI: Cadence Support Investigation, recording detailscsi-xmelab - CSI: investigation complete took 0.000 secs, send this file to Cadence Support Full Article
xcelium Xcelium: dump coverage information in the middle of a simulation By community.cadence.com Published On :: Fri, 23 Aug 2024 10:25:15 GMT Hi, I'm using the xcelium simulator to simulate a testbench, in which I first stimulate my design to do something (part "A") and then do a direct follow-up test on the design (part "B"). I need two things from this testbench: the results of the test (part "B", passed/failed) and coverage information, but the coverage information should only include part A and explicitly not part B. I could do the following: run the testbench with part A and B, get the "passed/failed" result of the test and then follow up another simulator run with another testbench, that only includes part A and get the coverage information from that simulation run. Is there a way to force xcelium to give me the coverage information of only a part of the simulation? Ideally, I would like to write the verilog code of my testbench to look something like this: do A dump coverage information do B But maybe there is another way to tell xcelium to consider only part of the testbench for the coverage information. I did have a look at the manual, but was not able to find something useful for this problem. Any ideas? Full Article
xcelium Archive of Tools Classification Analysis (Xcelium) By community.cadence.com Published On :: Tue, 05 Nov 2024 16:19:01 GMT Hi, Current and valid TCAs for Functional Safety are readily available at the FuSa "one-stop shop". But I have not been able to find any archive repository for access to the obsoleted versions. I would need to have also v1.4 of Xcelum TCA to investigate exact changes wrt previous projects. Anyone knows how to find it? Best regards, Lars Full Article
xcelium Viewing RTL Code Coverage reports with XCELIUM By feedproxy.google.com Published On :: Wed, 06 May 2020 09:30:28 GMT Hi, There was tool available with INCISIV called imc to view the coverage reports. The question is: How can we view the code coverage reports generated with XCELIUM? I think imc is not available with XCELIUM? Thanks in advance. Full Article
xcelium Xcelium Probe -Screen Issue By feedproxy.google.com Published On :: Sun, 26 Jan 2020 16:29:01 GMT Hi All, I want to capture the transition values of certain nodes in a design (i.e. a digital multiplier built with standard cells) and I use probe -screen command to dump the nodal values in text format. Since I only need to capture these values in the ideal situation, I use -nospecify switch with the xrun command : xrun -clean R16FA_2009.v R4BE_Test.v tb_stop16.v -v stdlib_verilog_models-sdf30.v -access +rwc -mess -timescale 1ns/1ps -nospecify -gui & and the probe command goes like this : probe -screen tb_stop16.mul16.test.L1 -redirect probe1.txt -format "%T L1 Value: %b" //Here L1 is an array of wires Although I expect a single transition at a given time instance, I see multiple transitions occurring in the dumped probe1.txt file. i.e. Time: 300 PS : 48'bxx0xx0xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx0xx0xx11xTime: 300 PS : 48'b000000000000000000000000000000000000000000000110Time: 4 NS : 48'b001000000000000000000000000000000000000000000100Time: 4 NS : 48'b011000000010111111111001000000110011011001010101Time: 8 NS : 48'b010000000010111111111001000000110011011001010101Time: 8 NS : 48'b110100101100000110000111100001010010111001011100Time: 12 NS : 48'b010000110011100010001110011100010101010001010101Time: 16 NS : 48'b000010000010000000000000000010000000010010010100Time: 20 NS : 48'b000011000010000000000000000010000000010010010100Time: 20 NS : 48'b000001001001001001011011000010001010011010010100 From the waveform, it appears that only the second value (bold) of the time instance is correct. Since the simulation is without annotated delays, there are no intermediate transitions in the waveform. How could this be possible ? Thanks in advance Full Article
xcelium How to refer the library compiled by INCISIVE 13.20 in Xcelium 19.30 By feedproxy.google.com Published On :: Wed, 19 Feb 2020 08:56:22 GMT Hi, I am facing this elaboration error when using Xcelium: Command> xmverilog -v200x +access+r +xm64bit -f vlist -reflib plib -timescale 1ns/1ps Log> xmelab: *E,CUVMUR (<name>.v,538|18): instance 'LUTP0.C GLAT3' of design unit 'tlatntscad12' is unresolved in 'worklib.LUTP0:v'. I guess the plib was not referred to as the simulation configuration because the tlatntscad12 is included in plib. The plib is compiled by INCISIVE 13.20 and I am using the Xcelium 19.30. Please tell me the correct command on how to refer to the library directory compiled by different versions. Thank you, Full Article
xcelium Post synthesis simulation with XCELIUM - SDF By feedproxy.google.com Published On :: Sat, 11 Apr 2020 12:27:22 GMT hi,due to technical problem i am running simulation through terminal. Therefore, I have a Verilog file, a test bench and i have also exported from Genus synthesized netlist and sdf file. Now, how can i annotate sdf in my post-synthesis simulation using XCELIUM while using command line?thank you Full Article