LYNX Technik AG, provider of modular interfaces will showcase its new bluBox signal processing series at CCW 2012, booth 1164

Yuriy A. Reznik, PhD, is lauded for his leadership expertise as the vice president of research at Brightcove Inc.

Location: Electronic Resource- 

Location: Engineering Circulation Desk- TK5102.9.W44 2012

IEEE Computer Society

IEEE Computer Society

IEEE / Institute of Electrical and Electronics Engineers Incorporated

IEEE / Institute of Electrical and Electronics Engineers Incorporated

IEEE Computer Society

IEEE / Institute of Electrical and Electronics Engineers Incorporated

IEEE / Institute of Electrical and Electronics Engineers Incorporated

IEEE / Institute of Electrical and Electronics Engineers Incorporated

IEEE / Institute of Electrical and Electronics Engineers Incorporated

IEEE / Institute of Electrical and Electronics Engineers Incorporated

A signal processing apparatus executes a plurality of microprograms stored in a microprogram memory device in a time-sharing manner, so as to perform arithmetic operations on a digital signal entered by a signal input device. A delay memory device that delays the digital signal. The delay memory device has a plurality of delay areas that are independently provided for the respective microprograms, such that each of the microprograms that is being executed uses a corresponding one of the plurality of delay areas so as to delay the digital signal, and a common area that can be accessed by all of the microprograms. As a result, data such as tables for use in common by the plurality of microprograms can be stored, and the stored data can be easily used by each microprogram, without making the system complicated or increasing the cost of the apparatus.

A unified system of programming communication. The system encompasses the prior art (television, radio, broadcast hardcopy, computer communications, etc.) and new user specific mass media. Within the unified system, parallel processing computer systems, each having an input (e.g., 77) controlling a plurality of computers (e.g., 205), generate and output user information at receiver stations. Under broadcast control, local computers (73, 205), combine user information selectively into prior art communications to exhibit personalized mass media programming at video monitors (202), speakers (263), printers (221), etc. At intermediate transmission stations (e.g., cable television stations), signals in network broadcasts and from local inputs (74, 77, 97, 98) cause control processors (71) and computers (73) to selectively automate connection and operation of receivers (53), recorder/players (76), computers (73), generators (82), strippers (81), etc. At receiver stations, signals in received transmissions and from local inputs (225, 218, 22) cause control processors (200) and computers (205) to automate connection and operation of converters (201), tuners (215), decryptors (224), recorder/players (217), computers (205), furnaces (206), etc. Processors (71, 200) meter and monitor availability and usage of programming.

An output buffer comprises a series connection of a first field effect transistor and a second field effect transistor, wherein the first field effect transistor is connected to a first supply potential terminal and the second field effect transistor is connected to a second supply potential terminal. An output terminal is connected to a common connection of the first transistor and the second transistor. The output buffer has a series connection of a resistive element and a capacitive element, wherein the capacitive element is connected to the output terminal, and a control circuit, to which an input signal is provided. The control circuit controls the transistors in such a way that turning off of a transistor is performed immediately, while turning on of a transistor is performed depending on the charging or discharging of the capacitive element, thus achieving a defined slew rate of the output signal at the output terminal.

A digital broadcasting receiving system is provided. A receiving module receives an M number of symbols each carrying an N number of subcarriers of a control signal. A converting module performs FFT on respective kth subcarriers of an ith symbol and an (i+1)th symbol to generate an (i, k)th converted value and an (i+1, k)th converted value. A demodulating module performs differential demodulation on the (i, k)th and (i+1, k)th converted values to generate an (i, k)th demodulation value. A combining module soft-combines the (i, 1)th demodulation value through the (i, N)th demodulation value to generate an ith prediction value corresponding to the ith symbol. A determining module identifies a synchronization segment in the control signal according to the 1st prediction value to the (M−1)th prediction value.

A sensor signal processing device includes an AD conversion section, a filter section, a timing signal generation section, and an arithmetic section. The timing signal generation section generates a signal synchronized with a crank angle of an engine based on a signal indicating the crank angle and generates a data acquisition timing signal by compensating the signal synchronized with the crank angle with a delay time of the filter. The arithmetic section acquires a plurality of sensor signals, which is transmitted from a sensor, converted from an analog signal to a digital signal by the AD conversion section, and filtered by the filter section, in a term before and after receiving the data acquisition timing signal and generates a data synchronized with the data acquisition timing signal.

Methods and apparatus for processing of GNSS signals are presented. These include GNSS processing with predicted precise clocks, GNSS processing with mixed-quality data, GNSS processing with time-sequence maintenance, GNSS processing with reduction of position jumps in low-latency solutions, GNSS processing with position blending to bridge reference station changes, and GNSS processing with delta-phase correction for incorrect starting position.

Online Resource

Online Resource

IEEE Computer Society

IEEE Computer Society

IEEE Computer Society

IEEE / Institute of Electrical and Electronics Engineers Incorporated

IEEE Computer Society

IEEE / Institute of Electrical and Electronics Engineers Incorporated

IEEE / Institute of Electrical and Electronics Engineers Incorporated

IEEE / Institute of Electrical and Electronics Engineers Incorporated

IEEE / Institute of Electrical and Electronics Engineers Incorporated

IEEE / Institute of Electrical and Electronics Engineers Incorporated

IEEE / Institute of Electrical and Electronics Engineers Incorporated

IEEE / Institute of Electrical and Electronics Engineers Incorporated

IEEE / Institute of Electrical and Electronics Engineers Incorporated

IEEE Computer Society

IEEE Computer Society

IEEE Computer Society

IEEE Computer Society

Online Resource

Online Resource

Barker Library - QP360.7.S54 2018