Location: Engineering Circulation Desk- TK5102.9.W44 2012

The disclosure relates to the implementation of multi-tasking on a digital signal processor. Blocking functions are arranged such that they do not make use of a processor's hardware stack. Respective function calls are replaced with a piece of inline assembly code, which instead performs a branch to the correct routine for carrying out said function. If a blocking condition of the blocking function is encountered, a task switch can be done to resume another task. Whilst the hardware stack is not used when a task switch might have to occur, mixed-up contents of the hardware stack among function calls performed by different tasks are avoided.

In an example embodiment, there is described herein an apparatus comprising an interface for communicating with a plurality of digital signal processors and logic operable to send and receive data via the interface. The logic is configured to determine a first set of digital signal processors to be maintained in a ready state, a second set of digital signal processors to be maintained in a first energy saving state, and a third set of digital signal processors to be maintained in a second energy saving state.

In one example, a method for controlling a display with a digital signal includes detecting a binary value from a timing controller, the binary value corresponding to a portion of an image to be displayed. The method can also include determining a previous binary value from the timing controller and calculating a difference between the binary value from the timing controller and the previous binary value from the timing controller. Furthermore, the method can include generating an encoded signal based on the difference and transmitting the encoded signal to a display panel.

Tarr, Eric, author